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MIPS: Only allow Cavium OCTEON to be configured for boards that support it 

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
CC: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2009-02-02 11:30:59 -08:00 committed by Ralf Baechle
parent 64e71303e4
commit 5e6833892e
1 changed files with 6 additions and 2 deletions
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8
arch/mips/Kconfig
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@ -603,7 +603,7 @@ config CAVIUM_OCTEON_SIMULATOR
select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_HIGHMEM
select CPU_CAVIUM_OCTEON select SYS_HAS_CPU_CAVIUM_OCTEON
help help
The Octeon simulator is software performance model of the Cavium The Octeon simulator is software performance model of the Cavium
Octeon Processor. It supports simulating Octeon processors on x86 Octeon Processor. It supports simulating Octeon processors on x86
@ -618,7 +618,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_HIGHMEM
select SYS_HAS_EARLY_PRINTK select SYS_HAS_EARLY_PRINTK
select CPU_CAVIUM_OCTEON select SYS_HAS_CPU_CAVIUM_OCTEON
select SWAP_IO_SPACE select SWAP_IO_SPACE
help help
This option supports all of the Octeon reference boards from Cavium This option supports all of the Octeon reference boards from Cavium
@ -1234,6 +1234,7 @@ config CPU_SB1
config CPU_CAVIUM_OCTEON config CPU_CAVIUM_OCTEON
bool "Cavium Octeon processor" bool "Cavium Octeon processor"
depends on SYS_HAS_CPU_CAVIUM_OCTEON
select IRQ_CPU select IRQ_CPU
select IRQ_CPU_OCTEON select IRQ_CPU_OCTEON
select CPU_HAS_PREFETCH select CPU_HAS_PREFETCH
@ -1314,6 +1315,9 @@ config SYS_HAS_CPU_RM9000
config SYS_HAS_CPU_SB1 config SYS_HAS_CPU_SB1
bool bool
config SYS_HAS_CPU_CAVIUM_OCTEON
bool
# #
# CPU may reorder R->R, R->W, W->R, W->W # CPU may reorder R->R, R->W, W->R, W->W
# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC