net/mlx4_core: A write memory barrier is sufficient in EQ ci update
Soften the memory barrier call of mb() by a sufficient wmb() in the consumer index update of the event queues. Suggested-by: Eric Dumazet <edumazet@google.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -100,7 +100,7 @@ static void eq_set_ci(struct mlx4_eq *eq, int req_not)
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req_not << 31),
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eq->doorbell);
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/* We still want ordering, just not swabbing, so add a barrier */
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mb();
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wmb();
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}
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static struct mlx4_eqe *get_eqe(struct mlx4_eq *eq, u32 entry, u8 eqe_factor,
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