drm/amdgpu: Add query_ras_error_count for vcn v4_0_3
Add query_ras_error_count callback for vcn v4_0_3. It will be used to query and log vcn error count. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1430,3 +1430,39 @@ const struct amdgpu_ip_block_version vcn_v4_0_3_ip_block = {
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.rev = 3,
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.funcs = &vcn_v4_0_3_ip_funcs,
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};
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static const struct amdgpu_ras_err_status_reg_entry vcn_v4_0_3_ue_reg_list[] = {
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{AMDGPU_RAS_REG_ENTRY(VCN, 0, regVCN_UE_ERR_STATUS_LO_VIDD, regVCN_UE_ERR_STATUS_HI_VIDD),
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1, (AMDGPU_RAS_ERR_INFO_VALID | AMDGPU_RAS_ERR_STATUS_VALID), "VIDD"},
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{AMDGPU_RAS_REG_ENTRY(VCN, 0, regVCN_UE_ERR_STATUS_LO_VIDV, regVCN_UE_ERR_STATUS_HI_VIDV),
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1, (AMDGPU_RAS_ERR_INFO_VALID | AMDGPU_RAS_ERR_STATUS_VALID), "VIDV"},
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};
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static void vcn_v4_0_3_inst_query_ras_error_count(struct amdgpu_device *adev,
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uint32_t vcn_inst,
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void *ras_err_status)
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{
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struct ras_err_data *err_data = (struct ras_err_data *)ras_err_status;
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/* vcn v4_0_3 only support query uncorrectable errors */
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amdgpu_ras_inst_query_ras_error_count(adev,
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vcn_v4_0_3_ue_reg_list,
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ARRAY_SIZE(vcn_v4_0_3_ue_reg_list),
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NULL, 0, GET_INST(VCN, vcn_inst),
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AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
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&err_data->ue_count);
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}
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static void vcn_v4_0_3_query_ras_error_count(struct amdgpu_device *adev,
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void *ras_err_status)
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{
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uint32_t i;
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if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) {
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dev_warn(adev->dev, "VCN RAS is not supported\n");
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return;
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}
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for (i = 0; i < adev->vcn.num_vcn_inst; i++)
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vcn_v4_0_3_inst_query_ras_error_count(adev, i, ras_err_status);
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}
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