accel/habanalabs: change hw_fini to return int to indicate error
We later use cpucp packet for soft reset which might fail so we should be able propagate the failure case. Signed-off-by: Dafna Hirschfeld <dhirschfeld@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org> Reviewed-by: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
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@ -1576,7 +1576,7 @@ struct hl_asic_funcs {
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int (*sw_init)(struct hl_device *hdev);
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int (*sw_fini)(struct hl_device *hdev);
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int (*hw_init)(struct hl_device *hdev);
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void (*hw_fini)(struct hl_device *hdev, bool hard_reset, bool fw_reset);
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int (*hw_fini)(struct hl_device *hdev, bool hard_reset, bool fw_reset);
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void (*halt_engines)(struct hl_device *hdev, bool hard_reset, bool fw_reset);
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int (*suspend)(struct hl_device *hdev);
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int (*resume)(struct hl_device *hdev);
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@ -4069,7 +4069,7 @@ disable_queues:
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return rc;
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}
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static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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static int gaudi_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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{
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struct cpu_dyn_regs *dyn_regs =
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&hdev->fw_loader.dynamic_loader.comm_desc.cpu_dyn_regs;
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@ -4079,7 +4079,7 @@ static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset
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if (!hard_reset) {
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dev_err(hdev->dev, "GAUDI doesn't support soft-reset\n");
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return;
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return 0;
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}
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if (hdev->pldm) {
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@ -4216,6 +4216,7 @@ skip_reset:
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hdev->device_cpu_is_halted = false;
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}
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return 0;
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}
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static int gaudi_suspend(struct hl_device *hdev)
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@ -5885,7 +5885,7 @@ static void gaudi2_get_soft_rst_done_indication(struct hl_device *hdev, u32 poll
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reg_val);
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}
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static void gaudi2_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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static int gaudi2_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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{
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struct gaudi2_device *gaudi2 = hdev->asic_specific;
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u32 poll_timeout_us, reset_sleep_ms;
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@ -5951,7 +5951,7 @@ skip_reset:
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gaudi2_get_soft_rst_done_indication(hdev, poll_timeout_us);
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if (!gaudi2)
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return;
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return 0;
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gaudi2->dec_hw_cap_initialized &= ~(HW_CAP_DEC_MASK);
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gaudi2->tpc_hw_cap_initialized &= ~(HW_CAP_TPC_MASK);
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@ -5978,6 +5978,7 @@ skip_reset:
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HW_CAP_PDMA_MASK | HW_CAP_EDMA_MASK | HW_CAP_MME_MASK |
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HW_CAP_ROT_MASK);
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}
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return 0;
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}
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static int gaudi2_suspend(struct hl_device *hdev)
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@ -2783,7 +2783,7 @@ disable_queues:
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return rc;
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}
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static void goya_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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static int goya_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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{
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struct goya_device *goya = hdev->asic_specific;
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u32 reset_timeout_ms, cpu_timeout_ms, status;
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@ -2839,7 +2839,7 @@ static void goya_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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HW_CAP_GOLDEN | HW_CAP_TPC);
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WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,
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GOYA_ASYNC_EVENT_ID_SOFT_RESET);
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return;
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return 0;
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}
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/* Chicken bit to re-initiate boot sequencer flow */
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@ -2858,6 +2858,7 @@ static void goya_hw_fini(struct hl_device *hdev, bool hard_reset, bool fw_reset)
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memset(goya->events_stat, 0, sizeof(goya->events_stat));
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}
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return 0;
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}
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int goya_suspend(struct hl_device *hdev)
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