mtd: mchp23k256: Add driver for this SPI SRAM device
The Microchip 23k256 is a 32K Byte SRAM connected via SPI. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> [Brian: fixed copyright to be in this millenium] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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@ -95,6 +95,16 @@ config MTD_M25P80
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if you want to specify device partitioning or to use a device which
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doesn't support the JEDEC ID instruction.
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config MTD_MCHP23K256
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tristate "Microchip 23K256 SRAM"
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depends on SPI_MASTER
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help
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This enables access to Microchip 23K256 SRAM chips, using SPI.
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Set up your spi devices with the right board-specific
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platform data, or a device tree description if you want to
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specify device partitioning
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config MTD_SPEAR_SMI
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tristate "SPEAR MTD NOR Support through SMI controller"
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depends on PLAT_SPEAR
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@ -12,6 +12,7 @@ obj-$(CONFIG_MTD_LART) += lart.o
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obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
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obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
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obj-$(CONFIG_MTD_M25P80) += m25p80.o
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obj-$(CONFIG_MTD_MCHP23K256) += mchp23k256.o
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obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
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obj-$(CONFIG_MTD_SST25L) += sst25l.o
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obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o
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@ -0,0 +1,182 @@
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/*
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* mchp23k256.c
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*
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* Driver for Microchip 23k256 SPI RAM chips
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*
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* Copyright © 2016 Andrew Lunn <andrew@lunn.ch>
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*
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* This code is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mutex.h>
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#include <linux/sched.h>
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#include <linux/sizes.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/spi.h>
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struct mchp23k256_flash {
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struct spi_device *spi;
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struct mutex lock;
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struct mtd_info mtd;
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};
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#define MCHP23K256_CMD_WRITE_STATUS 0x01
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#define MCHP23K256_CMD_WRITE 0x02
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#define MCHP23K256_CMD_READ 0x03
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#define MCHP23K256_MODE_SEQ BIT(6)
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#define to_mchp23k256_flash(x) container_of(x, struct mchp23k256_flash, mtd)
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static int mchp23k256_write(struct mtd_info *mtd, loff_t to, size_t len,
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size_t *retlen, const unsigned char *buf)
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{
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struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd);
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struct spi_transfer transfer[2] = {};
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struct spi_message message;
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unsigned char command[3];
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spi_message_init(&message);
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command[0] = MCHP23K256_CMD_WRITE;
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command[1] = to >> 8;
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command[2] = to;
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transfer[0].tx_buf = command;
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transfer[0].len = sizeof(command);
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spi_message_add_tail(&transfer[0], &message);
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transfer[1].tx_buf = buf;
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transfer[1].len = len;
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spi_message_add_tail(&transfer[1], &message);
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mutex_lock(&flash->lock);
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spi_sync(flash->spi, &message);
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if (retlen && message.actual_length > sizeof(command))
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*retlen += message.actual_length - sizeof(command);
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mutex_unlock(&flash->lock);
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return 0;
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}
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static int mchp23k256_read(struct mtd_info *mtd, loff_t from, size_t len,
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size_t *retlen, unsigned char *buf)
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{
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struct mchp23k256_flash *flash = to_mchp23k256_flash(mtd);
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struct spi_transfer transfer[2] = {};
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struct spi_message message;
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unsigned char command[3];
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spi_message_init(&message);
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memset(&transfer, 0, sizeof(transfer));
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command[0] = MCHP23K256_CMD_READ;
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command[1] = from >> 8;
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command[2] = from;
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transfer[0].tx_buf = command;
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transfer[0].len = sizeof(command);
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spi_message_add_tail(&transfer[0], &message);
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transfer[1].rx_buf = buf;
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transfer[1].len = len;
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spi_message_add_tail(&transfer[1], &message);
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mutex_lock(&flash->lock);
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spi_sync(flash->spi, &message);
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if (retlen && message.actual_length > sizeof(command))
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*retlen += message.actual_length - sizeof(command);
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mutex_unlock(&flash->lock);
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return 0;
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}
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/*
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* Set the device into sequential mode. This allows read/writes to the
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* entire SRAM in a single operation
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*/
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static int mchp23k256_set_mode(struct spi_device *spi)
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{
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struct spi_transfer transfer = {};
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struct spi_message message;
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unsigned char command[2];
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spi_message_init(&message);
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command[0] = MCHP23K256_CMD_WRITE_STATUS;
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command[1] = MCHP23K256_MODE_SEQ;
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transfer.tx_buf = command;
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transfer.len = sizeof(command);
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spi_message_add_tail(&transfer, &message);
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return spi_sync(spi, &message);
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}
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static int mchp23k256_probe(struct spi_device *spi)
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{
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struct mchp23k256_flash *flash;
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struct flash_platform_data *data;
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int err;
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flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
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if (!flash)
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return -ENOMEM;
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flash->spi = spi;
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mutex_init(&flash->lock);
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spi_set_drvdata(spi, flash);
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err = mchp23k256_set_mode(spi);
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if (err)
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return err;
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data = dev_get_platdata(&spi->dev);
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flash->mtd.dev.parent = &spi->dev;
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flash->mtd.type = MTD_RAM;
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flash->mtd.flags = MTD_CAP_RAM;
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flash->mtd.writesize = 1;
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flash->mtd.size = SZ_32K;
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flash->mtd._read = mchp23k256_read;
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flash->mtd._write = mchp23k256_write;
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err = mtd_device_parse_register(&flash->mtd, NULL, NULL,
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data ? data->parts : NULL,
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data ? data->nr_parts : 0);
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if (err)
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return err;
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return 0;
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}
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static int mchp23k256_remove(struct spi_device *spi)
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{
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struct mchp23k256_flash *flash = spi_get_drvdata(spi);
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return mtd_device_unregister(&flash->mtd);
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}
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static struct spi_driver mchp23k256_driver = {
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.driver = {
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.name = "mchp23k256",
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},
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.probe = mchp23k256_probe,
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.remove = mchp23k256_remove,
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};
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module_spi_driver(mchp23k256_driver);
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MODULE_DESCRIPTION("MTD SPI driver for MCHP23K256 RAM chips");
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MODULE_AUTHOR("Andrew Lunn <andre@lunn.ch>");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("spi:mchp23k256");
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