clk: mvebu: do not copy the contents of clk_corediv_desc
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -31,13 +31,13 @@ struct clk_corediv_desc {
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struct clk_corediv {
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struct clk_hw hw;
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void __iomem *reg;
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struct clk_corediv_desc desc;
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const struct clk_corediv_desc *desc;
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spinlock_t lock;
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};
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static struct clk_onecell_data clk_data;
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static const struct clk_corediv_desc mvebu_corediv_desc[] __initconst = {
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static const struct clk_corediv_desc mvebu_corediv_desc[] = {
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{ .mask = 0x3f, .offset = 8, .fieldbit = 1 }, /* NAND clock */
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};
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@ -46,7 +46,7 @@ static const struct clk_corediv_desc mvebu_corediv_desc[] __initconst = {
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static int clk_corediv_is_enabled(struct clk_hw *hwclk)
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{
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struct clk_corediv *corediv = to_corediv_clk(hwclk);
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struct clk_corediv_desc *desc = &corediv->desc;
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const struct clk_corediv_desc *desc = corediv->desc;
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u32 enable_mask = BIT(desc->fieldbit) << CORE_CLK_DIV_ENABLE_OFFSET;
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return !!(readl(corediv->reg) & enable_mask);
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@ -55,7 +55,7 @@ static int clk_corediv_is_enabled(struct clk_hw *hwclk)
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static int clk_corediv_enable(struct clk_hw *hwclk)
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{
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struct clk_corediv *corediv = to_corediv_clk(hwclk);
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struct clk_corediv_desc *desc = &corediv->desc;
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const struct clk_corediv_desc *desc = corediv->desc;
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unsigned long flags = 0;
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u32 reg;
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@ -73,7 +73,7 @@ static int clk_corediv_enable(struct clk_hw *hwclk)
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static void clk_corediv_disable(struct clk_hw *hwclk)
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{
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struct clk_corediv *corediv = to_corediv_clk(hwclk);
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struct clk_corediv_desc *desc = &corediv->desc;
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const struct clk_corediv_desc *desc = corediv->desc;
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unsigned long flags = 0;
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u32 reg;
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@ -90,7 +90,7 @@ static unsigned long clk_corediv_recalc_rate(struct clk_hw *hwclk,
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unsigned long parent_rate)
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{
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struct clk_corediv *corediv = to_corediv_clk(hwclk);
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struct clk_corediv_desc *desc = &corediv->desc;
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const struct clk_corediv_desc *desc = corediv->desc;
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u32 reg, div;
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reg = readl(corediv->reg + CORE_CLK_DIV_RATIO_OFFSET);
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@ -117,7 +117,7 @@ static int clk_corediv_set_rate(struct clk_hw *hwclk, unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_corediv *corediv = to_corediv_clk(hwclk);
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struct clk_corediv_desc *desc = &corediv->desc;
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const struct clk_corediv_desc *desc = corediv->desc;
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unsigned long flags = 0;
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u32 reg, div;
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@ -202,7 +202,7 @@ static void __init mvebu_corediv_clk_init(struct device_node *node)
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init.ops = &corediv_ops;
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init.flags = 0;
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corediv[i].desc = mvebu_corediv_desc[i];
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corediv[i].desc = mvebu_corediv_desc + i;
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corediv[i].reg = base;
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corediv[i].hw.init = &init;
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