[TG3]: Fix Phy loopback.
Phy loopback on most 10/100 devices need to be run in 1Gbps mode in GMII mode. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -8781,17 +8781,20 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
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tg3_writephy(tp, 0x10, phy & ~0x4000);
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tg3_writephy(tp, MII_TG3_EPHY_TEST, phytest);
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}
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}
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val = BMCR_LOOPBACK | BMCR_FULLDPLX;
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if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
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val |= BMCR_SPEED100;
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else
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val |= BMCR_SPEED1000;
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val = BMCR_LOOPBACK | BMCR_FULLDPLX | BMCR_SPEED100;
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} else
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val = BMCR_LOOPBACK | BMCR_FULLDPLX | BMCR_SPEED1000;
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tg3_writephy(tp, MII_BMCR, val);
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udelay(40);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
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mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
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MAC_MODE_LINK_POLARITY;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
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tg3_writephy(tp, MII_TG3_EPHY_PTEST, 0x1800);
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mac_mode |= MAC_MODE_PORT_MODE_MII;
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} else
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mac_mode |= MAC_MODE_PORT_MODE_GMII;
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/* reset to prevent losing 1st rx packet intermittently */
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if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
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@ -8799,12 +8802,6 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
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udelay(10);
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tw32_f(MAC_RX_MODE, tp->rx_mode);
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}
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mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
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MAC_MODE_LINK_POLARITY;
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if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
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mac_mode |= MAC_MODE_PORT_MODE_MII;
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else
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mac_mode |= MAC_MODE_PORT_MODE_GMII;
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if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
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mac_mode &= ~MAC_MODE_LINK_POLARITY;
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tg3_writephy(tp, MII_TG3_EXT_CTRL,
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