Linux 6.5-rc4
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmTGxtMeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGy2kH/RUepcJdCEQT2XGz NnHQ7NMKNnkcGLZq0yIgxHnGtu0KWSjb+LxBtd1un0nuVuSnSgGesJFH/B4uY2hq veXHMlyfCPCKLvYziOegMoUBiLR3d7K6urP9XAhAKX5gz9zn3ciZ13W7N9Qdf3Qx 2t0kdT7guv5Ki5u7o+Pylzsbz9wKgIngY1ncfPqWQOaS/McZ58keAjU0z/mVaFQ4 Wanc18dzawpceybqXb6qgCg+khZl6we2Mkl872ANYwAzvOzlVmrenWzM+7jBQvHw DD82KXTwq4lcf1xp7fTKrWdXOTcfyREmXu+Nuazqu5KkcQ9aY7GMi9O5JtjR1PaQ EXCNR3w= =0UH2 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmTG5ckACgkQJNaLcl1U h9DGwwf8DyvfdSERxCgH/EsBA4qjjdZGBl5mnrdhZF/8u4wHh3+2wIwPKw2D/Y61 dvt0iJSUHD+BCEPc4/SMuQKsn8Kwsei8YHIXAGp40mimTKj6i3amXLBzXQ5MVxbc Sw+Kn2p5m25N0sNOgxyHJSZ1seRFiJbSnTpSuFEngkSokQ6EGUG6V7OHKPW9yBZu kidxt/6URTheWl3EN+TqB+pQ/7zDggjy7dBkk0+F7cnaLA+iTBnn6HDL0ww2M5Aj Wv/04M8BYr7li/+ShmD7dZjglzrwt3dKakX+2Icg1QxKrrAK3/tciHR5+pnBjtZG mWUUUjTZSB/QQkr6iBPbqz4jN4bs8g== =6xVt -----END PGP SIGNATURE----- regmap: Merge up fixes from Linus' tree Gets us pine64plus back if nothing else.
This commit is contained in:
commit
5d481ddb6a
97
.mailmap
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.mailmap
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@ -13,7 +13,9 @@
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Aaron Durbin <adurbin@google.com>
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Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>
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Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>
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Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>
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Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>
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Ahmad Masri <quic_amasri@quicinc.com> <amasri@codeaurora.org>
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Adam Oldham <oldhamca@gmail.com>
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Adam Radford <aradford@gmail.com>
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Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com>
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@ -30,6 +32,7 @@ Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo
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Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
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Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
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Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>
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Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
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Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
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Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
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Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
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@ -37,8 +40,11 @@ Alex Hung <alexhung@gmail.com> <alex.hung@canonical.com>
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Alex Shi <alexs@kernel.org> <alex.shi@intel.com>
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Alex Shi <alexs@kernel.org> <alex.shi@linaro.org>
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Alex Shi <alexs@kernel.org> <alex.shi@linux.alibaba.com>
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Aloka Dixit <quic_alokad@quicinc.com> <alokad@codeaurora.org>
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Al Viro <viro@ftp.linux.org.uk>
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Al Viro <viro@zenIV.linux.org.uk>
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Amit Blay <quic_ablay@quicinc.com> <ablay@codeaurora.org>
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Amit Nischal <quic_anischal@quicinc.com> <anischal@codeaurora.org>
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Andi Kleen <ak@linux.intel.com> <ak@suse.de>
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Andi Shyti <andi@etezian.org> <andi.shyti@samsung.com>
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Andreas Herrmann <aherrman@de.ibm.com>
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@ -54,6 +60,8 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
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Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com>
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André Almeida <andrealmeid@igalia.com> <andrealmeid@collabora.com>
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Andy Adamson <andros@citi.umich.edu>
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Anilkumar Kolli <quic_akolli@quicinc.com> <akolli@codeaurora.org>
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Anirudh Ghayal <quic_aghayal@quicinc.com> <aghayal@codeaurora.org>
|
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Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
|
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Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>
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Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
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@ -62,9 +70,17 @@ Archit Taneja <archit@ti.com>
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Ard Biesheuvel <ardb@kernel.org> <ard.biesheuvel@linaro.org>
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Arnaud Patard <arnaud.patard@rtp-net.org>
|
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Arnd Bergmann <arnd@arndb.de>
|
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Arun Kumar Neelakantam <quic_aneela@quicinc.com> <aneela@codeaurora.org>
|
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Ashok Raj Nagarajan <quic_arnagara@quicinc.com> <arnagara@codeaurora.org>
|
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Ashwin Chaugule <quic_ashwinc@quicinc.com> <ashwinc@codeaurora.org>
|
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Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org>
|
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Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
|
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Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>
|
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Axel Dyks <xl@xlsigned.net>
|
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Axel Lin <axel.lin@gmail.com>
|
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Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org>
|
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Banajit Goswami <quic_bgoswami@quicinc.com> <bgoswami@codeaurora.org>
|
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Baochen Qiang <quic_bqiang@quicinc.com> <bqiang@codeaurora.org>
|
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Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org>
|
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Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>
|
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Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>
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@ -93,12 +109,15 @@ Brian Avery <b.avery@hp.com>
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Brian King <brking@us.ibm.com>
|
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Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
|
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Cai Huoqing <cai.huoqing@linux.dev> <caihuoqing@baidu.com>
|
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Can Guo <quic_cang@quicinc.com> <cang@codeaurora.org>
|
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Carl Huang <quic_cjhuang@quicinc.com> <cjhuang@codeaurora.org>
|
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Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
|
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Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
|
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Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
|
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Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
|
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Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com>
|
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Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org>
|
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Chris Lew <quic_clew@quicinc.com> <clew@codeaurora.org>
|
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Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com>
|
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Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com>
|
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Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com>
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@ -119,7 +138,10 @@ Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
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Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
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Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
|
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David Brownell <david-b@pacbell.net>
|
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David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
|
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David Woodhouse <dwmw2@shinybook.infradead.org>
|
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Dedy Lansky <quic_dlansky@quicinc.com> <dlansky@codeaurora.org>
|
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Deepak Kumar Singh <quic_deesin@quicinc.com> <deesin@codeaurora.org>
|
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Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com>
|
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Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com>
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Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com>
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@ -136,6 +158,7 @@ Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>
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Domen Puncer <domen@coderock.org>
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Douglas Gilbert <dougg@torque.net>
|
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Ed L. Cashin <ecashin@coraid.com>
|
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Elliot Berman <quic_eberman@quicinc.com> <eberman@codeaurora.org>
|
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Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com>
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Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>
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Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
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@ -148,6 +171,7 @@ Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@collabora.com>
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Felipe W Damasio <felipewd@terra.com.br>
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Felix Kuhling <fxkuehl@gmx.de>
|
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Felix Moeller <felix@derklecks.de>
|
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Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org>
|
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Filipe Lautert <filipe@icewall.org>
|
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Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au>
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Franck Bui-Huu <vagabon.xyz@gmail.com>
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@ -171,8 +195,11 @@ Greg Kurz <groug@kaod.org> <gkurz@linux.vnet.ibm.com>
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Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
|
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Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@linux.vnet.ibm.com>
|
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Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@canonical.com>
|
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Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> <gokulsri@codeaurora.org>
|
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Govindaraj Saminathan <quic_gsamin@quicinc.com> <gsamin@codeaurora.org>
|
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Guo Ren <guoren@kernel.org> <guoren@linux.alibaba.com>
|
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Guo Ren <guoren@kernel.org> <ren_guo@c-sky.com>
|
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Guru Das Srinagesh <quic_gurus@quicinc.com> <gurus@codeaurora.org>
|
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Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
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Gustavo Padovan <padovan@profusion.mobi>
|
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Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>
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@ -190,6 +217,7 @@ Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>
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J. Bruce Fields <bfields@fieldses.org> <bfields@redhat.com>
|
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J. Bruce Fields <bfields@fieldses.org> <bfields@citi.umich.edu>
|
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Jacob Shin <Jacob.Shin@amd.com>
|
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Jack Pham <quic_jackp@quicinc.com> <jackp@codeaurora.org>
|
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Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@google.com>
|
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Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk.kim@samsung.com>
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Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@motorola.com>
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@ -217,10 +245,12 @@ Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>
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Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>
|
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<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>
|
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Jean Tourrilhes <jt@hpl.hp.com>
|
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Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org>
|
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Jeff Garzik <jgarzik@pretzel.yyz.us>
|
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Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net>
|
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Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com>
|
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Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com>
|
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Jeffrey Hugo <quic_jhugo@quicinc.com> <jhugo@codeaurora.org>
|
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Jens Axboe <axboe@kernel.dk> <axboe@suse.de>
|
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Jens Axboe <axboe@kernel.dk> <jens.axboe@oracle.com>
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Jens Axboe <axboe@kernel.dk> <axboe@fb.com>
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@ -228,6 +258,7 @@ Jens Axboe <axboe@kernel.dk> <axboe@meta.com>
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Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
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Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
|
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Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org>
|
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Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>
|
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Jiri Pirko <jiri@resnulli.us> <jiri@nvidia.com>
|
||||
Jiri Pirko <jiri@resnulli.us> <jiri@mellanox.com>
|
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Jiri Pirko <jiri@resnulli.us> <jpirko@redhat.com>
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@ -238,6 +269,7 @@ Jiri Slaby <jirislaby@kernel.org> <jslaby@suse.cz>
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Jiri Slaby <jirislaby@kernel.org> <xslaby@fi.muni.cz>
|
||||
Jisheng Zhang <jszhang@kernel.org> <jszhang@marvell.com>
|
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Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com>
|
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Jishnu Prakash <quic_jprakash@quicinc.com> <jprakash@codeaurora.org>
|
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Johan Hovold <johan@kernel.org> <jhovold@gmail.com>
|
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Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
|
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John Crispin <john@phrozen.org> <blogic@openwrt.org>
|
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@ -256,6 +288,7 @@ Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
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<josh@joshtriplett.org> <josht@vnet.ibm.com>
|
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Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@redhat.com>
|
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Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@us.ibm.com>
|
||||
Jouni Malinen <quic_jouni@quicinc.com> <jouni@codeaurora.org>
|
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Juha Yrjola <at solidboot.com>
|
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Juha Yrjola <juha.yrjola@nokia.com>
|
||||
Juha Yrjola <juha.yrjola@solidboot.com>
|
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@ -263,6 +296,8 @@ Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
|
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Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
|
||||
Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
|
||||
Kalyan Thota <quic_kalyant@quicinc.com> <kalyan_t@codeaurora.org>
|
||||
Karthikeyan Periyasamy <quic_periyasa@quicinc.com> <periyasa@codeaurora.org>
|
||||
Kathiravan T <quic_kathirav@quicinc.com> <kathirav@codeaurora.org>
|
||||
Kay Sievers <kay.sievers@vrfy.org>
|
||||
Kees Cook <keescook@chromium.org> <kees.cook@canonical.com>
|
||||
Kees Cook <keescook@chromium.org> <keescook@google.com>
|
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@ -271,6 +306,8 @@ Kees Cook <keescook@chromium.org> <kees@ubuntu.com>
|
|||
Keith Busch <kbusch@kernel.org> <keith.busch@intel.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@linux.intel.com>
|
||||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org>
|
||||
Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org>
|
||||
Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
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@ -279,6 +316,7 @@ Krishna Manikandan <quic_mkrishn@quicinc.com> <mkrishn@codeaurora.org>
|
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Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@canonical.com>
|
||||
Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
Kuogee Hsieh <quic_khsieh@quicinc.com> <khsieh@codeaurora.org>
|
||||
Lee Jones <lee@kernel.org> <joneslee@google.com>
|
||||
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@ -292,19 +330,27 @@ Leonid I Ananiev <leonid.i.ananiev@intel.com>
|
|||
Leon Romanovsky <leon@kernel.org> <leon@leon.nu>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@nvidia.com>
|
||||
Liam Mark <quic_lmark@quicinc.com> <lmark@codeaurora.org>
|
||||
Linas Vepstas <linas@austin.ibm.com>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
|
||||
<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
|
||||
Lior David <quic_liord@quicinc.com> <liord@codeaurora.org>
|
||||
Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>
|
||||
Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
|
||||
Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
|
||||
Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>
|
||||
Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
|
||||
Maciej W. Rozycki <macro@orcam.me.uk> <macro@linux-mips.org>
|
||||
Maharaja Kennadyrajan <quic_mkenna@quicinc.com> <mkenna@codeaurora.org>
|
||||
Maheshwar Ajja <quic_majja@quicinc.com> <majja@codeaurora.org>
|
||||
Malathi Gottam <quic_mgottam@quicinc.com> <mgottam@codeaurora.org>
|
||||
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> <mpubbise@codeaurora.org>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannanece23@gmail.com>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannan.sadhasivam@linaro.org>
|
||||
Manoj Basapathi <quic_manojbm@quicinc.com> <manojbm@codeaurora.org>
|
||||
Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
|
||||
Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Marek Behún <kabel@kernel.org> <marek.behun@nic.cz>
|
||||
|
@ -334,6 +380,7 @@ Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
|
|||
Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com>
|
||||
Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com>
|
||||
Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com>
|
||||
Maulik Shah <quic_mkshah@quicinc.com> <mkshah@codeaurora.org>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@infradead.org>
|
||||
|
@ -346,7 +393,10 @@ Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@nvidia.com>
|
|||
Maxime Ripard <mripard@kernel.org> <maxime@cerno.tech>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
|
||||
Maya Erez <quic_merez@quicinc.com> <merez@codeaurora.org>
|
||||
Mayuresh Janorkar <mayur@ti.com>
|
||||
Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org>
|
||||
Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org>
|
||||
Michael Buesch <m@bues.ch>
|
||||
Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
|
||||
Michel Dänzer <michel@tungstengraphics.com>
|
||||
|
@ -357,6 +407,7 @@ Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com>
|
|||
Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
|
||||
Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
|
||||
Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>
|
||||
Mike Tipton <quic_mdtipton@quicinc.com> <mdtipton@codeaurora.org>
|
||||
Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
|
||||
Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>
|
||||
Mitesh shah <mshah@teja.com>
|
||||
|
@ -365,9 +416,13 @@ Morten Welinder <terra@gnome.org>
|
|||
Morten Welinder <welinder@anemone.rentec.com>
|
||||
Morten Welinder <welinder@darter.rentec.com>
|
||||
Morten Welinder <welinder@troll.com>
|
||||
Mukesh Ojha <quic_mojha@quicinc.com> <mojha@codeaurora.org>
|
||||
Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org>
|
||||
Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org>
|
||||
Mythri P K <mythripk@ti.com>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de>
|
||||
|
@ -386,6 +441,7 @@ Nikolay Aleksandrov <razor@blackwall.org> <nikolay@redhat.com>
|
|||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com>
|
||||
Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org>
|
||||
Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
|
||||
|
@ -393,6 +449,7 @@ Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>
|
|||
Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
|
||||
Oliver Upton <oliver.upton@linux.dev> <oupton@google.com>
|
||||
Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org>
|
||||
Pali Rohár <pali@kernel.org> <pali.rohar@gmail.com>
|
||||
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
|
||||
Patrick Mochel <mochel@digitalimplant.org>
|
||||
|
@ -404,11 +461,14 @@ Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.vnet.ibm.com>
|
|||
Paul E. McKenney <paulmck@kernel.org> <paulmck@us.ibm.com>
|
||||
Paul Mackerras <paulus@ozlabs.org> <paulus@samba.org>
|
||||
Paul Mackerras <paulus@ozlabs.org> <paulus@au1.ibm.com>
|
||||
Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org>
|
||||
Peter A Jonsson <pj@ludd.ltu.se>
|
||||
Peter Oruba <peter.oruba@amd.com>
|
||||
Peter Oruba <peter@oruba.de>
|
||||
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
|
||||
Praveen BP <praveenbp@ti.com>
|
||||
Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> <pradeepc@codeaurora.org>
|
||||
Prasad Sodagudi <quic_psodagud@quicinc.com> <psodagud@codeaurora.org>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@imgtec.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com>
|
||||
|
@ -417,10 +477,16 @@ Quentin Perret <qperret@qperret.net> <quentin.perret@arm.com>
|
|||
Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl>
|
||||
Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org>
|
||||
Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org>
|
||||
Rajeshwari Ravindra Kamble <quic_rkambl@quicinc.com> <rkambl@codeaurora.org>
|
||||
Raju P.L.S.S.S.N <quic_rplsssn@quicinc.com> <rplsssn@codeaurora.org>
|
||||
Rajesh Shah <rajesh.shah@intel.com>
|
||||
Rakesh Pillai <quic_pillair@quicinc.com> <pillair@codeaurora.org>
|
||||
Ralf Baechle <ralf@linux-mips.org>
|
||||
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
||||
Ram Chandra Jangir <quic_rjangir@quicinc.com> <rjangir@codeaurora.org>
|
||||
Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net>
|
||||
Ravi Kumar Bokka <quic_rbokka@quicinc.com> <rbokka@codeaurora.org>
|
||||
Ravi Kumar Siddojigari <quic_rsiddoji@quicinc.com> <rsiddoji@codeaurora.org>
|
||||
Rémi Denis-Courmont <rdenis@simphalempin.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
|
@ -429,6 +495,7 @@ Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
|||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
|
||||
Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>
|
||||
|
@ -446,24 +513,35 @@ Santosh Shilimkar <santosh.shilimkar@oracle.org>
|
|||
Santosh Shilimkar <ssantosh@kernel.org>
|
||||
Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sascha Hauer <s.hauer@pengutronix.de>
|
||||
Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org>
|
||||
Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
|
||||
Satya Priya <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
|
||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||
Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org>
|
||||
Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
|
||||
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
|
||||
Sean Tranchetti <quic_stranche@quicinc.com> <stranche@codeaurora.org>
|
||||
Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk>
|
||||
Sebastian Reichel <sre@kernel.org> <sre@debian.org>
|
||||
Sedat Dilek <sedat.dilek@gmail.com> <sedat.dilek@credativ.de>
|
||||
Senthilkumar N L <quic_snlakshm@quicinc.com> <snlakshm@codeaurora.org>
|
||||
Seth Forshee <sforshee@kernel.org> <seth.forshee@canonical.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <snelson@pensando.io>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@intel.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@oracle.com>
|
||||
Sharath Chandra Vurukala <quic_sharathv@quicinc.com> <sharathv@codeaurora.org>
|
||||
Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
|
||||
Sibi Sankar <quic_sibis@quicinc.com> <sibis@codeaurora.org>
|
||||
Sid Manning <quic_sidneym@quicinc.com> <sidneym@codeaurora.org>
|
||||
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
|
||||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>
|
||||
Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
|
||||
Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@osdl.org>
|
||||
|
@ -471,22 +549,30 @@ Stephen Hemminger <stephen@networkplumber.org> <sthemmin@microsoft.com>
|
|||
Stephen Hemminger <stephen@networkplumber.org> <sthemmin@vyatta.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>
|
||||
Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
|
||||
Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com> <subashab@codeaurora.org>
|
||||
Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> <subbaram@codeaurora.org>
|
||||
Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org>
|
||||
Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
|
||||
Sumit Semwal <sumit.semwal@ti.com>
|
||||
Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
|
||||
Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
|
||||
Tejun Heo <htejun@gmail.com>
|
||||
Thomas Graf <tgraf@suug.ch>
|
||||
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
|
||||
Thomas Pedersen <twp@codeaurora.org>
|
||||
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
|
||||
Tingwei Zhang <quic_tingwei@quicinc.com> <tingwei@codeaurora.org>
|
||||
Tirupathi Reddy <quic_tirupath@quicinc.com> <tirupath@codeaurora.org>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tobias.klauser@gmail.com>
|
||||
Tobias Klauser <tklauser@distanz.ch> <klto@zhaw.ch>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tklauser@nuerscht.ch>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tklauser@xenon.tklauser.home>
|
||||
Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org>
|
||||
Tony Luck <tony.luck@intel.com>
|
||||
Trilok Soni <quic_tsoni@quicinc.com> <tsoni@codeaurora.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
|
||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||
|
@ -499,11 +585,17 @@ Uwe Kleine-König <ukleinek@strlen.de>
|
|||
Uwe Kleine-König <ukl@pengutronix.de>
|
||||
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
|
||||
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
||||
Vara Reddy <quic_varar@quicinc.com> <varar@codeaurora.org>
|
||||
Varadarajan Narayanan <quic_varada@quicinc.com> <varada@codeaurora.org>
|
||||
Vasanthakumar Thiagarajan <quic_vthiagar@quicinc.com> <vthiagar@codeaurora.org>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@virtuozzo.com>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@openvz.org>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@parallels.com>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@sw.ru>
|
||||
Valentin Schneider <vschneid@redhat.com> <valentin.schneider@arm.com>
|
||||
Veera Sundaram Sankaran <quic_veeras@quicinc.com> <veeras@codeaurora.org>
|
||||
Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> <vbadigan@codeaurora.org>
|
||||
Venkateswara Naralasetty <quic_vnaralas@quicinc.com> <vnaralas@codeaurora.org>
|
||||
Vikash Garodia <quic_vgarodia@quicinc.com> <vgarodia@codeaurora.org>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@intel.com>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@linux.intel.com>
|
||||
|
@ -513,11 +605,14 @@ Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
|||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com>
|
||||
Vivek Aknurwar <quic_viveka@quicinc.com> <viveka@codeaurora.org>
|
||||
Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com>
|
||||
Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
|
||||
WeiXiong Liao <gmpy.liaowx@gmail.com> <liaoweixiong@allwinnertech.com>
|
||||
Wen Gong <quic_wgong@quicinc.com> <wgong@codeaurora.org>
|
||||
Wesley Cheng <quic_wcheng@quicinc.com> <wcheng@codeaurora.org>
|
||||
Will Deacon <will@kernel.org> <will.deacon@arm.com>
|
||||
Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de>
|
||||
Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
|
||||
|
|
|
@ -60,3 +60,14 @@ Description: Module taint flags:
|
|||
C staging driver module
|
||||
E unsigned module
|
||||
== =====================
|
||||
|
||||
What: /sys/module/grant_table/parameters/free_per_iteration
|
||||
Date: July 2023
|
||||
KernelVersion: 6.5 but backported to all supported stable branches
|
||||
Contact: Xen developer discussion <xen-devel@lists.xenproject.org>
|
||||
Description: Read and write number of grant entries to attempt to free per iteration.
|
||||
|
||||
Note: Future versions of Xen and Linux may provide a better
|
||||
interface for controlling the rate of deferred grant reclaim
|
||||
or may not need it at all.
|
||||
Users: Qubes OS (https://www.qubes-os.org)
|
||||
|
|
|
@ -2691,7 +2691,7 @@
|
|||
45 = /dev/ttyMM1 Marvell MPSC - port 1 (obsolete unused)
|
||||
46 = /dev/ttyCPM0 PPC CPM (SCC or SMC) - port 0
|
||||
...
|
||||
47 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 5
|
||||
49 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 3
|
||||
50 = /dev/ttyIOC0 Altix serial card
|
||||
...
|
||||
81 = /dev/ttyIOC31 Altix serial card
|
||||
|
|
|
@ -484,11 +484,14 @@ Spectre variant 2
|
|||
|
||||
Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at
|
||||
boot, by setting the IBRS bit, and they're automatically protected against
|
||||
Spectre v2 variant attacks, including cross-thread branch target injections
|
||||
on SMT systems (STIBP). In other words, eIBRS enables STIBP too.
|
||||
Spectre v2 variant attacks.
|
||||
|
||||
Legacy IBRS systems clear the IBRS bit on exit to userspace and
|
||||
therefore explicitly enable STIBP for that
|
||||
On Intel's enhanced IBRS systems, this includes cross-thread branch target
|
||||
injections on SMT systems (STIBP). In other words, Intel eIBRS enables
|
||||
STIBP, too.
|
||||
|
||||
AMD Automatic IBRS does not protect userspace, and Legacy IBRS systems clear
|
||||
the IBRS bit on exit to userspace, therefore both explicitly enable STIBP.
|
||||
|
||||
The retpoline mitigation is turned on by default on vulnerable
|
||||
CPUs. It can be forced on or off by the administrator
|
||||
|
|
|
@ -148,6 +148,9 @@ stable kernels.
|
|||
| ARM | MMU-700 | #2268618,2812531| N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
|
||||
|
|
|
@ -84,8 +84,6 @@ nr_inodes The maximum number of inodes for this instance. The default
|
|||
is half of the number of your physical RAM pages, or (on a
|
||||
machine with highmem) the number of lowmem RAM pages,
|
||||
whichever is the lower.
|
||||
noswap Disables swap. Remounts must respect the original settings.
|
||||
By default swap is enabled.
|
||||
========= ============================================================
|
||||
|
||||
These parameters accept a suffix k, m or g for kilo, mega and giga and
|
||||
|
@ -99,36 +97,31 @@ mount with such options, since it allows any user with write access to
|
|||
use up all the memory on the machine; but enhances the scalability of
|
||||
that instance in a system with many CPUs making intensive use of it.
|
||||
|
||||
tmpfs blocks may be swapped out, when there is a shortage of memory.
|
||||
tmpfs has a mount option to disable its use of swap:
|
||||
|
||||
====== ===========================================================
|
||||
noswap Disables swap. Remounts must respect the original settings.
|
||||
By default swap is enabled.
|
||||
====== ===========================================================
|
||||
|
||||
tmpfs also supports Transparent Huge Pages which requires a kernel
|
||||
configured with CONFIG_TRANSPARENT_HUGEPAGE and with huge supported for
|
||||
your system (has_transparent_hugepage(), which is architecture specific).
|
||||
The mount options for this are:
|
||||
|
||||
====== ============================================================
|
||||
huge=0 never: disables huge pages for the mount
|
||||
huge=1 always: enables huge pages for the mount
|
||||
huge=2 within_size: only allocate huge pages if the page will be
|
||||
fully within i_size, also respect fadvise()/madvise() hints.
|
||||
huge=3 advise: only allocate huge pages if requested with
|
||||
fadvise()/madvise()
|
||||
====== ============================================================
|
||||
================ ==============================================================
|
||||
huge=never Do not allocate huge pages. This is the default.
|
||||
huge=always Attempt to allocate huge page every time a new page is needed.
|
||||
huge=within_size Only allocate huge page if it will be fully within i_size.
|
||||
Also respect madvise(2) hints.
|
||||
huge=advise Only allocate huge page if requested with madvise(2).
|
||||
================ ==============================================================
|
||||
|
||||
There is a sysfs file which you can also use to control system wide THP
|
||||
configuration for all tmpfs mounts, the file is:
|
||||
|
||||
/sys/kernel/mm/transparent_hugepage/shmem_enabled
|
||||
|
||||
This sysfs file is placed on top of THP sysfs directory and so is registered
|
||||
by THP code. It is however only used to control all tmpfs mounts with one
|
||||
single knob. Since it controls all tmpfs mounts it should only be used either
|
||||
for emergency or testing purposes. The values you can set for shmem_enabled are:
|
||||
|
||||
== ============================================================
|
||||
-1 deny: disables huge on shm_mnt and all mounts, for
|
||||
emergency use
|
||||
-2 force: enables huge on shm_mnt and all mounts, w/o needing
|
||||
option, for testing
|
||||
== ============================================================
|
||||
See also Documentation/admin-guide/mm/transhuge.rst, which describes the
|
||||
sysfs file /sys/kernel/mm/transparent_hugepage/shmem_enabled: which can
|
||||
be used to deny huge pages on all tmpfs mounts in an emergency, or to
|
||||
force huge pages on all tmpfs mounts for testing.
|
||||
|
||||
tmpfs has a mount option to set the NUMA memory allocation policy for
|
||||
all files in that instance (if CONFIG_NUMA is enabled) - which can be
|
||||
|
|
|
@ -65,15 +65,16 @@ argument - drivers can process completions for any number of Tx
|
|||
packets but should only process up to ``budget`` number of
|
||||
Rx packets. Rx processing is usually much more expensive.
|
||||
|
||||
In other words, it is recommended to ignore the budget argument when
|
||||
performing TX buffer reclamation to ensure that the reclamation is not
|
||||
arbitrarily bounded; however, it is required to honor the budget argument
|
||||
for RX processing.
|
||||
In other words for Rx processing the ``budget`` argument limits how many
|
||||
packets driver can process in a single poll. Rx specific APIs like page
|
||||
pool or XDP cannot be used at all when ``budget`` is 0.
|
||||
skb Tx processing should happen regardless of the ``budget``, but if
|
||||
the argument is 0 driver cannot call any XDP (or page pool) APIs.
|
||||
|
||||
.. warning::
|
||||
|
||||
The ``budget`` argument may be 0 if core tries to only process Tx completions
|
||||
and no Rx packets.
|
||||
The ``budget`` argument may be 0 if core tries to only process
|
||||
skb Tx completions and no Rx or XDP packets.
|
||||
|
||||
The poll method returns the amount of work done. If the driver still
|
||||
has outstanding work to do (e.g. ``budget`` was exhausted)
|
||||
|
|
|
@ -254,7 +254,6 @@ an involved disclosed party. The current ambassadors list:
|
|||
Samsung Javier González <javier.gonz@samsung.com>
|
||||
|
||||
Microsoft James Morris <jamorris@linux.microsoft.com>
|
||||
VMware
|
||||
Xen Andrew Cooper <andrew.cooper3@citrix.com>
|
||||
|
||||
Canonical John Johansen <john.johansen@canonical.com>
|
||||
|
@ -263,10 +262,8 @@ an involved disclosed party. The current ambassadors list:
|
|||
Red Hat Josh Poimboeuf <jpoimboe@redhat.com>
|
||||
SUSE Jiri Kosina <jkosina@suse.cz>
|
||||
|
||||
Amazon
|
||||
Google Kees Cook <keescook@chromium.org>
|
||||
|
||||
GCC
|
||||
LLVM Nick Desaulniers <ndesaulniers@google.com>
|
||||
============= ========================================================
|
||||
|
||||
|
|
|
@ -63,31 +63,28 @@ information submitted to the security list and any followup discussions
|
|||
of the report are treated confidentially even after the embargo has been
|
||||
lifted, in perpetuity.
|
||||
|
||||
Coordination
|
||||
------------
|
||||
Coordination with other groups
|
||||
------------------------------
|
||||
|
||||
Fixes for sensitive bugs, such as those that might lead to privilege
|
||||
escalations, may need to be coordinated with the private
|
||||
<linux-distros@vs.openwall.org> mailing list so that distribution vendors
|
||||
are well prepared to issue a fixed kernel upon public disclosure of the
|
||||
upstream fix. Distros will need some time to test the proposed patch and
|
||||
will generally request at least a few days of embargo, and vendor update
|
||||
publication prefers to happen Tuesday through Thursday. When appropriate,
|
||||
the security team can assist with this coordination, or the reporter can
|
||||
include linux-distros from the start. In this case, remember to prefix
|
||||
the email Subject line with "[vs]" as described in the linux-distros wiki:
|
||||
<http://oss-security.openwall.org/wiki/mailing-lists/distros#how-to-use-the-lists>
|
||||
The kernel security team strongly recommends that reporters of potential
|
||||
security issues NEVER contact the "linux-distros" mailing list until
|
||||
AFTER discussing it with the kernel security team. Do not Cc: both
|
||||
lists at once. You may contact the linux-distros mailing list after a
|
||||
fix has been agreed on and you fully understand the requirements that
|
||||
doing so will impose on you and the kernel community.
|
||||
|
||||
The different lists have different goals and the linux-distros rules do
|
||||
not contribute to actually fixing any potential security problems.
|
||||
|
||||
CVE assignment
|
||||
--------------
|
||||
|
||||
The security team does not normally assign CVEs, nor do we require them
|
||||
for reports or fixes, as this can needlessly complicate the process and
|
||||
may delay the bug handling. If a reporter wishes to have a CVE identifier
|
||||
assigned ahead of public disclosure, they will need to contact the private
|
||||
linux-distros list, described above. When such a CVE identifier is known
|
||||
before a patch is provided, it is desirable to mention it in the commit
|
||||
message if the reporter agrees.
|
||||
The security team does not assign CVEs, nor do we require them for
|
||||
reports or fixes, as this can needlessly complicate the process and may
|
||||
delay the bug handling. If a reporter wishes to have a CVE identifier
|
||||
assigned, they should find one by themselves, for example by contacting
|
||||
MITRE directly. However under no circumstances will a patch inclusion
|
||||
be delayed to wait for a CVE identifier to arrive.
|
||||
|
||||
Non-disclosure agreements
|
||||
-------------------------
|
||||
|
|
11
MAINTAINERS
11
MAINTAINERS
|
@ -4463,7 +4463,6 @@ CADENCE USB3 DRD IP DRIVER
|
|||
M: Peter Chen <peter.chen@kernel.org>
|
||||
M: Pawel Laszczak <pawell@cadence.com>
|
||||
R: Roger Quadros <rogerq@kernel.org>
|
||||
R: Aswath Govindraju <a-govindraju@ti.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
|
||||
|
@ -5149,10 +5148,12 @@ S: Maintained
|
|||
F: include/linux/compiler_attributes.h
|
||||
|
||||
COMPUTE EXPRESS LINK (CXL)
|
||||
M: Davidlohr Bueso <dave@stgolabs.net>
|
||||
M: Jonathan Cameron <jonathan.cameron@huawei.com>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
M: Alison Schofield <alison.schofield@intel.com>
|
||||
M: Vishal Verma <vishal.l.verma@intel.com>
|
||||
M: Ira Weiny <ira.weiny@intel.com>
|
||||
M: Ben Widawsky <bwidawsk@kernel.org>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
L: linux-cxl@vger.kernel.org
|
||||
S: Maintained
|
||||
|
@ -21641,11 +21642,17 @@ F: Documentation/translations/zh_TW/
|
|||
TTY LAYER
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
M: Jiri Slaby <jirislaby@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-serial@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git
|
||||
F: Documentation/driver-api/serial/
|
||||
F: drivers/tty/
|
||||
F: drivers/tty/serial/serial_base.h
|
||||
F: drivers/tty/serial/serial_base_bus.c
|
||||
F: drivers/tty/serial/serial_core.c
|
||||
F: drivers/tty/serial/serial_ctrl.c
|
||||
F: drivers/tty/serial/serial_port.c
|
||||
F: include/linux/selection.h
|
||||
F: include/linux/serial.h
|
||||
F: include/linux/serial_core.h
|
||||
|
|
2
Makefile
2
Makefile
|
@ -2,7 +2,7 @@
|
|||
VERSION = 6
|
||||
PATCHLEVEL = 5
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -197,7 +197,7 @@ CONFIG_EXT2_FS=y
|
|||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=y
|
||||
CONFIG_FSCACHE=y
|
||||
|
|
|
@ -232,7 +232,7 @@ CONFIG_EXT2_FS=y
|
|||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -327,7 +327,7 @@ CONFIG_PWM_SAMSUNG=y
|
|||
CONFIG_PHY_EXYNOS5250_SATA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -94,7 +94,7 @@ CONFIG_LEDS_CLASS=y
|
|||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
|
|
|
@ -442,7 +442,7 @@ CONFIG_EXT3_FS_SECURITY=y
|
|||
CONFIG_QUOTA=y
|
||||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -207,7 +207,7 @@ CONFIG_RESET_TI_SYSCON=m
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
|
|
|
@ -162,7 +162,7 @@ CONFIG_MAX517=y
|
|||
CONFIG_PWM=y
|
||||
CONFIG_PWM_LPC32XX=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -81,7 +81,7 @@ CONFIG_SOC_BRCMSTB=y
|
|||
CONFIG_MEMORY=y
|
||||
# CONFIG_ARM_PMU is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
|
|
|
@ -1226,7 +1226,7 @@ CONFIG_COUNTER=m
|
|||
CONFIG_STM32_TIMER_CNT=m
|
||||
CONFIG_STM32_LPTIMER_CNT=m
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
|
|
|
@ -188,7 +188,7 @@ CONFIG_RTC_DRV_OMAP=y
|
|||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
|
|
|
@ -678,7 +678,7 @@ CONFIG_EXT4_FS_SECURITY=y
|
|||
CONFIG_FANOTIFY=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -589,7 +589,7 @@ CONFIG_REISERFS_FS_XATTR=y
|
|||
CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_FSCACHE=y
|
||||
|
|
|
@ -79,7 +79,7 @@ CONFIG_RTC_CLASS=y
|
|||
CONFIG_RTC_DRV_PCF8583=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
|
|
|
@ -103,7 +103,7 @@ CONFIG_PHY_SAMSUNG_USB2=m
|
|||
CONFIG_PHY_S5PV210_USB2=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -136,7 +136,7 @@ CONFIG_EXT2_FS=y
|
|||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_NTFS_RW=y
|
||||
|
|
|
@ -85,7 +85,7 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
|
|
|
@ -68,7 +68,7 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
|
||||
|
|
|
@ -54,7 +54,7 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
|
||||
|
|
|
@ -1469,7 +1469,7 @@ CONFIG_BTRFS_FS_POSIX_ACL=y
|
|||
CONFIG_FANOTIFY=y
|
||||
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_OVERLAY_FS=m
|
||||
|
|
|
@ -917,6 +917,8 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
|
|||
if (task == current)
|
||||
put_cpu_fpsimd_context();
|
||||
|
||||
task_set_vl(task, type, vl);
|
||||
|
||||
/*
|
||||
* Free the changed states if they are not in use, SME will be
|
||||
* reallocated to the correct size on next use and we just
|
||||
|
@ -931,8 +933,6 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
|
|||
if (free_sme)
|
||||
sme_free(task);
|
||||
|
||||
task_set_vl(task, type, vl);
|
||||
|
||||
out:
|
||||
update_tsk_thread_flag(task, vec_vl_inherit_flag(type),
|
||||
flags & PR_SVE_VL_INHERIT);
|
||||
|
@ -1666,7 +1666,6 @@ void fpsimd_flush_thread(void)
|
|||
|
||||
fpsimd_flush_thread_vl(ARM64_VEC_SME);
|
||||
current->thread.svcr = 0;
|
||||
sme_smstop();
|
||||
}
|
||||
|
||||
current->thread.fp_type = FP_STATE_FPSIMD;
|
||||
|
|
|
@ -77,7 +77,7 @@ CONFIG_EXT3_FS=y
|
|||
CONFIG_XFS_FS=y
|
||||
CONFIG_XFS_QUOTA=y
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_UDF_FS=m
|
||||
|
|
|
@ -146,7 +146,7 @@ CONFIG_REISERFS_FS_XATTR=y
|
|||
CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_UDF_FS=m
|
||||
|
|
|
@ -127,7 +127,7 @@ CONFIG_REISERFS_FS_XATTR=y
|
|||
CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_UDF_FS=m
|
||||
|
|
|
@ -110,7 +110,7 @@ CONFIG_REISERFS_FS_XATTR=y
|
|||
CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_UDF_FS=m
|
||||
|
|
|
@ -14,6 +14,7 @@ config LOONGARCH
|
|||
select ARCH_HAS_CPU_FINALIZE_INIT
|
||||
select ARCH_HAS_FORTIFY_SOURCE
|
||||
select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
|
||||
select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
|
||||
select ARCH_HAS_PTE_SPECIAL
|
||||
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
|
||||
select ARCH_INLINE_READ_LOCK if !PREEMPTION
|
||||
|
|
|
@ -68,6 +68,8 @@ LDFLAGS_vmlinux += -static -n -nostdlib
|
|||
ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS
|
||||
cflags-y += $(call cc-option,-mexplicit-relocs)
|
||||
KBUILD_CFLAGS_KERNEL += $(call cc-option,-mdirect-extern-access)
|
||||
KBUILD_AFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax)
|
||||
KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax)
|
||||
else
|
||||
cflags-y += $(call cc-option,-mno-explicit-relocs)
|
||||
KBUILD_AFLAGS_KERNEL += -Wa,-mla-global-with-pcrel
|
||||
|
@ -111,7 +113,7 @@ KBUILD_CFLAGS += -isystem $(shell $(CC) -print-file-name=include)
|
|||
|
||||
KBUILD_LDFLAGS += -m $(ld-emul)
|
||||
|
||||
ifdef CONFIG_LOONGARCH
|
||||
ifdef need-compiler
|
||||
CHECKFLAGS += $(shell $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
|
||||
grep -E -vw '__GNUC_(MINOR_|PATCHLEVEL_)?_' | \
|
||||
sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/" -e 's/\$$/&&/g')
|
||||
|
|
|
@ -769,7 +769,7 @@ CONFIG_QUOTA=y
|
|||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_QFMT_V1=m
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_OVERLAY_FS=y
|
||||
CONFIG_OVERLAY_FS_INDEX=y
|
||||
|
|
|
@ -218,15 +218,8 @@ static inline void restore_lsx(struct task_struct *t)
|
|||
|
||||
static inline void init_lsx_upper(void)
|
||||
{
|
||||
/*
|
||||
* Check cpu_has_lsx only if it's a constant. This will allow the
|
||||
* compiler to optimise out code for CPUs without LSX without adding
|
||||
* an extra redundant check for CPUs with LSX.
|
||||
*/
|
||||
if (__builtin_constant_p(cpu_has_lsx) && !cpu_has_lsx)
|
||||
return;
|
||||
|
||||
_init_lsx_upper();
|
||||
if (cpu_has_lsx)
|
||||
_init_lsx_upper();
|
||||
}
|
||||
|
||||
static inline void restore_lsx_upper(struct task_struct *t)
|
||||
|
@ -294,7 +287,7 @@ static inline void restore_lasx_upper(struct task_struct *t) {}
|
|||
|
||||
static inline int thread_lsx_context_live(void)
|
||||
{
|
||||
if (__builtin_constant_p(cpu_has_lsx) && !cpu_has_lsx)
|
||||
if (!cpu_has_lsx)
|
||||
return 0;
|
||||
|
||||
return test_thread_flag(TIF_LSX_CTX_LIVE);
|
||||
|
@ -302,7 +295,7 @@ static inline int thread_lsx_context_live(void)
|
|||
|
||||
static inline int thread_lasx_context_live(void)
|
||||
{
|
||||
if (__builtin_constant_p(cpu_has_lasx) && !cpu_has_lasx)
|
||||
if (!cpu_has_lasx)
|
||||
return 0;
|
||||
|
||||
return test_thread_flag(TIF_LASX_CTX_LIVE);
|
||||
|
|
|
@ -332,9 +332,25 @@ static void __init bootcmdline_init(char **cmdline_p)
|
|||
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
|
||||
|
||||
strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE);
|
||||
goto out;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Append built-in command line to the bootloader command line if
|
||||
* CONFIG_CMDLINE_EXTEND is enabled.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_CMDLINE_EXTEND) && CONFIG_CMDLINE[0]) {
|
||||
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
|
||||
strlcat(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
|
||||
}
|
||||
|
||||
/*
|
||||
* Use built-in command line if the bootloader command line is empty.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_CMDLINE_BOOTLOADER) && !boot_command_line[0])
|
||||
strscpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
|
||||
|
||||
out:
|
||||
*cmdline_p = boot_command_line;
|
||||
}
|
||||
|
|
|
@ -108,6 +108,7 @@ SYM_FUNC_START(__clear_user_fast)
|
|||
addi.d a3, a2, -8
|
||||
bgeu a0, a3, .Llt8
|
||||
15: st.d zero, a0, 0
|
||||
addi.d a0, a0, 8
|
||||
|
||||
.Llt8:
|
||||
16: st.d zero, a2, -8
|
||||
|
@ -188,7 +189,7 @@ SYM_FUNC_START(__clear_user_fast)
|
|||
_asm_extable 13b, .L_fixup_handle_0
|
||||
_asm_extable 14b, .L_fixup_handle_1
|
||||
_asm_extable 15b, .L_fixup_handle_0
|
||||
_asm_extable 16b, .L_fixup_handle_1
|
||||
_asm_extable 16b, .L_fixup_handle_0
|
||||
_asm_extable 17b, .L_fixup_handle_s0
|
||||
_asm_extable 18b, .L_fixup_handle_s0
|
||||
_asm_extable 19b, .L_fixup_handle_s0
|
||||
|
|
|
@ -136,6 +136,7 @@ SYM_FUNC_START(__copy_user_fast)
|
|||
bgeu a1, a4, .Llt8
|
||||
30: ld.d t0, a1, 0
|
||||
31: st.d t0, a0, 0
|
||||
addi.d a0, a0, 8
|
||||
|
||||
.Llt8:
|
||||
32: ld.d t0, a3, -8
|
||||
|
@ -246,7 +247,7 @@ SYM_FUNC_START(__copy_user_fast)
|
|||
_asm_extable 30b, .L_fixup_handle_0
|
||||
_asm_extable 31b, .L_fixup_handle_0
|
||||
_asm_extable 32b, .L_fixup_handle_0
|
||||
_asm_extable 33b, .L_fixup_handle_1
|
||||
_asm_extable 33b, .L_fixup_handle_0
|
||||
_asm_extable 34b, .L_fixup_handle_s0
|
||||
_asm_extable 35b, .L_fixup_handle_s0
|
||||
_asm_extable 36b, .L_fixup_handle_s0
|
||||
|
|
|
@ -150,7 +150,7 @@ static inline void move_imm(struct jit_ctx *ctx, enum loongarch_gpr rd, long imm
|
|||
* no need to call lu32id to do a new filled operation.
|
||||
*/
|
||||
imm_51_31 = (imm >> 31) & 0x1fffff;
|
||||
if (imm_51_31 != 0 || imm_51_31 != 0x1fffff) {
|
||||
if (imm_51_31 != 0 && imm_51_31 != 0x1fffff) {
|
||||
/* lu32id rd, imm_51_32 */
|
||||
imm_51_32 = (imm >> 32) & 0xfffff;
|
||||
emit_insn(ctx, lu32id, rd, imm_51_32);
|
||||
|
|
|
@ -499,13 +499,13 @@ in_ea:
|
|||
dbf %d0,morein
|
||||
rts
|
||||
|
||||
.section .fixup,#alloc,#execinstr
|
||||
.section .fixup,"ax"
|
||||
.even
|
||||
1:
|
||||
jbsr fpsp040_die
|
||||
jbra .Lnotkern
|
||||
|
||||
.section __ex_table,#alloc
|
||||
.section __ex_table,"a"
|
||||
.align 4
|
||||
|
||||
.long in_ea,1b
|
||||
|
|
|
@ -379,11 +379,11 @@ _060_real_access:
|
|||
|
||||
|
||||
| Execption handling for movs access to illegal memory
|
||||
.section .fixup,#alloc,#execinstr
|
||||
.section .fixup,"ax"
|
||||
.even
|
||||
1: moveq #-1,%d1
|
||||
rts
|
||||
.section __ex_table,#alloc
|
||||
.section __ex_table,"a"
|
||||
.align 4
|
||||
.long dmrbuae,1b
|
||||
.long dmrwuae,1b
|
||||
|
|
|
@ -26,7 +26,7 @@ ENTRY(relocate_new_kernel)
|
|||
lea %pc@(.Lcopy),%a4
|
||||
2: addl #0x00000000,%a4 /* virt_to_phys() */
|
||||
|
||||
.section ".m68k_fixup","aw"
|
||||
.section .m68k_fixup,"aw"
|
||||
.long M68K_FIXUP_MEMOFFSET, 2b+2
|
||||
.previous
|
||||
|
||||
|
@ -49,7 +49,7 @@ ENTRY(relocate_new_kernel)
|
|||
lea %pc@(.Lcont040),%a4
|
||||
5: addl #0x00000000,%a4 /* virt_to_phys() */
|
||||
|
||||
.section ".m68k_fixup","aw"
|
||||
.section .m68k_fixup,"aw"
|
||||
.long M68K_FIXUP_MEMOFFSET, 5b+2
|
||||
.previous
|
||||
|
||||
|
|
|
@ -153,7 +153,7 @@ CONFIG_QUOTA=y
|
|||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -178,7 +178,7 @@ CONFIG_EXT3_FS=y
|
|||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_REISERFS_FS=m
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -245,7 +245,7 @@ CONFIG_QUOTA=y
|
|||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -95,7 +95,7 @@ CONFIG_EXT3_FS_SECURITY=y
|
|||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V1=m
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -76,7 +76,7 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
|
|||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_XFS_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -240,7 +240,7 @@ CONFIG_XFS_POSIX_ACL=y
|
|||
CONFIG_BTRFS_FS=m
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_CACHEFILES=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
|
|
|
@ -296,7 +296,7 @@ CONFIG_XFS_QUOTA=y
|
|||
CONFIG_XFS_POSIX_ACL=y
|
||||
CONFIG_QUOTA=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -352,7 +352,7 @@ CONFIG_QUOTA=y
|
|||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_QFMT_V1=m
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_VIRTIO_FS=m
|
||||
CONFIG_FSCACHE=m
|
||||
|
|
|
@ -601,7 +601,7 @@ CONFIG_EXT3_FS=m
|
|||
CONFIG_EXT3_FS_POSIX_ACL=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -66,7 +66,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
|
|
|
@ -317,7 +317,7 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
|
|||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_XFS_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -237,7 +237,7 @@ CONFIG_EXT3_FS_SECURITY=y
|
|||
CONFIG_QUOTA=y
|
||||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_VFAT_FS=y
|
||||
|
|
|
@ -259,7 +259,7 @@ CONFIG_BTRFS_FS=m
|
|||
CONFIG_QUOTA=y
|
||||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
|
|
|
@ -79,7 +79,7 @@ CONFIG_EXT2_FS_POSIX_ACL=y
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
|
|
|
@ -50,7 +50,7 @@ CONFIG_DRM=m
|
|||
CONFIG_SOUND=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_UDF_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
|
|
|
@ -172,7 +172,7 @@ CONFIG_EDAC_CELL=y
|
|||
CONFIG_UIO=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_UDF_FS=m
|
||||
|
|
|
@ -47,7 +47,7 @@ CONFIG_SERIAL_CPM_CONSOLE=y
|
|||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_CRAMFS=y
|
||||
|
|
|
@ -60,7 +60,7 @@ CONFIG_USB_FSL_USB2=y
|
|||
CONFIG_USB_G_SERIAL=y
|
||||
CONFIG_UIO=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
|
|
|
@ -143,7 +143,7 @@ CONFIG_EXT2_FS=y
|
|||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_UDF_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
|
|
|
@ -254,7 +254,7 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
|||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -270,7 +270,7 @@ CONFIG_BTRFS_FS=m
|
|||
CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
CONFIG_NILFS2_FS=m
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_OVERLAY_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
|
|
|
@ -327,7 +327,7 @@ CONFIG_BTRFS_FS=m
|
|||
CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
CONFIG_NILFS2_FS=m
|
||||
CONFIG_FS_DAX=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_OVERLAY_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
|
|
|
@ -185,7 +185,7 @@ CONFIG_JFS_SECURITY=y
|
|||
CONFIG_XFS_FS=m
|
||||
CONFIG_XFS_POSIX_ACL=y
|
||||
CONFIG_FS_DAX=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_UDF_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
|
|
|
@ -969,7 +969,7 @@ CONFIG_XFS_POSIX_ACL=y
|
|||
CONFIG_GFS2_FS=m
|
||||
CONFIG_FS_DAX=y
|
||||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -129,7 +129,7 @@ CONFIG_EXT2_FS=m
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_UDF_FS=m
|
||||
|
|
|
@ -192,7 +192,7 @@ CONFIG_EXT4_FS_POSIX_ACL=y
|
|||
CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_BTRFS_FS=m
|
||||
CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_OVERLAY_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
|
|
|
@ -98,7 +98,7 @@ CONFIG_RPMSG_CTRL=y
|
|||
CONFIG_RPMSG_VIRTIO=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -624,7 +624,7 @@ CONFIG_QUOTA_NETLINK_INTERFACE=y
|
|||
CONFIG_QUOTA_DEBUG=y
|
||||
CONFIG_QFMT_V1=m
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_VIRTIO_FS=m
|
||||
|
|
|
@ -609,7 +609,7 @@ CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
|||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
CONFIG_QFMT_V1=m
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_VIRTIO_FS=m
|
||||
|
|
|
@ -61,7 +61,7 @@ CONFIG_USB_STORAGE=y
|
|||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
|
|
|
@ -105,7 +105,7 @@ CONFIG_EXT2_FS_POSIX_ACL=y
|
|||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_EXT3_FS_POSIX_ACL=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
|
|
|
@ -168,7 +168,7 @@ CONFIG_EXT3_FS=y
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_XFS_FS=y
|
||||
CONFIG_BTRFS_FS=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_FSCACHE=m
|
||||
|
|
|
@ -60,7 +60,7 @@ CONFIG_EXT2_FS_XATTR=y
|
|||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_EXT3_FS_POSIX_ACL=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
|
|
|
@ -63,7 +63,7 @@ CONFIG_MMC=y
|
|||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
|
|
|
@ -65,7 +65,7 @@ CONFIG_EXT2_FS=y
|
|||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_ROMFS_FS=m
|
||||
|
|
|
@ -62,7 +62,7 @@ CONFIG_UML_NET_SLIRP=y
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_REISERFS_FS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
|
|
|
@ -60,7 +60,7 @@ CONFIG_UML_NET_SLIRP=y
|
|||
CONFIG_EXT4_FS=y
|
||||
CONFIG_REISERFS_FS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
|
|
|
@ -3,7 +3,6 @@
|
|||
* Copyright (C) 2002 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com)
|
||||
*/
|
||||
|
||||
#include <linux/minmax.h>
|
||||
#include <unistd.h>
|
||||
#include <errno.h>
|
||||
#include <fcntl.h>
|
||||
|
@ -51,7 +50,7 @@ static struct pollfds all_sigio_fds;
|
|||
|
||||
static int write_sigio_thread(void *unused)
|
||||
{
|
||||
struct pollfds *fds;
|
||||
struct pollfds *fds, tmp;
|
||||
struct pollfd *p;
|
||||
int i, n, respond_fd;
|
||||
char c;
|
||||
|
@ -78,7 +77,9 @@ static int write_sigio_thread(void *unused)
|
|||
"write_sigio_thread : "
|
||||
"read on socket failed, "
|
||||
"err = %d\n", errno);
|
||||
swap(current_poll, next_poll);
|
||||
tmp = current_poll;
|
||||
current_poll = next_poll;
|
||||
next_poll = tmp;
|
||||
respond_fd = sigio_private[1];
|
||||
}
|
||||
else {
|
||||
|
|
|
@ -245,7 +245,7 @@ CONFIG_QUOTA=y
|
|||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
|
|
|
@ -242,7 +242,7 @@ CONFIG_QUOTA=y
|
|||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
|
|
|
@ -285,7 +285,15 @@ SYM_FUNC_END(__switch_to_asm)
|
|||
*/
|
||||
.pushsection .text, "ax"
|
||||
SYM_CODE_START(ret_from_fork_asm)
|
||||
UNWIND_HINT_REGS
|
||||
/*
|
||||
* This is the start of the kernel stack; even through there's a
|
||||
* register set at the top, the regset isn't necessarily coherent
|
||||
* (consider kthreads) and one cannot unwind further.
|
||||
*
|
||||
* This ensures stack unwinds of kernel threads terminate in a known
|
||||
* good state.
|
||||
*/
|
||||
UNWIND_HINT_END_OF_STACK
|
||||
ANNOTATE_NOENDBR // copy_thread
|
||||
CALL_DEPTH_ACCOUNT
|
||||
|
||||
|
@ -295,6 +303,12 @@ SYM_CODE_START(ret_from_fork_asm)
|
|||
movq %r12, %rcx /* fn_arg */
|
||||
call ret_from_fork
|
||||
|
||||
/*
|
||||
* Set the stack state to what is expected for the target function
|
||||
* -- at this point the register set should be a valid user set
|
||||
* and unwind should work normally.
|
||||
*/
|
||||
UNWIND_HINT_REGS
|
||||
jmp swapgs_restore_regs_and_return_to_usermode
|
||||
SYM_CODE_END(ret_from_fork_asm)
|
||||
.popsection
|
||||
|
|
|
@ -37,6 +37,7 @@ KVM_X86_OP(get_segment)
|
|||
KVM_X86_OP(get_cpl)
|
||||
KVM_X86_OP(set_segment)
|
||||
KVM_X86_OP(get_cs_db_l_bits)
|
||||
KVM_X86_OP(is_valid_cr0)
|
||||
KVM_X86_OP(set_cr0)
|
||||
KVM_X86_OP_OPTIONAL(post_set_cr3)
|
||||
KVM_X86_OP(is_valid_cr4)
|
||||
|
|
|
@ -1566,9 +1566,10 @@ struct kvm_x86_ops {
|
|||
void (*set_segment)(struct kvm_vcpu *vcpu,
|
||||
struct kvm_segment *var, int seg);
|
||||
void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
|
||||
bool (*is_valid_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
|
||||
void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
|
||||
void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
|
||||
bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0);
|
||||
bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
|
||||
void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
|
||||
int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
|
||||
void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
|
||||
|
|
|
@ -5,6 +5,7 @@
|
|||
#include <asm/cpu.h>
|
||||
#include <linux/earlycpio.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <asm/microcode_amd.h>
|
||||
|
||||
struct ucode_patch {
|
||||
struct list_head plist;
|
||||
|
|
|
@ -48,11 +48,13 @@ extern void __init load_ucode_amd_bsp(unsigned int family);
|
|||
extern void load_ucode_amd_ap(unsigned int family);
|
||||
extern int __init save_microcode_in_initrd_amd(unsigned int family);
|
||||
void reload_ucode_amd(unsigned int cpu);
|
||||
extern void amd_check_microcode(void);
|
||||
#else
|
||||
static inline void __init load_ucode_amd_bsp(unsigned int family) {}
|
||||
static inline void load_ucode_amd_ap(unsigned int family) {}
|
||||
static inline int __init
|
||||
save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
|
||||
static inline void reload_ucode_amd(unsigned int cpu) {}
|
||||
static inline void amd_check_microcode(void) {}
|
||||
#endif
|
||||
#endif /* _ASM_X86_MICROCODE_AMD_H */
|
||||
|
|
|
@ -545,6 +545,7 @@
|
|||
#define MSR_AMD64_DE_CFG 0xc0011029
|
||||
#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1
|
||||
#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT)
|
||||
#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9
|
||||
|
||||
#define MSR_AMD64_BU_CFG2 0xc001102a
|
||||
#define MSR_AMD64_IBSFETCHCTL 0xc0011030
|
||||
|
|
|
@ -27,11 +27,6 @@
|
|||
|
||||
#include "cpu.h"
|
||||
|
||||
static const int amd_erratum_383[];
|
||||
static const int amd_erratum_400[];
|
||||
static const int amd_erratum_1054[];
|
||||
static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum);
|
||||
|
||||
/*
|
||||
* nodes_per_socket: Stores the number of nodes per socket.
|
||||
* Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX
|
||||
|
@ -39,6 +34,78 @@ static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum);
|
|||
*/
|
||||
static u32 nodes_per_socket = 1;
|
||||
|
||||
/*
|
||||
* AMD errata checking
|
||||
*
|
||||
* Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or
|
||||
* AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that
|
||||
* have an OSVW id assigned, which it takes as first argument. Both take a
|
||||
* variable number of family-specific model-stepping ranges created by
|
||||
* AMD_MODEL_RANGE().
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
* const int amd_erratum_319[] =
|
||||
* AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2),
|
||||
* AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0),
|
||||
* AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0));
|
||||
*/
|
||||
|
||||
#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 }
|
||||
#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 }
|
||||
#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \
|
||||
((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end))
|
||||
#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff)
|
||||
#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff)
|
||||
#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff)
|
||||
|
||||
static const int amd_erratum_400[] =
|
||||
AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),
|
||||
AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));
|
||||
|
||||
static const int amd_erratum_383[] =
|
||||
AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf));
|
||||
|
||||
/* #1054: Instructions Retired Performance Counter May Be Inaccurate */
|
||||
static const int amd_erratum_1054[] =
|
||||
AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
|
||||
|
||||
static const int amd_zenbleed[] =
|
||||
AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf),
|
||||
AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf),
|
||||
AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf));
|
||||
|
||||
static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
|
||||
{
|
||||
int osvw_id = *erratum++;
|
||||
u32 range;
|
||||
u32 ms;
|
||||
|
||||
if (osvw_id >= 0 && osvw_id < 65536 &&
|
||||
cpu_has(cpu, X86_FEATURE_OSVW)) {
|
||||
u64 osvw_len;
|
||||
|
||||
rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len);
|
||||
if (osvw_id < osvw_len) {
|
||||
u64 osvw_bits;
|
||||
|
||||
rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6),
|
||||
osvw_bits);
|
||||
return osvw_bits & (1ULL << (osvw_id & 0x3f));
|
||||
}
|
||||
}
|
||||
|
||||
/* OSVW unavailable or ID unknown, match family-model-stepping range */
|
||||
ms = (cpu->x86_model << 4) | cpu->x86_stepping;
|
||||
while ((range = *erratum++))
|
||||
if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&
|
||||
(ms >= AMD_MODEL_RANGE_START(range)) &&
|
||||
(ms <= AMD_MODEL_RANGE_END(range)))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
|
||||
{
|
||||
u32 gprs[8] = { 0 };
|
||||
|
@ -916,6 +983,47 @@ static void init_amd_zn(struct cpuinfo_x86 *c)
|
|||
}
|
||||
}
|
||||
|
||||
static bool cpu_has_zenbleed_microcode(void)
|
||||
{
|
||||
u32 good_rev = 0;
|
||||
|
||||
switch (boot_cpu_data.x86_model) {
|
||||
case 0x30 ... 0x3f: good_rev = 0x0830107a; break;
|
||||
case 0x60 ... 0x67: good_rev = 0x0860010b; break;
|
||||
case 0x68 ... 0x6f: good_rev = 0x08608105; break;
|
||||
case 0x70 ... 0x7f: good_rev = 0x08701032; break;
|
||||
case 0xa0 ... 0xaf: good_rev = 0x08a00008; break;
|
||||
|
||||
default:
|
||||
return false;
|
||||
break;
|
||||
}
|
||||
|
||||
if (boot_cpu_data.microcode < good_rev)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void zenbleed_check(struct cpuinfo_x86 *c)
|
||||
{
|
||||
if (!cpu_has_amd_erratum(c, amd_zenbleed))
|
||||
return;
|
||||
|
||||
if (cpu_has(c, X86_FEATURE_HYPERVISOR))
|
||||
return;
|
||||
|
||||
if (!cpu_has(c, X86_FEATURE_AVX))
|
||||
return;
|
||||
|
||||
if (!cpu_has_zenbleed_microcode()) {
|
||||
pr_notice_once("Zenbleed: please update your microcode for the most optimal fix\n");
|
||||
msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT);
|
||||
} else {
|
||||
msr_clear_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT);
|
||||
}
|
||||
}
|
||||
|
||||
static void init_amd(struct cpuinfo_x86 *c)
|
||||
{
|
||||
early_init_amd(c);
|
||||
|
@ -1020,6 +1128,8 @@ static void init_amd(struct cpuinfo_x86 *c)
|
|||
if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) &&
|
||||
cpu_has(c, X86_FEATURE_AUTOIBRS))
|
||||
WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));
|
||||
|
||||
zenbleed_check(c);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
|
@ -1115,73 +1225,6 @@ static const struct cpu_dev amd_cpu_dev = {
|
|||
|
||||
cpu_dev_register(amd_cpu_dev);
|
||||
|
||||
/*
|
||||
* AMD errata checking
|
||||
*
|
||||
* Errata are defined as arrays of ints using the AMD_LEGACY_ERRATUM() or
|
||||
* AMD_OSVW_ERRATUM() macros. The latter is intended for newer errata that
|
||||
* have an OSVW id assigned, which it takes as first argument. Both take a
|
||||
* variable number of family-specific model-stepping ranges created by
|
||||
* AMD_MODEL_RANGE().
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
* const int amd_erratum_319[] =
|
||||
* AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0x4, 0x2),
|
||||
* AMD_MODEL_RANGE(0x10, 0x8, 0x0, 0x8, 0x0),
|
||||
* AMD_MODEL_RANGE(0x10, 0x9, 0x0, 0x9, 0x0));
|
||||
*/
|
||||
|
||||
#define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 }
|
||||
#define AMD_OSVW_ERRATUM(osvw_id, ...) { osvw_id, __VA_ARGS__, 0 }
|
||||
#define AMD_MODEL_RANGE(f, m_start, s_start, m_end, s_end) \
|
||||
((f << 24) | (m_start << 16) | (s_start << 12) | (m_end << 4) | (s_end))
|
||||
#define AMD_MODEL_RANGE_FAMILY(range) (((range) >> 24) & 0xff)
|
||||
#define AMD_MODEL_RANGE_START(range) (((range) >> 12) & 0xfff)
|
||||
#define AMD_MODEL_RANGE_END(range) ((range) & 0xfff)
|
||||
|
||||
static const int amd_erratum_400[] =
|
||||
AMD_OSVW_ERRATUM(1, AMD_MODEL_RANGE(0xf, 0x41, 0x2, 0xff, 0xf),
|
||||
AMD_MODEL_RANGE(0x10, 0x2, 0x1, 0xff, 0xf));
|
||||
|
||||
static const int amd_erratum_383[] =
|
||||
AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf));
|
||||
|
||||
/* #1054: Instructions Retired Performance Counter May Be Inaccurate */
|
||||
static const int amd_erratum_1054[] =
|
||||
AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
|
||||
|
||||
static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
|
||||
{
|
||||
int osvw_id = *erratum++;
|
||||
u32 range;
|
||||
u32 ms;
|
||||
|
||||
if (osvw_id >= 0 && osvw_id < 65536 &&
|
||||
cpu_has(cpu, X86_FEATURE_OSVW)) {
|
||||
u64 osvw_len;
|
||||
|
||||
rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len);
|
||||
if (osvw_id < osvw_len) {
|
||||
u64 osvw_bits;
|
||||
|
||||
rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6),
|
||||
osvw_bits);
|
||||
return osvw_bits & (1ULL << (osvw_id & 0x3f));
|
||||
}
|
||||
}
|
||||
|
||||
/* OSVW unavailable or ID unknown, match family-model-stepping range */
|
||||
ms = (cpu->x86_model << 4) | cpu->x86_stepping;
|
||||
while ((range = *erratum++))
|
||||
if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&
|
||||
(ms >= AMD_MODEL_RANGE_START(range)) &&
|
||||
(ms <= AMD_MODEL_RANGE_END(range)))
|
||||
return true;
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static DEFINE_PER_CPU_READ_MOSTLY(unsigned long[4], amd_dr_addr_mask);
|
||||
|
||||
static unsigned int amd_msr_dr_addr_masks[] = {
|
||||
|
@ -1235,3 +1278,15 @@ u32 amd_get_highest_perf(void)
|
|||
return 255;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(amd_get_highest_perf);
|
||||
|
||||
static void zenbleed_check_cpu(void *unused)
|
||||
{
|
||||
struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
|
||||
|
||||
zenbleed_check(c);
|
||||
}
|
||||
|
||||
void amd_check_microcode(void)
|
||||
{
|
||||
on_each_cpu(zenbleed_check_cpu, NULL, 1);
|
||||
}
|
||||
|
|
|
@ -1150,19 +1150,21 @@ spectre_v2_user_select_mitigation(void)
|
|||
}
|
||||
|
||||
/*
|
||||
* If no STIBP, enhanced IBRS is enabled, or SMT impossible, STIBP
|
||||
* If no STIBP, Intel enhanced IBRS is enabled, or SMT impossible, STIBP
|
||||
* is not required.
|
||||
*
|
||||
* Enhanced IBRS also protects against cross-thread branch target
|
||||
* Intel's Enhanced IBRS also protects against cross-thread branch target
|
||||
* injection in user-mode as the IBRS bit remains always set which
|
||||
* implicitly enables cross-thread protections. However, in legacy IBRS
|
||||
* mode, the IBRS bit is set only on kernel entry and cleared on return
|
||||
* to userspace. This disables the implicit cross-thread protection,
|
||||
* so allow for STIBP to be selected in that case.
|
||||
* to userspace. AMD Automatic IBRS also does not protect userspace.
|
||||
* These modes therefore disable the implicit cross-thread protection,
|
||||
* so allow for STIBP to be selected in those cases.
|
||||
*/
|
||||
if (!boot_cpu_has(X86_FEATURE_STIBP) ||
|
||||
!smt_possible ||
|
||||
spectre_v2_in_eibrs_mode(spectre_v2_enabled))
|
||||
(spectre_v2_in_eibrs_mode(spectre_v2_enabled) &&
|
||||
!boot_cpu_has(X86_FEATURE_AUTOIBRS)))
|
||||
return;
|
||||
|
||||
/*
|
||||
|
@ -2294,7 +2296,8 @@ static ssize_t mmio_stale_data_show_state(char *buf)
|
|||
|
||||
static char *stibp_state(void)
|
||||
{
|
||||
if (spectre_v2_in_eibrs_mode(spectre_v2_enabled))
|
||||
if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) &&
|
||||
!boot_cpu_has(X86_FEATURE_AUTOIBRS))
|
||||
return "";
|
||||
|
||||
switch (spectre_v2_user_stibp) {
|
||||
|
|
|
@ -2287,6 +2287,8 @@ void microcode_check(struct cpuinfo_x86 *prev_info)
|
|||
|
||||
perf_check_microcode();
|
||||
|
||||
amd_check_microcode();
|
||||
|
||||
store_cpu_caps(&curr_info);
|
||||
|
||||
if (!memcmp(&prev_info->x86_capability, &curr_info.x86_capability,
|
||||
|
|
|
@ -1261,10 +1261,10 @@ static void __threshold_remove_blocks(struct threshold_bank *b)
|
|||
struct threshold_block *pos = NULL;
|
||||
struct threshold_block *tmp = NULL;
|
||||
|
||||
kobject_del(b->kobj);
|
||||
kobject_put(b->kobj);
|
||||
|
||||
list_for_each_entry_safe(pos, tmp, &b->blocks->miscj, miscj)
|
||||
kobject_del(&pos->kobj);
|
||||
kobject_put(b->kobj);
|
||||
}
|
||||
|
||||
static void threshold_remove_bank(struct threshold_bank *bank)
|
||||
|
|
|
@ -697,9 +697,10 @@ static bool try_fixup_enqcmd_gp(void)
|
|||
}
|
||||
|
||||
static bool gp_try_fixup_and_notify(struct pt_regs *regs, int trapnr,
|
||||
unsigned long error_code, const char *str)
|
||||
unsigned long error_code, const char *str,
|
||||
unsigned long address)
|
||||
{
|
||||
if (fixup_exception(regs, trapnr, error_code, 0))
|
||||
if (fixup_exception(regs, trapnr, error_code, address))
|
||||
return true;
|
||||
|
||||
current->thread.error_code = error_code;
|
||||
|
@ -759,7 +760,7 @@ DEFINE_IDTENTRY_ERRORCODE(exc_general_protection)
|
|||
goto exit;
|
||||
}
|
||||
|
||||
if (gp_try_fixup_and_notify(regs, X86_TRAP_GP, error_code, desc))
|
||||
if (gp_try_fixup_and_notify(regs, X86_TRAP_GP, error_code, desc, 0))
|
||||
goto exit;
|
||||
|
||||
if (error_code)
|
||||
|
@ -1357,17 +1358,20 @@ DEFINE_IDTENTRY(exc_device_not_available)
|
|||
|
||||
#define VE_FAULT_STR "VE fault"
|
||||
|
||||
static void ve_raise_fault(struct pt_regs *regs, long error_code)
|
||||
static void ve_raise_fault(struct pt_regs *regs, long error_code,
|
||||
unsigned long address)
|
||||
{
|
||||
if (user_mode(regs)) {
|
||||
gp_user_force_sig_segv(regs, X86_TRAP_VE, error_code, VE_FAULT_STR);
|
||||
return;
|
||||
}
|
||||
|
||||
if (gp_try_fixup_and_notify(regs, X86_TRAP_VE, error_code, VE_FAULT_STR))
|
||||
if (gp_try_fixup_and_notify(regs, X86_TRAP_VE, error_code,
|
||||
VE_FAULT_STR, address)) {
|
||||
return;
|
||||
}
|
||||
|
||||
die_addr(VE_FAULT_STR, regs, error_code, 0);
|
||||
die_addr(VE_FAULT_STR, regs, error_code, address);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1431,7 +1435,7 @@ DEFINE_IDTENTRY(exc_virtualization_exception)
|
|||
* it successfully, treat it as #GP(0) and handle it.
|
||||
*/
|
||||
if (!tdx_handle_virt_exception(regs, &ve))
|
||||
ve_raise_fault(regs, 0);
|
||||
ve_raise_fault(regs, 0, ve.gla);
|
||||
|
||||
cond_local_irq_disable(regs);
|
||||
}
|
||||
|
|
|
@ -637,16 +637,22 @@ bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr)
|
|||
*max_irr = -1;
|
||||
|
||||
for (i = vec = 0; i <= 7; i++, vec += 32) {
|
||||
u32 *p_irr = (u32 *)(regs + APIC_IRR + i * 0x10);
|
||||
|
||||
irr_val = *p_irr;
|
||||
pir_val = READ_ONCE(pir[i]);
|
||||
irr_val = *((u32 *)(regs + APIC_IRR + i * 0x10));
|
||||
|
||||
if (pir_val) {
|
||||
pir_val = xchg(&pir[i], 0);
|
||||
|
||||
prev_irr_val = irr_val;
|
||||
irr_val |= xchg(&pir[i], 0);
|
||||
*((u32 *)(regs + APIC_IRR + i * 0x10)) = irr_val;
|
||||
if (prev_irr_val != irr_val) {
|
||||
max_updated_irr =
|
||||
__fls(irr_val ^ prev_irr_val) + vec;
|
||||
}
|
||||
do {
|
||||
irr_val = prev_irr_val | pir_val;
|
||||
} while (prev_irr_val != irr_val &&
|
||||
!try_cmpxchg(p_irr, &prev_irr_val, irr_val));
|
||||
|
||||
if (prev_irr_val != irr_val)
|
||||
max_updated_irr = __fls(irr_val ^ prev_irr_val) + vec;
|
||||
}
|
||||
if (irr_val)
|
||||
*max_irr = __fls(irr_val) + vec;
|
||||
|
@ -660,8 +666,11 @@ EXPORT_SYMBOL_GPL(__kvm_apic_update_irr);
|
|||
bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr)
|
||||
{
|
||||
struct kvm_lapic *apic = vcpu->arch.apic;
|
||||
bool irr_updated = __kvm_apic_update_irr(pir, apic->regs, max_irr);
|
||||
|
||||
return __kvm_apic_update_irr(pir, apic->regs, max_irr);
|
||||
if (unlikely(!apic->apicv_active && irr_updated))
|
||||
apic->irr_pending = true;
|
||||
return irr_updated;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(kvm_apic_update_irr);
|
||||
|
||||
|
|
|
@ -1786,6 +1786,11 @@ static void sev_post_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
|
|||
}
|
||||
}
|
||||
|
||||
static bool svm_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
|
||||
{
|
||||
struct vcpu_svm *svm = to_svm(vcpu);
|
||||
|
@ -3986,14 +3991,8 @@ static int svm_vcpu_pre_run(struct kvm_vcpu *vcpu)
|
|||
|
||||
static fastpath_t svm_exit_handlers_fastpath(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control;
|
||||
|
||||
/*
|
||||
* Note, the next RIP must be provided as SRCU isn't held, i.e. KVM
|
||||
* can't read guest memory (dereference memslots) to decode the WRMSR.
|
||||
*/
|
||||
if (control->exit_code == SVM_EXIT_MSR && control->exit_info_1 &&
|
||||
nrips && control->next_rip)
|
||||
if (to_svm(vcpu)->vmcb->control.exit_code == SVM_EXIT_MSR &&
|
||||
to_svm(vcpu)->vmcb->control.exit_info_1)
|
||||
return handle_fastpath_set_msr_irqoff(vcpu);
|
||||
|
||||
return EXIT_FASTPATH_NONE;
|
||||
|
@ -4815,6 +4814,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = {
|
|||
.set_segment = svm_set_segment,
|
||||
.get_cpl = svm_get_cpl,
|
||||
.get_cs_db_l_bits = svm_get_cs_db_l_bits,
|
||||
.is_valid_cr0 = svm_is_valid_cr0,
|
||||
.set_cr0 = svm_set_cr0,
|
||||
.post_set_cr3 = sev_post_set_cr3,
|
||||
.is_valid_cr4 = svm_is_valid_cr4,
|
||||
|
|
|
@ -303,10 +303,8 @@ SYM_FUNC_START(vmx_do_nmi_irqoff)
|
|||
VMX_DO_EVENT_IRQOFF call asm_exc_nmi_kvm_vmx
|
||||
SYM_FUNC_END(vmx_do_nmi_irqoff)
|
||||
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
#ifndef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
|
||||
|
||||
/**
|
||||
* vmread_error_trampoline - Trampoline from inline asm to vmread_error()
|
||||
* @field: VMCS field encoding that failed
|
||||
|
@ -335,7 +333,7 @@ SYM_FUNC_START(vmread_error_trampoline)
|
|||
mov 3*WORD_SIZE(%_ASM_BP), %_ASM_ARG2
|
||||
mov 2*WORD_SIZE(%_ASM_BP), %_ASM_ARG1
|
||||
|
||||
call vmread_error
|
||||
call vmread_error_trampoline2
|
||||
|
||||
/* Zero out @fault, which will be popped into the result register. */
|
||||
_ASM_MOV $0, 3*WORD_SIZE(%_ASM_BP)
|
||||
|
@ -357,6 +355,8 @@ SYM_FUNC_START(vmread_error_trampoline)
|
|||
SYM_FUNC_END(vmread_error_trampoline)
|
||||
#endif
|
||||
|
||||
.section .text, "ax"
|
||||
|
||||
SYM_FUNC_START(vmx_do_interrupt_irqoff)
|
||||
VMX_DO_EVENT_IRQOFF CALL_NOSPEC _ASM_ARG1
|
||||
SYM_FUNC_END(vmx_do_interrupt_irqoff)
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue