ARM: tegra: Add SOR0_OUT clock on Tegra124
This clock is needed for eDP to properly function, so add it to the SOR device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -157,10 +157,11 @@
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reg = <0x0 0x54540000 0x0 0x00040000>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_SOR0>,
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<&tegra_car TEGRA124_CLK_SOR0_OUT>,
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<&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
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<&tegra_car TEGRA124_CLK_PLL_DP>,
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<&tegra_car TEGRA124_CLK_CLK_M>;
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clock-names = "sor", "parent", "dp", "safe";
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clock-names = "sor", "out", "parent", "dp", "safe";
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resets = <&tegra_car 182>;
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reset-names = "sor";
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status = "disabled";
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