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drm/i915/gvt: Add mmio handler for CFL 

Add registers of 0x4ab8 and 0x2248 into MMIO handler.

Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Fei Jiang <fei.jiang@intel.com>
Signed-off-by: fred gao <fred.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
fred gao 2019-01-09 09:20:00 +08:00 committed by Zhenyu Wang
parent 36520ed005
commit 5cd02703b0
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/gvt/handlers.c
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@ -3043,8 +3043,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
NULL, NULL);
MMIO_D(_MMIO(0x4ab8), D_KBL);
MMIO_D(_MMIO(0x2248), D_KBL | D_SKL);
MMIO_D(_MMIO(0x4ab8), D_KBL | D_CFL);
MMIO_D(_MMIO(0x2248), D_SKL_PLUS);
return 0;
}