perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUs
This patch modifies the rapl_model struct to include architecture specific knowledge in this previously Intel specific structure, and in particular it adds the MSR for POWER_UNIT and the rapl_msrs array. No functional changes. Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200527224659.206129-3-eranian@google.com
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@ -131,7 +131,9 @@ struct rapl_pmus {
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};
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struct rapl_model {
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struct perf_msr *rapl_msrs;
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unsigned long events;
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unsigned int msr_power_unit;
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bool apply_quirk;
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};
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@ -141,7 +143,7 @@ static struct rapl_pmus *rapl_pmus;
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static cpumask_t rapl_cpu_mask;
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static unsigned int rapl_cntr_mask;
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static u64 rapl_timer_ms;
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static struct perf_msr rapl_msrs[];
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static struct perf_msr *rapl_msrs;
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static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu)
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{
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@ -516,7 +518,7 @@ static bool test_msr(int idx, void *data)
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return test_bit(idx, (unsigned long *) data);
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}
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static struct perf_msr rapl_msrs[] = {
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static struct perf_msr intel_rapl_msrs[] = {
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[PERF_RAPL_PP0] = { MSR_PP0_ENERGY_STATUS, &rapl_events_cores_group, test_msr },
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[PERF_RAPL_PKG] = { MSR_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr },
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[PERF_RAPL_RAM] = { MSR_DRAM_ENERGY_STATUS, &rapl_events_ram_group, test_msr },
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@ -578,13 +580,13 @@ static int rapl_cpu_online(unsigned int cpu)
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return 0;
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}
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static int rapl_check_hw_unit(bool apply_quirk)
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static int rapl_check_hw_unit(struct rapl_model *rm)
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{
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u64 msr_rapl_power_unit_bits;
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int i;
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/* protect rdmsrl() to handle virtualization */
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if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits))
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if (rdmsrl_safe(rm->msr_power_unit, &msr_rapl_power_unit_bits))
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return -1;
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for (i = 0; i < NR_RAPL_DOMAINS; i++)
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rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
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@ -595,7 +597,7 @@ static int rapl_check_hw_unit(bool apply_quirk)
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* "Intel Xeon Processor E5-1600 and E5-2600 v3 Product Families, V2
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* of 2. Datasheet, September 2014, Reference Number: 330784-001 "
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*/
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if (apply_quirk)
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if (rm->apply_quirk)
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rapl_hw_unit[PERF_RAPL_RAM] = 16;
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/*
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@ -676,6 +678,8 @@ static struct rapl_model model_snb = {
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_PP1),
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.apply_quirk = false,
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.msr_power_unit = MSR_RAPL_POWER_UNIT,
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.rapl_msrs = intel_rapl_msrs,
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};
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static struct rapl_model model_snbep = {
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@ -683,6 +687,8 @@ static struct rapl_model model_snbep = {
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM),
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.apply_quirk = false,
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.msr_power_unit = MSR_RAPL_POWER_UNIT,
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.rapl_msrs = intel_rapl_msrs,
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};
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static struct rapl_model model_hsw = {
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@ -691,6 +697,8 @@ static struct rapl_model model_hsw = {
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BIT(PERF_RAPL_RAM) |
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BIT(PERF_RAPL_PP1),
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.apply_quirk = false,
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.msr_power_unit = MSR_RAPL_POWER_UNIT,
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.rapl_msrs = intel_rapl_msrs,
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};
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static struct rapl_model model_hsx = {
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@ -698,12 +706,16 @@ static struct rapl_model model_hsx = {
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM),
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.apply_quirk = true,
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.msr_power_unit = MSR_RAPL_POWER_UNIT,
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.rapl_msrs = intel_rapl_msrs,
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};
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static struct rapl_model model_knl = {
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.events = BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM),
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.apply_quirk = true,
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.msr_power_unit = MSR_RAPL_POWER_UNIT,
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.rapl_msrs = intel_rapl_msrs,
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};
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static struct rapl_model model_skl = {
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@ -713,6 +725,8 @@ static struct rapl_model model_skl = {
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BIT(PERF_RAPL_PP1) |
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BIT(PERF_RAPL_PSYS),
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.apply_quirk = false,
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.msr_power_unit = MSR_RAPL_POWER_UNIT,
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.rapl_msrs = intel_rapl_msrs,
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};
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static const struct x86_cpu_id rapl_model_match[] __initconst = {
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@ -760,10 +774,13 @@ static int __init rapl_pmu_init(void)
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return -ENODEV;
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rm = (struct rapl_model *) id->driver_data;
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rapl_msrs = rm->rapl_msrs;
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rapl_cntr_mask = perf_msr_probe(rapl_msrs, PERF_RAPL_MAX,
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false, (void *) &rm->events);
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ret = rapl_check_hw_unit(rm->apply_quirk);
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ret = rapl_check_hw_unit(rm);
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if (ret)
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return ret;
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