iw_cxgb4: invalidate the mr when posting a read_w_inv wr
Also, rearrange things a bit to have a common c4iw_invalidate_mr()
function used everywhere that we need to invalidate.
Fixes: 49b53a93a6
("iw_cxgb4: add fast-path for small REG_MR operations")
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
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@ -666,18 +666,6 @@ skip_cqe:
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return ret;
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}
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static void invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
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{
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struct c4iw_mr *mhp;
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unsigned long flags;
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spin_lock_irqsave(&rhp->lock, flags);
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mhp = get_mhp(rhp, rkey >> 8);
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if (mhp)
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mhp->attr.state = 0;
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spin_unlock_irqrestore(&rhp->lock, flags);
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}
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/*
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* Get one cq entry from c4iw and map it to openib.
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*
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@ -733,7 +721,7 @@ static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc)
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CQE_OPCODE(&cqe) == FW_RI_SEND_WITH_SE_INV) {
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wc->ex.invalidate_rkey = CQE_WRID_STAG(&cqe);
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wc->wc_flags |= IB_WC_WITH_INVALIDATE;
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invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
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c4iw_invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
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}
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} else {
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switch (CQE_OPCODE(&cqe)) {
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@ -762,7 +750,8 @@ static int c4iw_poll_cq_one(struct c4iw_cq *chp, struct ib_wc *wc)
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/* Invalidate the MR if the fastreg failed */
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if (CQE_STATUS(&cqe) != T4_ERR_SUCCESS)
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invalidate_mr(qhp->rhp, CQE_WRID_FR_STAG(&cqe));
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c4iw_invalidate_mr(qhp->rhp,
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CQE_WRID_FR_STAG(&cqe));
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break;
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default:
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printk(KERN_ERR MOD "Unexpected opcode %d "
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@ -999,6 +999,6 @@ extern int db_coalescing_threshold;
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extern int use_dsgl;
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void c4iw_drain_rq(struct ib_qp *qp);
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void c4iw_drain_sq(struct ib_qp *qp);
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void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey);
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#endif
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@ -770,3 +770,15 @@ int c4iw_dereg_mr(struct ib_mr *ib_mr)
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kfree(mhp);
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return 0;
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}
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void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
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{
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struct c4iw_mr *mhp;
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unsigned long flags;
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spin_lock_irqsave(&rhp->lock, flags);
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mhp = get_mhp(rhp, rkey >> 8);
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if (mhp)
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mhp->attr.state = 0;
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spin_unlock_irqrestore(&rhp->lock, flags);
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}
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@ -706,12 +706,8 @@ static int build_memreg(struct t4_sq *sq, union t4_wr *wqe,
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return 0;
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}
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static int build_inv_stag(struct c4iw_dev *dev, union t4_wr *wqe,
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struct ib_send_wr *wr, u8 *len16)
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static int build_inv_stag(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16)
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{
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struct c4iw_mr *mhp = get_mhp(dev, wr->ex.invalidate_rkey >> 8);
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mhp->attr.state = 0;
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wqe->inv.stag_inv = cpu_to_be32(wr->ex.invalidate_rkey);
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wqe->inv.r2 = 0;
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*len16 = DIV_ROUND_UP(sizeof wqe->inv, 16);
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@ -842,10 +838,13 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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case IB_WR_RDMA_READ_WITH_INV:
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fw_opcode = FW_RI_RDMA_READ_WR;
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swsqe->opcode = FW_RI_READ_REQ;
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if (wr->opcode == IB_WR_RDMA_READ_WITH_INV)
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if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) {
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c4iw_invalidate_mr(qhp->rhp,
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wr->sg_list[0].lkey);
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fw_flags = FW_RI_RDMA_READ_INVALIDATE;
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else
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} else {
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fw_flags = 0;
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}
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err = build_rdma_read(wqe, wr, &len16);
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if (err)
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break;
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@ -878,7 +877,8 @@ int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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fw_flags |= FW_RI_LOCAL_FENCE_FLAG;
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fw_opcode = FW_RI_INV_LSTAG_WR;
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swsqe->opcode = FW_RI_LOCAL_INV;
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err = build_inv_stag(qhp->rhp, wqe, wr, &len16);
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err = build_inv_stag(wqe, wr, &len16);
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c4iw_invalidate_mr(qhp->rhp, wr->ex.invalidate_rkey);
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break;
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default:
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PDBG("%s post of type=%d TBD!\n", __func__,
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