ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10 (take two)
- Fix the system controller compatible for the hi3620 and hip04 SoCs - Add the basic device tree for the hisilicon SD5203 SoC -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJfdCMMAAoJEAvIV27ZiWZcUxIP/1S7eF+l39oud7SPzX7cvY62 CoYkixPDTm8TvryE7iJD5adSz3ioLQhW5A/lCvglr2nWUOuDOGe06+Oqs5szggHr QzUc5mQ90c0uHTzHegr0Gjry6M+paMaLnLaPw6xl6y8I77szPrsebmxLzjXMLqIk 78XEo+DogxnDZWDfdALKTcTJYP5mhwCDi7HnT4OvIjXMlmGtbmTc7zXOhBQtKk6P IEe4h9Qhpjs5MA/kkf9QVWKpwoVP1bVIIaocCNcuqx+2ScGiCb/MibZ4gkRJV5B1 Wre3tN/kDh0Uq10jrjruH2krpy28dUFhx3pma1Yyn9SLhx8LZzB2L66wndLp4cXf nzMuvwW57Lk3Q9y5ZFy97fGE8hO3mWb1xrkFFvuvxormkq1c07iQJ3LGf3NG8SeH E/6mq6XQcnO/5UU8sXky3BSWIcxgFO67MT6qaJbTziTRWCDLRZCULR1IufxXCQ5O ZLfVobjm+okA0Hz6c3jfShziv957qDClVqUn6wUfThlQaP05ekIdNxn7jNQOd/ju Z2WGLDbh1a0GvheAjDPguxyhmFwDzWl4VgwuOSzvxyJ8O6LcjEeOBMEDVDAWLUFK 3Bs2fqZhVLD8yyJfPPDBfdmn4rBcpmUCP0yaoi0N5YnFDXtOtUJhngnrHVEJY3Ui W6xY7lrnVF3znkyOaJET =qsbd -----END PGP SIGNATURE----- Merge tag 'hisi-arm32-dt-for-5.10-tag2' of git://github.com/hisilicon/linux-hisi into arm/dt ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10 (take two) - Fix the system controller compatible for the hi3620 and hip04 SoCs - Add the basic device tree for the hisilicon SD5203 SoC * tag 'hisi-arm32-dt-for-5.10-tag2' of git://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes Link: https://lore.kernel.org/r/5F742717.5080405@hisilicon.com Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
5c505432de
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@ -359,6 +359,8 @@ dtb-$(CONFIG_ARCH_MPS2) += \
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mps2-an399.dtb
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mps2-an399.dtb
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dtb-$(CONFIG_ARCH_MOXART) += \
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dtb-$(CONFIG_ARCH_MOXART) += \
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moxart-uc7112lx.dtb
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moxart-uc7112lx.dtb
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dtb-$(CONFIG_ARCH_SD5203) += \
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sd5203.dtb
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dtb-$(CONFIG_SOC_IMX1) += \
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dtb-$(CONFIG_SOC_IMX1) += \
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imx1-ads.dtb \
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imx1-ads.dtb \
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imx1-apf9328.dtb
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imx1-apf9328.dtb
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@ -89,7 +89,7 @@
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};
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};
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sysctrl: system-controller@802000 {
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sysctrl: system-controller@802000 {
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compatible = "hisilicon,sysctrl";
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compatible = "hisilicon,sysctrl", "syscon";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x802000 0x1000>;
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ranges = <0 0x802000 0x1000>;
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@ -213,7 +213,7 @@
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};
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};
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sysctrl: sysctrl {
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sysctrl: sysctrl {
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compatible = "hisilicon,sysctrl";
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compatible = "hisilicon,sysctrl", "syscon";
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reg = <0x3e00000 0x00100000>;
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reg = <0x3e00000 0x00100000>;
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};
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};
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@ -0,0 +1,96 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2020 Hisilicon Limited.
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*
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* DTS file for Hisilicon SD5203 Board
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*/
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/dts-v1/;
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/ {
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model = "Hisilicon SD5203";
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compatible = "H836ASDJ", "hisilicon,sd5203";
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interrupt-parent = <&vic>;
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000";
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};
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aliases {
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serial0 = &uart0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0 {
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device_type = "cpu";
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compatible = "arm,arm926ej-s";
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reg = <0x0>;
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};
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};
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memory@30000000 {
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device_type = "memory";
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reg = <0x30000000 0x8000000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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vic: interrupt-controller@10130000 {
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compatible = "snps,dw-apb-ictl";
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reg = <0x10130000 0x1000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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refclk125mhz: refclk125mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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};
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timer0: timer@16002000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x16002000 0x1000>;
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interrupts = <4>;
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clocks = <&refclk125mhz>;
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clock-names = "apb_pclk";
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};
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timer1: timer@16003000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x16003000 0x1000>;
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interrupts = <5>;
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clocks = <&refclk125mhz>;
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clock-names = "apb_pclk";
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};
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uart0: serial@1600d000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x1600d000 0x1000>;
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bus_id = "uart0";
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clocks = <&refclk125mhz>;
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clock-names = "baudclk", "apb_pclk";
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reg-shift = <2>;
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interrupts = <17>;
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};
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uart1: serial@1600c000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x1600c000 0x1000>;
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clocks = <&refclk125mhz>;
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clock-names = "baudclk", "apb_pclk";
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reg-shift = <2>;
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interrupts = <16>;
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status = "disabled";
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};
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};
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};
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