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drm/amdgpu: Rename amdgpu_gfx_kcq_queue_mask_transform() 

Rename it to amdgpu_queue_mask_bit_to_set_resource_bit() to be more
specific about its functionality. KFD will use it later.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yong Zhao 2020-03-04 16:46:13 -05:00 committed by Alex Deucher
parent 942a0dd2d6
commit 5c180eb910
2 changed files with 9 additions and 9 deletions
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16
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
View File

@ -48,7 +48,7 @@ int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
return bit;
}
void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
void amdgpu_queue_mask_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
int *mec, int *pipe, int *queue)
{
*queue = bit % adev->gfx.mec.num_queue_per_pipe;
@ -274,7 +274,7 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap))
continue;
amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
amdgpu_queue_mask_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
/*
* 1. Using pipes 2/3 from MEC 2 seems cause problems.
@ -485,17 +485,17 @@ int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev)
return amdgpu_ring_test_helper(kiq_ring);
}
int amdgpu_gfx_kcq_queue_mask_transform(struct amdgpu_device *adev,
int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
int queue_bit)
{
int mec, pipe, queue;
int queue_kcq_bit = 0;
int set_resource_bit = 0;
amdgpu_gfx_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
amdgpu_queue_mask_bit_to_mec_queue(adev, queue_bit, &mec, &pipe, &queue);
queue_kcq_bit = mec * 4 * 8 + pipe * 8 + queue;
set_resource_bit = mec * 4 * 8 + pipe * 8 + queue;
return queue_kcq_bit;
return set_resource_bit;
}
int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
@ -520,7 +520,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev)
break;
}
queue_mask |= (1ull << amdgpu_gfx_kcq_queue_mask_transform(adev, i));
queue_mask |= (1ull << amdgpu_queue_mask_bit_to_set_resource_bit(adev, i));
}
DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,

2
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
View File

@ -364,7 +364,7 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev);
int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
int pipe, int queue);
void amdgpu_gfx_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
void amdgpu_queue_mask_bit_to_mec_queue(struct amdgpu_device *adev, int bit,
int *mec, int *pipe, int *queue);
bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec,
int pipe, int queue);