clk: at91: sam9x60: Don't use audio PLL
On sam9x60, there is not audio PLL and so I2S and classD have to use one
of the best matching parents for their generated clock.
Fixes: 01e2113de9
("clk: at91: add sam9x60 pmc driver")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lkml.kernel.org/r/20200131115816.12483-1-codrin.ciubotariu@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
parent
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@ -124,7 +124,6 @@ static const struct {
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char *n;
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u8 id;
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struct clk_range r;
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bool pll;
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} sam9x60_gck[] = {
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{ .n = "flex0_gclk", .id = 5, },
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{ .n = "flex1_gclk", .id = 6, },
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@ -144,11 +143,9 @@ static const struct {
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{ .n = "sdmmc1_gclk", .id = 26, .r = { .min = 0, .max = 105000000 }, },
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{ .n = "flex11_gclk", .id = 32, },
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{ .n = "flex12_gclk", .id = 33, },
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{ .n = "i2s_gclk", .id = 34, .r = { .min = 0, .max = 105000000 },
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.pll = true, },
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{ .n = "i2s_gclk", .id = 34, .r = { .min = 0, .max = 105000000 }, },
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{ .n = "pit64b_gclk", .id = 37, },
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{ .n = "classd_gclk", .id = 42, .r = { .min = 0, .max = 100000000 },
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.pll = true, },
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{ .n = "classd_gclk", .id = 42, .r = { .min = 0, .max = 100000000 }, },
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{ .n = "tcb1_gclk", .id = 45, },
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{ .n = "dbgu_gclk", .id = 47, },
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};
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@ -290,7 +287,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
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sam9x60_gck[i].n,
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parent_names, 6,
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sam9x60_gck[i].id,
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sam9x60_gck[i].pll,
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false,
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&sam9x60_gck[i].r);
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if (IS_ERR(hw))
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goto err_free;
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