ASoC: codecs: msm8916-wcd-digital: move gains from SX_TLV to S8_TLV
move all the digital gains form using SX_TLV to S8_TLV, these gains are actually 8 bit gains with 7th signed bit and ranges from -84dB to +40dB rest of the Qualcomm wcd codecs uses these properly. Fixes:ef8a4757a6
("ASoC: msm8916-wcd-digital: Add sidetone support") Fixes:150db8c5af
("ASoC: codecs: Add msm8916-wcd digital codec") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220609111901.318047-2-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -328,8 +328,8 @@ static const struct snd_kcontrol_new rx1_mix2_inp1_mux = SOC_DAPM_ENUM(
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static const struct snd_kcontrol_new rx2_mix2_inp1_mux = SOC_DAPM_ENUM(
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"RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
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/* Digital Gain control -38.4 dB to +38.4 dB in 0.3 dB steps */
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static const DECLARE_TLV_DB_SCALE(digital_gain, -3840, 30, 0);
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/* Digital Gain control -84 dB to +40 dB in 1 dB steps */
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static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
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/* Cutoff Freq for High Pass Filter at -3dB */
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static const char * const hpf_cutoff_text[] = {
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@ -510,15 +510,15 @@ static int wcd_iir_filter_info(struct snd_kcontrol *kcontrol,
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static const struct snd_kcontrol_new msm8916_wcd_digital_snd_controls[] = {
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SOC_SINGLE_S8_TLV("RX1 Digital Volume", LPASS_CDC_RX1_VOL_CTL_B2_CTL,
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-128, 127, digital_gain),
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("RX2 Digital Volume", LPASS_CDC_RX2_VOL_CTL_B2_CTL,
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-128, 127, digital_gain),
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("RX3 Digital Volume", LPASS_CDC_RX3_VOL_CTL_B2_CTL,
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-128, 127, digital_gain),
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("TX1 Digital Volume", LPASS_CDC_TX1_VOL_CTL_GAIN,
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-128, 127, digital_gain),
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("TX2 Digital Volume", LPASS_CDC_TX2_VOL_CTL_GAIN,
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-128, 127, digital_gain),
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-84, 40, digital_gain),
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SOC_ENUM("TX1 HPF Cutoff", tx1_hpf_cutoff_enum),
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SOC_ENUM("TX2 HPF Cutoff", tx2_hpf_cutoff_enum),
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SOC_SINGLE("TX1 HPF Switch", LPASS_CDC_TX1_MUX_CTL, 3, 1, 0),
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@ -553,22 +553,22 @@ static const struct snd_kcontrol_new msm8916_wcd_digital_snd_controls[] = {
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WCD_IIR_FILTER_CTL("IIR2 Band3", IIR2, BAND3),
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WCD_IIR_FILTER_CTL("IIR2 Band4", IIR2, BAND4),
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WCD_IIR_FILTER_CTL("IIR2 Band5", IIR2, BAND5),
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SOC_SINGLE_SX_TLV("IIR1 INP1 Volume", LPASS_CDC_IIR1_GAIN_B1_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR1 INP2 Volume", LPASS_CDC_IIR1_GAIN_B2_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR1 INP3 Volume", LPASS_CDC_IIR1_GAIN_B3_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR1 INP4 Volume", LPASS_CDC_IIR1_GAIN_B4_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR2 INP1 Volume", LPASS_CDC_IIR2_GAIN_B1_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR2 INP2 Volume", LPASS_CDC_IIR2_GAIN_B2_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR2 INP3 Volume", LPASS_CDC_IIR2_GAIN_B3_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_SX_TLV("IIR2 INP4 Volume", LPASS_CDC_IIR2_GAIN_B4_CTL,
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0, -84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", LPASS_CDC_IIR1_GAIN_B1_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", LPASS_CDC_IIR1_GAIN_B2_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", LPASS_CDC_IIR1_GAIN_B3_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", LPASS_CDC_IIR1_GAIN_B4_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR2 INP1 Volume", LPASS_CDC_IIR2_GAIN_B1_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR2 INP2 Volume", LPASS_CDC_IIR2_GAIN_B2_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR2 INP3 Volume", LPASS_CDC_IIR2_GAIN_B3_CTL,
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-84, 40, digital_gain),
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SOC_SINGLE_S8_TLV("IIR2 INP4 Volume", LPASS_CDC_IIR2_GAIN_B4_CTL,
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-84, 40, digital_gain),
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};
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