mmc: sdhci-s3c: use generic sdhci_set_bus_width()
Now that sdhci_set_bus_width() supports 8-bit bus widths based on the MMC_CAP_8_BIT_DATA capability flag, replace the sdhci-s3c version with the generic sdhci version. Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -414,43 +414,11 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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}
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}
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/**
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* sdhci_s3c_set_bus_width - support 8bit buswidth
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* @host: The SDHCI host being queried
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* @width: MMC_BUS_WIDTH_ macro for the bus width being requested
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*
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* We have 8-bit width support but is not a v3 controller.
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* So we add platform_bus_width() and support 8bit width.
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*/
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static void sdhci_s3c_set_bus_width(struct sdhci_host *host, int width)
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{
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u8 ctrl;
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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switch (width) {
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case MMC_BUS_WIDTH_8:
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ctrl |= SDHCI_CTRL_8BITBUS;
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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break;
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case MMC_BUS_WIDTH_4:
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ctrl |= SDHCI_CTRL_4BITBUS;
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ctrl &= ~SDHCI_CTRL_8BITBUS;
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break;
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default:
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ctrl &= ~SDHCI_CTRL_4BITBUS;
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ctrl &= ~SDHCI_CTRL_8BITBUS;
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break;
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}
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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}
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static struct sdhci_ops sdhci_s3c_ops = {
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static struct sdhci_ops sdhci_s3c_ops = {
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.get_max_clock = sdhci_s3c_get_max_clk,
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.get_max_clock = sdhci_s3c_get_max_clk,
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.set_clock = sdhci_s3c_set_clock,
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.set_clock = sdhci_s3c_set_clock,
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.get_min_clock = sdhci_s3c_get_min_clock,
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.get_min_clock = sdhci_s3c_get_min_clock,
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.set_bus_width = sdhci_s3c_set_bus_width,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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};
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