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arm64/sysreg: Convert ID_MMFR4_EL1 to automatic generation 

Convert ID_MMFR4_EL1 to be automatically generated as per DDI0487I.a,
no functional changes.

Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20221130171637.718182-22-james.morse@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
James Morse 2022-11-30 17:16:20 +00:00 committed by Will Deacon
parent 8fe2a9c578
commit 5b380ae0e2
2 changed files with 38 additions and 10 deletions
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10
arch/arm64/include/asm/sysreg.h
View File

@ -171,7 +171,6 @@
#define SYS_ID_DFR0_EL1 sys_reg(3, 0, 0, 1, 2)
#define SYS_ID_DFR1_EL1 sys_reg(3, 0, 0, 3, 5)
#define SYS_ID_AFR0_EL1 sys_reg(3, 0, 0, 1, 3)
#define SYS_ID_MMFR4_EL1 sys_reg(3, 0, 0, 2, 6)
#define SYS_ID_MMFR5_EL1 sys_reg(3, 0, 0, 3, 6)
#define SYS_ID_ISAR0_EL1 sys_reg(3, 0, 0, 2, 0)
@ -727,15 +726,6 @@
#define ID_ISAR6_EL1_DP_SHIFT 4
#define ID_ISAR6_EL1_JSCVT_SHIFT 0
#define ID_MMFR4_EL1_EVT_SHIFT 28
#define ID_MMFR4_EL1_CCIDX_SHIFT 24
#define ID_MMFR4_EL1_LSM_SHIFT 20
#define ID_MMFR4_EL1_HPDS_SHIFT 16
#define ID_MMFR4_EL1_CnP_SHIFT 12
#define ID_MMFR4_EL1_XNX_SHIFT 8
#define ID_MMFR4_EL1_AC2_SHIFT 4
#define ID_MMFR4_EL1_SpecSEI_SHIFT 0
#define ID_MMFR5_EL1_ETS_SHIFT 0
#define ID_PFR0_EL1_DIT_SHIFT 24

38
arch/arm64/tools/sysreg
View File

@ -223,6 +223,44 @@ Enum 3:0 CMaintVA
EndEnum
EndSysreg
Sysreg ID_MMFR4_EL1 3 0 0 2 6
Res0 63:32
Enum 31:28 EVT
0b0000 NI
0b0001 NO_TLBIS
0b0010 TLBIS
EndEnum
Enum 27:24 CCIDX
0b0000 NI
0b0001 IMP
EndEnum
Enum 23:20 LSM
0b0000 NI
0b0001 IMP
EndEnum
Enum 19:16 HPDS
0b0000 NI
0b0001 AA32HPD
0b0010 HPDS2
EndEnum
Enum 15:12 CnP
0b0000 NI
0b0001 IMP
EndEnum
Enum 11:8 XNX
0b0000 NI
0b0001 IMP
EndEnum
Enum 7:4 AC2
0b0000 NI
0b0001 IMP
EndEnum
Enum 3:0 SpecSEI
0b0000 NI
0b0001 IMP
EndEnum
EndSysreg
Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
Enum 63:60 CSV3
0b0000 NI