drm/amdgpu: Move KFD-specific fields into struct amdgpu_vm
Remove struct amdkfd_vm and move the fields into struct amdgpu_vm. This will allow turning a VM created by a DRM render node into a KFD VM. v2: Removed vm_context field Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
This commit is contained in:
parent
48a4438718
commit
5b21d3e5fd
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@ -93,27 +93,6 @@ struct amdkfd_process_info {
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struct amdgpu_amdkfd_fence *eviction_fence;
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};
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/* struct amdkfd_vm -
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* For Memory Eviction KGD requires a mechanism to keep track of all KFD BOs
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* belonging to a KFD process. All the VMs belonging to the same process point
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* to the same amdkfd_process_info.
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*/
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struct amdkfd_vm {
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/* Keep base as the first parameter for pointer compatibility between
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* amdkfd_vm and amdgpu_vm.
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*/
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struct amdgpu_vm base;
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/* List node in amdkfd_process_info.vm_list_head*/
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struct list_head vm_list_node;
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struct amdgpu_device *adev;
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/* Points to the KFD process VM info*/
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struct amdkfd_process_info *process_info;
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uint64_t pd_phys_addr;
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};
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int amdgpu_amdkfd_init(void);
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void amdgpu_amdkfd_fini(void);
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@ -333,9 +333,9 @@ static int amdgpu_amdkfd_validate(void *param, struct amdgpu_bo *bo)
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* again. Page directories are only updated after updating page
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* tables.
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*/
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static int vm_validate_pt_pd_bos(struct amdkfd_vm *vm)
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static int vm_validate_pt_pd_bos(struct amdgpu_vm *vm)
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{
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struct amdgpu_bo *pd = vm->base.root.base.bo;
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struct amdgpu_bo *pd = vm->root.base.bo;
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struct amdgpu_device *adev = amdgpu_ttm_adev(pd->tbo.bdev);
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struct amdgpu_vm_parser param;
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uint64_t addr, flags = AMDGPU_PTE_VALID;
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@ -344,7 +344,7 @@ static int vm_validate_pt_pd_bos(struct amdkfd_vm *vm)
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param.domain = AMDGPU_GEM_DOMAIN_VRAM;
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param.wait = false;
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ret = amdgpu_vm_validate_pt_bos(adev, &vm->base, amdgpu_amdkfd_validate,
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ret = amdgpu_vm_validate_pt_bos(adev, vm, amdgpu_amdkfd_validate,
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¶m);
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if (ret) {
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pr_err("amdgpu: failed to validate PT BOs\n");
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@ -357,11 +357,11 @@ static int vm_validate_pt_pd_bos(struct amdkfd_vm *vm)
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return ret;
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}
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addr = amdgpu_bo_gpu_offset(vm->base.root.base.bo);
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addr = amdgpu_bo_gpu_offset(vm->root.base.bo);
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amdgpu_gmc_get_vm_pde(adev, -1, &addr, &flags);
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vm->pd_phys_addr = addr;
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if (vm->base.use_cpu_for_update) {
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if (vm->use_cpu_for_update) {
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ret = amdgpu_bo_kmap(pd, NULL);
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if (ret) {
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pr_err("amdgpu: failed to kmap PD, ret=%d\n", ret);
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@ -415,14 +415,12 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync)
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* 4a. Validate new page tables and directories
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*/
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static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem,
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struct amdgpu_vm *avm, bool is_aql,
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struct amdgpu_vm *vm, bool is_aql,
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struct kfd_bo_va_list **p_bo_va_entry)
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{
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int ret;
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struct kfd_bo_va_list *bo_va_entry;
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struct amdkfd_vm *kvm = container_of(avm,
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struct amdkfd_vm, base);
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struct amdgpu_bo *pd = avm->root.base.bo;
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struct amdgpu_bo *pd = vm->root.base.bo;
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struct amdgpu_bo *bo = mem->bo;
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uint64_t va = mem->va;
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struct list_head *list_bo_va = &mem->bo_va_list;
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@ -441,10 +439,10 @@ static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem,
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return -ENOMEM;
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pr_debug("\t add VA 0x%llx - 0x%llx to vm %p\n", va,
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va + bo_size, avm);
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va + bo_size, vm);
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/* Add BO to VM internal data structures*/
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bo_va_entry->bo_va = amdgpu_vm_bo_add(adev, avm, bo);
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bo_va_entry->bo_va = amdgpu_vm_bo_add(adev, vm, bo);
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if (!bo_va_entry->bo_va) {
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ret = -EINVAL;
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pr_err("Failed to add BO object to VM. ret == %d\n",
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@ -467,28 +465,28 @@ static int add_bo_to_vm(struct amdgpu_device *adev, struct kgd_mem *mem,
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* fence, so remove it temporarily.
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*/
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amdgpu_amdkfd_remove_eviction_fence(pd,
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kvm->process_info->eviction_fence,
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vm->process_info->eviction_fence,
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NULL, NULL);
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ret = amdgpu_vm_alloc_pts(adev, avm, va, amdgpu_bo_size(bo));
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ret = amdgpu_vm_alloc_pts(adev, vm, va, amdgpu_bo_size(bo));
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if (ret) {
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pr_err("Failed to allocate pts, err=%d\n", ret);
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goto err_alloc_pts;
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}
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ret = vm_validate_pt_pd_bos(kvm);
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ret = vm_validate_pt_pd_bos(vm);
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if (ret) {
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pr_err("validate_pt_pd_bos() failed\n");
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goto err_alloc_pts;
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}
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/* Add the eviction fence back */
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amdgpu_bo_fence(pd, &kvm->process_info->eviction_fence->base, true);
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amdgpu_bo_fence(pd, &vm->process_info->eviction_fence->base, true);
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return 0;
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err_alloc_pts:
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amdgpu_bo_fence(pd, &kvm->process_info->eviction_fence->base, true);
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amdgpu_bo_fence(pd, &vm->process_info->eviction_fence->base, true);
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amdgpu_vm_bo_rmv(adev, bo_va_entry->bo_va);
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list_del(&bo_va_entry->bo_list);
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err_vmadd:
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@ -703,7 +701,6 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev,
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{
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struct amdgpu_bo_va *bo_va = entry->bo_va;
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struct amdgpu_vm *vm = bo_va->base.vm;
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struct amdkfd_vm *kvm = container_of(vm, struct amdkfd_vm, base);
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struct amdgpu_bo *pd = vm->root.base.bo;
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/* Remove eviction fence from PD (and thereby from PTs too as
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@ -713,14 +710,14 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev,
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* trigger the eviction fence.
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*/
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amdgpu_amdkfd_remove_eviction_fence(pd,
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kvm->process_info->eviction_fence,
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vm->process_info->eviction_fence,
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NULL, NULL);
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amdgpu_vm_bo_unmap(adev, bo_va, entry->va);
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amdgpu_vm_clear_freed(adev, vm, &bo_va->last_pt_update);
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/* Add the eviction fence back */
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amdgpu_bo_fence(pd, &kvm->process_info->eviction_fence->base, true);
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amdgpu_bo_fence(pd, &vm->process_info->eviction_fence->base, true);
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sync_vm_fence(adev, sync, bo_va->last_pt_update);
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@ -780,7 +777,7 @@ update_gpuvm_pte_failed:
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static int process_validate_vms(struct amdkfd_process_info *process_info)
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{
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struct amdkfd_vm *peer_vm;
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struct amdgpu_vm *peer_vm;
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int ret;
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list_for_each_entry(peer_vm, &process_info->vm_list_head,
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@ -796,12 +793,12 @@ static int process_validate_vms(struct amdkfd_process_info *process_info)
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static int process_update_pds(struct amdkfd_process_info *process_info,
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struct amdgpu_sync *sync)
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{
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struct amdkfd_vm *peer_vm;
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struct amdgpu_vm *peer_vm;
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int ret;
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list_for_each_entry(peer_vm, &process_info->vm_list_head,
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vm_list_node) {
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ret = vm_update_pds(&peer_vm->base, sync);
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ret = vm_update_pds(peer_vm, sync);
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if (ret)
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return ret;
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}
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@ -814,7 +811,7 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, void **vm,
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struct dma_fence **ef)
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{
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int ret;
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struct amdkfd_vm *new_vm;
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struct amdgpu_vm *new_vm;
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struct amdkfd_process_info *info;
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struct amdgpu_device *adev = get_amdgpu_device(kgd);
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@ -823,12 +820,11 @@ int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, void **vm,
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return -ENOMEM;
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/* Initialize the VM context, allocate the page directory and zero it */
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ret = amdgpu_vm_init(adev, &new_vm->base, AMDGPU_VM_CONTEXT_COMPUTE, 0);
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ret = amdgpu_vm_init(adev, new_vm, AMDGPU_VM_CONTEXT_COMPUTE, 0);
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if (ret) {
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pr_err("Failed init vm ret %d\n", ret);
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goto vm_init_fail;
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}
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new_vm->adev = adev;
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if (!*process_info) {
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info = kzalloc(sizeof(*info), GFP_KERNEL);
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@ -871,7 +867,7 @@ create_evict_fence_fail:
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mutex_destroy(&info->lock);
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kfree(info);
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alloc_process_info_fail:
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amdgpu_vm_fini(adev, &new_vm->base);
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amdgpu_vm_fini(adev, new_vm);
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vm_init_fail:
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kfree(new_vm);
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return ret;
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@ -881,8 +877,7 @@ vm_init_fail:
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void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm)
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{
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struct amdgpu_device *adev = get_amdgpu_device(kgd);
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struct amdkfd_vm *kfd_vm = (struct amdkfd_vm *) vm;
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struct amdgpu_vm *avm = &kfd_vm->base;
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struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
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struct amdgpu_bo *pd;
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struct amdkfd_process_info *process_info;
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@ -896,11 +891,11 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm)
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amdgpu_bo_fence(pd, NULL, false);
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amdgpu_bo_unreserve(pd);
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process_info = kfd_vm->process_info;
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process_info = avm->process_info;
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mutex_lock(&process_info->lock);
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process_info->n_vms--;
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list_del(&kfd_vm->vm_list_node);
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list_del(&avm->vm_list_node);
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mutex_unlock(&process_info->lock);
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/* Release per-process resources */
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@ -919,7 +914,7 @@ void amdgpu_amdkfd_gpuvm_destroy_process_vm(struct kgd_dev *kgd, void *vm)
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uint32_t amdgpu_amdkfd_gpuvm_get_process_page_dir(void *vm)
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{
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struct amdkfd_vm *avm = (struct amdkfd_vm *)vm;
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struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
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return avm->pd_phys_addr >> AMDGPU_GPU_PAGE_SHIFT;
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}
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@ -930,7 +925,7 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
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uint64_t *offset, uint32_t flags)
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{
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struct amdgpu_device *adev = get_amdgpu_device(kgd);
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struct amdkfd_vm *kfd_vm = (struct amdkfd_vm *)vm;
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struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
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struct amdgpu_bo *bo;
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int byte_align;
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u32 alloc_domain;
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@ -1010,8 +1005,8 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
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(*mem)->va = va;
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(*mem)->domain = alloc_domain;
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(*mem)->mapped_to_gpu_memory = 0;
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(*mem)->process_info = kfd_vm->process_info;
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add_kgd_mem_to_kfd_bo_list(*mem, kfd_vm->process_info);
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(*mem)->process_info = avm->process_info;
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add_kgd_mem_to_kfd_bo_list(*mem, avm->process_info);
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if (offset)
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*offset = amdgpu_bo_mmap_offset(bo);
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@ -1092,7 +1087,7 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
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struct kgd_dev *kgd, struct kgd_mem *mem, void *vm)
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{
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struct amdgpu_device *adev = get_amdgpu_device(kgd);
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struct amdkfd_vm *kfd_vm = (struct amdkfd_vm *)vm;
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struct amdgpu_vm *avm = (struct amdgpu_vm *)vm;
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int ret;
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struct amdgpu_bo *bo;
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uint32_t domain;
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@ -1128,19 +1123,19 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
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if (unlikely(ret))
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goto out;
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if (check_if_add_bo_to_vm((struct amdgpu_vm *)vm, mem)) {
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ret = add_bo_to_vm(adev, mem, (struct amdgpu_vm *)vm, false,
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if (check_if_add_bo_to_vm(avm, mem)) {
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ret = add_bo_to_vm(adev, mem, avm, false,
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&bo_va_entry);
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if (ret)
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goto add_bo_to_vm_failed;
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if (mem->aql_queue) {
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ret = add_bo_to_vm(adev, mem, (struct amdgpu_vm *)vm,
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ret = add_bo_to_vm(adev, mem, avm,
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true, &bo_va_entry_aql);
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if (ret)
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goto add_bo_to_vm_failed_aql;
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}
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} else {
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ret = vm_validate_pt_pd_bos((struct amdkfd_vm *)vm);
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ret = vm_validate_pt_pd_bos(avm);
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if (unlikely(ret))
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goto add_bo_to_vm_failed;
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}
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@ -1184,7 +1179,7 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
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if (!amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) && !bo->pin_count)
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amdgpu_bo_fence(bo,
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&kfd_vm->process_info->eviction_fence->base,
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&avm->process_info->eviction_fence->base,
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true);
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ret = unreserve_bo_and_vms(&ctx, false, false);
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@ -1209,7 +1204,7 @@ int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
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{
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struct amdgpu_device *adev = get_amdgpu_device(kgd);
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struct amdkfd_process_info *process_info =
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((struct amdkfd_vm *)vm)->process_info;
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((struct amdgpu_vm *)vm)->process_info;
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unsigned long bo_size = mem->bo->tbo.mem.size;
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struct kfd_bo_va_list *entry;
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struct bo_vm_reservation_context ctx;
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@ -1226,7 +1221,7 @@ int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
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goto unreserve_out;
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}
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ret = vm_validate_pt_pd_bos((struct amdkfd_vm *)vm);
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ret = vm_validate_pt_pd_bos((struct amdgpu_vm *)vm);
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if (unlikely(ret))
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goto unreserve_out;
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@ -1368,7 +1363,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
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{
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struct amdgpu_bo_list_entry *pd_bo_list;
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struct amdkfd_process_info *process_info = info;
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struct amdkfd_vm *peer_vm;
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struct amdgpu_vm *peer_vm;
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struct kgd_mem *mem;
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struct bo_vm_reservation_context ctx;
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struct amdgpu_amdkfd_fence *new_fence;
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@ -1390,8 +1385,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
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mutex_lock(&process_info->lock);
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list_for_each_entry(peer_vm, &process_info->vm_list_head,
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vm_list_node)
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amdgpu_vm_get_pd_bo(&peer_vm->base, &ctx.list,
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&pd_bo_list[i++]);
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amdgpu_vm_get_pd_bo(peer_vm, &ctx.list, &pd_bo_list[i++]);
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/* Reserve all BOs and page tables/directory. Add all BOs from
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* kfd_bo_list to ctx.list
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@ -1422,7 +1416,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
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/* FIXME: I think this isn't needed */
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list_for_each_entry(peer_vm, &process_info->vm_list_head,
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vm_list_node) {
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struct amdgpu_bo *bo = peer_vm->base.root.base.bo;
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struct amdgpu_bo *bo = peer_vm->root.base.bo;
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ttm_bo_wait(&bo->tbo, false, false);
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}
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@ -1491,7 +1485,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef)
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/* Attach eviction fence to PD / PT BOs */
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list_for_each_entry(peer_vm, &process_info->vm_list_head,
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vm_list_node) {
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struct amdgpu_bo *bo = peer_vm->base.root.base.bo;
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struct amdgpu_bo *bo = peer_vm->root.base.bo;
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amdgpu_bo_fence(bo, &process_info->eviction_fence->base, true);
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}
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@ -207,6 +207,15 @@ struct amdgpu_vm {
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/* Limit non-retry fault storms */
|
||||
unsigned int fault_credit;
|
||||
|
||||
/* Points to the KFD process VM info */
|
||||
struct amdkfd_process_info *process_info;
|
||||
|
||||
/* List node in amdkfd_process_info.vm_list_head */
|
||||
struct list_head vm_list_node;
|
||||
|
||||
/* Valid while the PD is reserved or fenced */
|
||||
uint64_t pd_phys_addr;
|
||||
};
|
||||
|
||||
struct amdgpu_vm_manager {
|
||||
|
|
Loading…
Reference in New Issue