habanalabs/gaudi2: remove configurations to access the MSI-X doorbell
The virtual MSI-X doorbell is supported now in F/W, so all configurations to access the PCIE_DBI MSI-X doorbell can be removed. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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@ -4473,23 +4473,9 @@ static void gaudi2_init_sm(struct hl_device *hdev)
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reg_val = FIELD_PREP(DCORE0_SYNC_MNGR_OBJS_MON_CONFIG_CQ_EN_MASK, 1);
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WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_CONFIG_0 + (4 * i), reg_val);
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/* Init CQ0 DB */
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/* Configure the monitor to trigger MSI-X interrupt */
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/* TODO:
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* Remove the if statement when virtual MSI-X doorbell is supported in simulator (SW-93022)
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* and in F/W (SW-93024).
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*/
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if (!hdev->pdev || hdev->asic_prop.fw_security_enabled) {
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u64 msix_db_reg = CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF;
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(msix_db_reg));
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0, upper_32_bits(msix_db_reg));
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} else {
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0,
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lower_32_bits(gaudi2->virt_msix_db_dma_addr));
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0,
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upper_32_bits(gaudi2->virt_msix_db_dma_addr));
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}
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/* Init CQ0 DB - configure the monitor to trigger MSI-X interrupt */
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(gaudi2->virt_msix_db_dma_addr));
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0, upper_32_bits(gaudi2->virt_msix_db_dma_addr));
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WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0, GAUDI2_IRQ_NUM_COMPLETION);
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for (i = 0 ; i < GAUDI2_RESERVED_CQ_NUMBER ; i++) {
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@ -4657,20 +4643,6 @@ static void gaudi2_init_vdec_brdg_ctrl(struct hl_device *hdev, u64 base_addr, u3
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{
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u32 sob_id;
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/* TODO:
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* Remove when virtual MSI-X doorbell is supported in simulator (SW-93022) and in F/W
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* (SW-93024).
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*/
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if (!hdev->pdev || hdev->asic_prop.fw_security_enabled) {
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u32 interrupt_id = GAUDI2_IRQ_NUM_DCORE0_DEC0_NRM + 2 * decoder_id;
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WREG32(base_addr + BRDG_CTRL_NRM_MSIX_LBW_AWADDR, mmPCIE_DBI_MSIX_DOORBELL_OFF);
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WREG32(base_addr + BRDG_CTRL_NRM_MSIX_LBW_WDATA, interrupt_id);
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WREG32(base_addr + BRDG_CTRL_ABNRM_MSIX_LBW_AWADDR, mmPCIE_DBI_MSIX_DOORBELL_OFF);
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WREG32(base_addr + BRDG_CTRL_ABNRM_MSIX_LBW_WDATA, interrupt_id + 1);
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return;
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}
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/* VCMD normal interrupt */
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sob_id = GAUDI2_RESERVED_SOB_DEC_NRM_FIRST + decoder_id;
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WREG32(base_addr + BRDG_CTRL_NRM_MSIX_LBW_AWADDR,
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