A few MIPS fixes:
- Fix VDSO time-related function behavior for systems where we need to fall back to syscalls, but were instead returning bogus results. - A fix to TLB exception handlers for Cavium Octeon systems where they would inadvertently clobber the $1/$at register. - A build fix for bcm63xx configurations. - Switch to using my @kernel.org email address. -----BEGIN PGP SIGNATURE----- iIwEABYIADQWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXbTEbhYccGF1bGJ1cnRv bkBrZXJuZWwub3JnAAoJED6nn6y1dQDd+HsBAJ2Zvzlm+CftfNTPbG1SihhyH3s4 edn8VuexsPJp+TjJAP9UZHPQj35tvS5MWYRg0YsNz9HYPTVclYdEsLS9KbSMCw== =YNU+ -----END PGP SIGNATURE----- Merge tag 'mips_fixes_5.4_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Paul Burton: "A few MIPS fixes: - Fix VDSO time-related function behavior for systems where we need to fall back to syscalls, but were instead returning bogus results. - A fix to TLB exception handlers for Cavium Octeon systems where they would inadvertently clobber the $1/$at register. - A build fix for bcm63xx configurations. - Switch to using my @kernel.org email address" * tag 'mips_fixes_5.4_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: tlbex: Fix build_restore_pagemask KScratch restore MIPS: bmips: mark exception vectors as char arrays mips: vdso: Fix __arch_get_hw_counter() MAINTAINERS: Use @kernel.org address for Paul Burton
This commit is contained in:
commit
5a1e843c66
3
.mailmap
3
.mailmap
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@ -196,7 +196,8 @@ Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
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Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
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Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
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Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
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Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
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Patrick Mochel <mochel@digitalimplant.org>
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Patrick Mochel <mochel@digitalimplant.org>
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Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
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Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
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Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
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Peter A Jonsson <pj@ludd.ltu.se>
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Peter A Jonsson <pj@ludd.ltu.se>
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Peter Oruba <peter@oruba.de>
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Peter Oruba <peter@oruba.de>
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Peter Oruba <peter.oruba@amd.com>
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Peter Oruba <peter.oruba@amd.com>
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10
MAINTAINERS
10
MAINTAINERS
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@ -3098,7 +3098,7 @@ S: Supported
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F: arch/arm64/net/
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F: arch/arm64/net/
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BPF JIT for MIPS (32-BIT AND 64-BIT)
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BPF JIT for MIPS (32-BIT AND 64-BIT)
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M: Paul Burton <paul.burton@mips.com>
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M: Paul Burton <paulburton@kernel.org>
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L: netdev@vger.kernel.org
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L: netdev@vger.kernel.org
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L: bpf@vger.kernel.org
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L: bpf@vger.kernel.org
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S: Maintained
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S: Maintained
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@ -8002,7 +8002,7 @@ S: Maintained
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F: drivers/usb/atm/ueagle-atm.c
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F: drivers/usb/atm/ueagle-atm.c
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IMGTEC ASCII LCD DRIVER
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IMGTEC ASCII LCD DRIVER
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M: Paul Burton <paul.burton@mips.com>
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M: Paul Burton <paulburton@kernel.org>
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S: Maintained
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S: Maintained
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F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
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F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
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F: drivers/auxdisplay/img-ascii-lcd.c
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F: drivers/auxdisplay/img-ascii-lcd.c
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@ -10829,7 +10829,7 @@ F: drivers/usb/image/microtek.*
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MIPS
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MIPS
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M: Ralf Baechle <ralf@linux-mips.org>
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M: Ralf Baechle <ralf@linux-mips.org>
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M: Paul Burton <paul.burton@mips.com>
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M: Paul Burton <paulburton@kernel.org>
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M: James Hogan <jhogan@kernel.org>
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M: James Hogan <jhogan@kernel.org>
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L: linux-mips@vger.kernel.org
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L: linux-mips@vger.kernel.org
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W: http://www.linux-mips.org/
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W: http://www.linux-mips.org/
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@ -10843,7 +10843,7 @@ F: arch/mips/
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F: drivers/platform/mips/
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F: drivers/platform/mips/
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MIPS BOSTON DEVELOPMENT BOARD
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MIPS BOSTON DEVELOPMENT BOARD
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M: Paul Burton <paul.burton@mips.com>
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M: Paul Burton <paulburton@kernel.org>
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L: linux-mips@vger.kernel.org
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L: linux-mips@vger.kernel.org
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S: Maintained
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S: Maintained
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F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
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F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
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@ -10853,7 +10853,7 @@ F: drivers/clk/imgtec/clk-boston.c
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F: include/dt-bindings/clock/boston-clock.h
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F: include/dt-bindings/clock/boston-clock.h
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MIPS GENERIC PLATFORM
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MIPS GENERIC PLATFORM
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M: Paul Burton <paul.burton@mips.com>
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M: Paul Burton <paulburton@kernel.org>
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L: linux-mips@vger.kernel.org
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L: linux-mips@vger.kernel.org
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S: Supported
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S: Supported
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F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
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F: Documentation/devicetree/bindings/power/mti,mips-cpc.txt
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@ -84,7 +84,7 @@ void __init prom_init(void)
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* Here we will start up CPU1 in the background and ask it to
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* Here we will start up CPU1 in the background and ask it to
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* reconfigure itself then go back to sleep.
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* reconfigure itself then go back to sleep.
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*/
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*/
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memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
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memcpy((void *)0xa0000200, bmips_smp_movevec, 0x20);
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__sync();
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__sync();
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set_c0_cause(C_SW0);
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set_c0_cause(C_SW0);
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cpumask_set_cpu(1, &bmips_booted_mask);
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cpumask_set_cpu(1, &bmips_booted_mask);
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@ -75,11 +75,11 @@ static inline int register_bmips_smp_ops(void)
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#endif
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#endif
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}
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}
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extern char bmips_reset_nmi_vec;
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extern char bmips_reset_nmi_vec[];
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extern char bmips_reset_nmi_vec_end;
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extern char bmips_reset_nmi_vec_end[];
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extern char bmips_smp_movevec;
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extern char bmips_smp_movevec[];
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extern char bmips_smp_int_vec;
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extern char bmips_smp_int_vec[];
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extern char bmips_smp_int_vec_end;
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extern char bmips_smp_int_vec_end[];
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extern int bmips_smp_enabled;
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extern int bmips_smp_enabled;
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extern int bmips_cpu_offset;
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extern int bmips_cpu_offset;
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@ -24,6 +24,8 @@
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#define VDSO_HAS_CLOCK_GETRES 1
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#define VDSO_HAS_CLOCK_GETRES 1
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#define __VDSO_USE_SYSCALL ULLONG_MAX
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#ifdef CONFIG_MIPS_CLOCK_VSYSCALL
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#ifdef CONFIG_MIPS_CLOCK_VSYSCALL
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static __always_inline long gettimeofday_fallback(
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static __always_inline long gettimeofday_fallback(
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break;
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break;
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#endif
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#endif
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default:
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default:
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cycle_now = 0;
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cycle_now = __VDSO_USE_SYSCALL;
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break;
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break;
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}
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}
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@ -464,10 +464,10 @@ static void bmips_wr_vec(unsigned long dst, char *start, char *end)
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static inline void bmips_nmi_handler_setup(void)
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static inline void bmips_nmi_handler_setup(void)
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{
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{
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bmips_wr_vec(BMIPS_NMI_RESET_VEC, &bmips_reset_nmi_vec,
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bmips_wr_vec(BMIPS_NMI_RESET_VEC, bmips_reset_nmi_vec,
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&bmips_reset_nmi_vec_end);
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bmips_reset_nmi_vec_end);
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bmips_wr_vec(BMIPS_WARM_RESTART_VEC, &bmips_smp_int_vec,
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bmips_wr_vec(BMIPS_WARM_RESTART_VEC, bmips_smp_int_vec,
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&bmips_smp_int_vec_end);
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bmips_smp_int_vec_end);
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}
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}
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struct reset_vec_info {
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struct reset_vec_info {
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@ -653,6 +653,13 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r,
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int restore_scratch)
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int restore_scratch)
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{
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{
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if (restore_scratch) {
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if (restore_scratch) {
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/*
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* Ensure the MFC0 below observes the value written to the
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* KScratch register by the prior MTC0.
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*/
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if (scratch_reg >= 0)
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uasm_i_ehb(p);
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/* Reset default page size */
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/* Reset default page size */
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if (PM_DEFAULT_MASK >> 16) {
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if (PM_DEFAULT_MASK >> 16) {
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uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
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uasm_i_lui(p, tmp, PM_DEFAULT_MASK >> 16);
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@ -667,12 +674,10 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r,
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uasm_i_mtc0(p, 0, C0_PAGEMASK);
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uasm_i_mtc0(p, 0, C0_PAGEMASK);
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uasm_il_b(p, r, lid);
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uasm_il_b(p, r, lid);
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}
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}
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if (scratch_reg >= 0) {
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if (scratch_reg >= 0)
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uasm_i_ehb(p);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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} else {
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else
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UASM_i_LW(p, 1, scratchpad_offset(0), 0);
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UASM_i_LW(p, 1, scratchpad_offset(0), 0);
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}
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} else {
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} else {
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/* Reset default page size */
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/* Reset default page size */
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if (PM_DEFAULT_MASK >> 16) {
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if (PM_DEFAULT_MASK >> 16) {
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}
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}
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if (mode != not_refill && check_for_high_segbits) {
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if (mode != not_refill && check_for_high_segbits) {
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uasm_l_large_segbits_fault(l, *p);
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uasm_l_large_segbits_fault(l, *p);
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if (mode == refill_scratch && scratch_reg >= 0)
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uasm_i_ehb(p);
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/*
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/*
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* We get here if we are an xsseg address, or if we are
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* We get here if we are an xsseg address, or if we are
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* an xuseg address above (PGDIR_SHIFT+PGDIR_BITS) boundary.
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* an xuseg address above (PGDIR_SHIFT+PGDIR_BITS) boundary.
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uasm_i_jr(p, ptr);
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uasm_i_jr(p, ptr);
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if (mode == refill_scratch) {
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if (mode == refill_scratch) {
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if (scratch_reg >= 0) {
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if (scratch_reg >= 0)
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uasm_i_ehb(p);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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} else {
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else
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UASM_i_LW(p, 1, scratchpad_offset(0), 0);
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UASM_i_LW(p, 1, scratchpad_offset(0), 0);
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}
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} else {
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} else {
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uasm_i_nop(p);
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uasm_i_nop(p);
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}
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}
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Loading…
Reference in New Issue