platform/x86: mlx-platform: Add definitions for new registers
Add definitions for new registers: - CPLD3 version - next generation systems are equipped with three CPLD; - Two reset cause registers, which store the system reset reason (like system failures, upgrade failures and so on; Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
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@ -49,7 +49,10 @@
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#define MLXPLAT_CPLD_LPC_REG_BASE_ADRR 0x2500
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#define MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET 0x00
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#define MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET 0x01
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#define MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET 0x02
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#define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d
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#define MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET 0x1e
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#define MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET 0x1f
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#define MLXPLAT_CPLD_LPC_REG_LED1_OFFSET 0x20
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#define MLXPLAT_CPLD_LPC_REG_LED2_OFFSET 0x21
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#define MLXPLAT_CPLD_LPC_REG_LED3_OFFSET 0x22
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@ -1208,7 +1211,10 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
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switch (reg) {
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case MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
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@ -1258,7 +1264,10 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
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switch (reg) {
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case MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
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case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
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