powerpc: Reformat lppaca.h
Reformat lppaca.h to match Linux coding standards. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Anton Blanchard
Benjamin Herrenschmidt
parent
448054a650
commit
59c19cb2f6
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@ -20,18 +20,16 @@
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#define _ASM_POWERPC_LPPACA_H
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#ifdef __KERNEL__
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/* These definitions relate to hypervisors that only exist when using
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/*
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* These definitions relate to hypervisors that only exist when using
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* a server type processor
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*/
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#ifdef CONFIG_PPC_BOOK3S
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//=============================================================================
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//
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// This control block contains the data that is shared between the
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// hypervisor and the OS.
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//
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//
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//----------------------------------------------------------------------------
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/*
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* This control block contains the data that is shared between the
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* hypervisor and the OS.
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*/
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#include <linux/cache.h>
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#include <linux/threads.h>
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#include <asm/types.h>
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@ -43,67 +41,65 @@
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*/
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#define NR_LPPACAS 1
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/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
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* alignment is sufficient to prevent this */
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/*
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* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
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* alignment is sufficient to prevent this
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*/
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struct lppaca {
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//=============================================================================
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// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
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//=============================================================================
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u32 desc; // Eye catcher 0xD397D781 x00-x03
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u16 size; // Size of this struct x04-x05
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u16 reserved1; // Reserved x06-x07
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u16 reserved2:14; // Reserved x08-x09
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u8 shared_proc:1; // Shared processor indicator ...
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u8 secondary_thread:1; // Secondary thread indicator ...
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u8 reserved3[14]; // x0A-x17
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volatile u32 dyn_hw_node_id; // Dynamic Hardware Node id x18-x1B
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volatile u32 dyn_hw_proc_id; // Dynamic Hardware Proc Id x1C-x1F
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u8 reserved4[56]; // Reserved x20-x57
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volatile u8 vphn_assoc_counts[8]; // Virtual processor home node
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// associativity change counters x58-x5F
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u8 reserved5[32]; // Reserved x60-x7F
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/* cacheline 1 contains read-only data */
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//=============================================================================
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// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
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//=============================================================================
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u32 desc; /* Eye catcher 0xD397D781 */
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u16 size; /* Size of this struct */
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u16 reserved1;
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u16 reserved2:14;
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u8 shared_proc:1; /* Shared processor indicator */
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u8 secondary_thread:1; /* Secondary thread indicator */
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u8 reserved3[14];
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volatile u32 dyn_hw_node_id; /* Dynamic hardware node id */
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volatile u32 dyn_hw_proc_id; /* Dynamic hardware proc id */
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u8 reserved4[56];
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volatile u8 vphn_assoc_counts[8]; /* Virtual processor home node */
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/* associativity change counters */
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u8 reserved5[32];
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u8 reserved6[48]; // x00-x2f
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u8 cede_latency_hint; /* x30 */
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u8 reserved7[7]; /* x31-x37 */
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u8 dtl_enable_mask; // Dispatch Trace Log mask x38-x38
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u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39
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u8 fpregs_in_use; // FP regs in use x3A-x3A
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u8 pmcregs_in_use; // PMC regs in use x3B-x3B
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u8 reserved8[28]; // x3C-x57
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u64 wait_state_cycles; // Wait cycles for this proc x58-x5F
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u8 reserved9[28]; // x60-x7B
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u16 slb_count; // # of SLBs to maintain x7C-x7D
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u8 idle; // Indicate OS is idle x7E
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u8 vmxregs_in_use; // VMX registers in use x7F
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/* cacheline 2 contains local read-write data */
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//=============================================================================
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// CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors
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//=============================================================================
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// This is the yield_count. An "odd" value (low bit on) means that
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// the processor is yielded (either because of an OS yield or a PLIC
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// preempt). An even value implies that the processor is currently
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// executing.
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// NOTE: This value will ALWAYS be zero for dedicated processors and
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// will NEVER be zero for shared processors (ie, initialized to a 1).
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volatile u32 yield_count; // PLIC increments each dispatchx00-x03
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volatile u32 dispersion_count; // dispatch changed phys cpu x04-x07
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volatile u64 cmo_faults; // CMO page fault count x08-x0F
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volatile u64 cmo_fault_time; // CMO page fault time x10-x17
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u8 reserved10[104]; // Reserved x18-x7F
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u8 reserved6[48];
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u8 cede_latency_hint;
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u8 reserved7[7];
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u8 dtl_enable_mask; /* Dispatch Trace Log mask */
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u8 donate_dedicated_cpu; /* Donate dedicated CPU cycles */
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u8 fpregs_in_use;
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u8 pmcregs_in_use;
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u8 reserved8[28];
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u64 wait_state_cycles; /* Wait cycles for this proc */
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u8 reserved9[28];
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u16 slb_count; /* # of SLBs to maintain */
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u8 idle; /* Indicate OS is idle */
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u8 vmxregs_in_use;
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//=============================================================================
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// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
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//=============================================================================
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u32 page_ins; // CMO Hint - # page ins by OS x00-x03
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u8 reserved11[148]; // Reserved x04-x97
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volatile u64 dtl_idx; // Dispatch Trace Log head idx x98-x9F
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u8 reserved12[96]; // Reserved xA0-xFF
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/* cacheline 3 is shared with other processors */
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/*
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* This is the yield_count. An "odd" value (low bit on) means that
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* the processor is yielded (either because of an OS yield or a
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* hypervisor preempt). An even value implies that the processor is
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* currently executing.
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* NOTE: This value will ALWAYS be zero for dedicated processors and
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* will NEVER be zero for shared processors (ie, initialized to a 1).
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*/
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volatile u32 yield_count;
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volatile u32 dispersion_count; /* dispatch changed physical cpu */
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volatile u64 cmo_faults; /* CMO page fault count */
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volatile u64 cmo_fault_time; /* CMO page fault time */
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u8 reserved10[104];
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/* cacheline 4-5 */
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u32 page_ins; /* CMO Hint - # page ins by OS */
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u8 reserved11[148];
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volatile u64 dtl_idx; /* Dispatch Trace Log head index */
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u8 reserved12[96];
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} __attribute__((__aligned__(0x400)));
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extern struct lppaca lppaca[];
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@ -116,13 +112,13 @@ extern struct lppaca lppaca[];
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* ESID is stored in the lower 64bits, then the VSID.
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*/
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struct slb_shadow {
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u32 persistent; // Number of persistent SLBs x00-x03
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u32 buffer_length; // Total shadow buffer length x04-x07
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u64 reserved; // Alignment x08-x0f
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u32 persistent; /* Number of persistent SLBs */
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u32 buffer_length; /* Total shadow buffer length */
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u64 reserved;
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struct {
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u64 esid;
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u64 vsid;
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} save_area[SLB_NUM_BOLTED]; // x10-x40
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} save_area[SLB_NUM_BOLTED];
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} ____cacheline_aligned;
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extern struct slb_shadow slb_shadow[];
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