net/mlx5e: Remove wrong poll CQ optimization
With the MLX5E_CQ_HAS_CQES optimization flag, the following buggy
flow might occur:
- Suppose RX is always busy, TX has a single packet every second.
- We poll a single TX cqe and clear its flag.
- We never arm it again as RX is always busy.
- TX CQ flag is never changed, and new TX cqes are not polled.
We revert this optimization.
Fixes: e586b3b0ba
('net/mlx5: Ethernet Datapath files')
Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
607e681111
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59a7c2fd33
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@ -304,14 +304,9 @@ enum {
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MLX5E_RQ_STATE_POST_WQES_ENABLE,
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MLX5E_RQ_STATE_POST_WQES_ENABLE,
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};
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};
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enum cq_flags {
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MLX5E_CQ_HAS_CQES = 1,
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};
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struct mlx5e_cq {
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struct mlx5e_cq {
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/* data path - accessed per cqe */
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/* data path - accessed per cqe */
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struct mlx5_cqwq wq;
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struct mlx5_cqwq wq;
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unsigned long flags;
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/* data path - accessed per napi poll */
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/* data path - accessed per napi poll */
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struct napi_struct *napi;
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struct napi_struct *napi;
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@ -230,10 +230,6 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget)
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struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
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struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq);
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int work_done;
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int work_done;
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/* avoid accessing cq (dma coherent memory) if not needed */
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if (!test_and_clear_bit(MLX5E_CQ_HAS_CQES, &cq->flags))
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return 0;
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for (work_done = 0; work_done < budget; work_done++) {
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for (work_done = 0; work_done < budget; work_done++) {
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struct mlx5e_rx_wqe *wqe;
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struct mlx5e_rx_wqe *wqe;
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struct mlx5_cqe64 *cqe;
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struct mlx5_cqe64 *cqe;
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@ -279,8 +275,5 @@ wq_ll_pop:
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/* ensure cq space is freed before enabling more cqes */
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/* ensure cq space is freed before enabling more cqes */
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wmb();
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wmb();
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if (work_done == budget)
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set_bit(MLX5E_CQ_HAS_CQES, &cq->flags);
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return work_done;
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return work_done;
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}
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}
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@ -335,10 +335,6 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq)
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u16 sqcc;
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u16 sqcc;
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int i;
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int i;
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/* avoid accessing cq (dma coherent memory) if not needed */
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if (!test_and_clear_bit(MLX5E_CQ_HAS_CQES, &cq->flags))
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return false;
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sq = container_of(cq, struct mlx5e_sq, cq);
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sq = container_of(cq, struct mlx5e_sq, cq);
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npkts = 0;
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npkts = 0;
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@ -422,10 +418,6 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq)
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netif_tx_wake_queue(sq->txq);
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netif_tx_wake_queue(sq->txq);
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sq->stats.wake++;
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sq->stats.wake++;
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}
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}
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if (i == MLX5E_TX_CQ_POLL_BUDGET) {
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set_bit(MLX5E_CQ_HAS_CQES, &cq->flags);
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return true;
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}
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return false;
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return (i == MLX5E_TX_CQ_POLL_BUDGET);
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}
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}
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@ -88,7 +88,6 @@ void mlx5e_completion_event(struct mlx5_core_cq *mcq)
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{
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{
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struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
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struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq);
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set_bit(MLX5E_CQ_HAS_CQES, &cq->flags);
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set_bit(MLX5E_CHANNEL_NAPI_SCHED, &cq->channel->flags);
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set_bit(MLX5E_CHANNEL_NAPI_SCHED, &cq->channel->flags);
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barrier();
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barrier();
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napi_schedule(cq->napi);
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napi_schedule(cq->napi);
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