arm64: dts: qcom: ipq8074: enable the GICv2m support

GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension,
which supports upto 32 MSI interrupts. Lets add support for the same.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
This commit is contained in:
Kathiravan T 2022-02-08 21:05:24 +05:30 committed by Bjorn Andersson
parent ff899133fd
commit 59892de947
1 changed files with 9 additions and 0 deletions

View File

@ -634,9 +634,18 @@
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
#interrupt-cells = <0x3>;
reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
ranges = <0 0xb00a000 0xffd>;
v2m@0 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0xffd>;
};
};
timer {