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drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset() 

Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2017-04-05 09:06:13 -04:00 committed by Alex Deucher
parent 342cda2522
commit 596c8e8b7f
1 changed files with 2 additions and 6 deletions
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8
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@ -1395,13 +1395,9 @@ void gfx_v9_0_rlc_stop(struct amdgpu_device *adev)
static void gfx_v9_0_rlc_reset(struct amdgpu_device *adev) static void gfx_v9_0_rlc_reset(struct amdgpu_device *adev)
{ {
u32 tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_SOFT_RESET)); WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1);
tmp = REG_SET_FIELD(tmp, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1);
WREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_SOFT_RESET), tmp);
udelay(50); udelay(50);
tmp = REG_SET_FIELD(tmp, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0);
WREG32(SOC15_REG_OFFSET(GC, 0, mmGRBM_SOFT_RESET), tmp);
udelay(50); udelay(50);
} }