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ASoC: tegra: Use flat regcache 

When using an rbtree cache, there can be allocations the first time a
register is accessed.  This can cause an attempt to schedule while
atomic in the case that the regmap is using a spinlock.  This could be
fixed by either initializing all the registers or using a flat cache.
The register maps for tegra30_ahub and tegra30_i2s are dense and don't
save much from using a tree so convert them to flat.

Tegra30 changes tested on Norrin, Tegra20 changes compile.

Signed-off-by: Dylan Reid <dgreid@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Dylan Reid 2014-03-17 22:08:49 -07:00 committed by Mark Brown
parent 38dbfb59d1
commit 591d14f007
6 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
sound/soc/tegra/tegra20_ac97.c
View File

@ -306,7 +306,7 @@ static const struct regmap_config tegra20_ac97_regmap_config = {
.readable_reg = tegra20_ac97_wr_rd_reg,
.volatile_reg = tegra20_ac97_volatile_reg,
.precious_reg = tegra20_ac97_precious_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static int tegra20_ac97_platform_probe(struct platform_device *pdev)

2
sound/soc/tegra/tegra20_das.c
View File

@ -128,7 +128,7 @@ static const struct regmap_config tegra20_das_regmap_config = {
.max_register = LAST_REG(DAC_INPUT_DATA_CLK_SEL),
.writeable_reg = tegra20_das_wr_rd_reg,
.readable_reg = tegra20_das_wr_rd_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static int tegra20_das_probe(struct platform_device *pdev)

2
sound/soc/tegra/tegra20_i2s.c
View File

@ -333,7 +333,7 @@ static const struct regmap_config tegra20_i2s_regmap_config = {
.readable_reg = tegra20_i2s_wr_rd_reg,
.volatile_reg = tegra20_i2s_volatile_reg,
.precious_reg = tegra20_i2s_precious_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static int tegra20_i2s_platform_probe(struct platform_device *pdev)

2
sound/soc/tegra/tegra20_spdif.c
View File

@ -259,7 +259,7 @@ static const struct regmap_config tegra20_spdif_regmap_config = {
.readable_reg = tegra20_spdif_wr_rd_reg,
.volatile_reg = tegra20_spdif_volatile_reg,
.precious_reg = tegra20_spdif_precious_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static int tegra20_spdif_platform_probe(struct platform_device *pdev)

4
sound/soc/tegra/tegra30_ahub.c
View File

@ -471,7 +471,7 @@ static const struct regmap_config tegra30_ahub_apbif_regmap_config = {
.readable_reg = tegra30_ahub_apbif_wr_rd_reg,
.volatile_reg = tegra30_ahub_apbif_volatile_reg,
.precious_reg = tegra30_ahub_apbif_precious_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static bool tegra30_ahub_ahub_wr_rd_reg(struct device *dev, unsigned int reg)
@ -490,7 +490,7 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = {
.max_register = LAST_REG(AUDIO_RX),
.writeable_reg = tegra30_ahub_ahub_wr_rd_reg,
.readable_reg = tegra30_ahub_ahub_wr_rd_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static struct tegra30_ahub_soc_data soc_data_tegra30 = {

2
sound/soc/tegra/tegra30_i2s.c
View File

@ -357,7 +357,7 @@ static const struct regmap_config tegra30_i2s_regmap_config = {
.writeable_reg = tegra30_i2s_wr_rd_reg,
.readable_reg = tegra30_i2s_wr_rd_reg,
.volatile_reg = tegra30_i2s_volatile_reg,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_FLAT,
};
static const struct tegra30_i2s_soc_data tegra30_i2s_config = {