usb: bdc: Fix misleading register names
The BDC endpoint status registers 0-7 were originally each going to be an array of regsiters. This was later changed to being a single register. The register definitions are being changed from: "#define BDC_EPSTS0(n) (0x60 + (n * 0x10))" to "#define BDC_EPSTS0 0x60" to reflect this change and to avoid future coding mistakes. Signed-off-by: Al Cooper <alcooperx@gmail.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -83,14 +83,14 @@
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#define BDC_DVCSA 0x50
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#define BDC_DVCSB 0x54
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#define BDC_EPSTS0(n) (0x60 + (n * 0x10))
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#define BDC_EPSTS1(n) (0x64 + (n * 0x10))
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#define BDC_EPSTS2(n) (0x68 + (n * 0x10))
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#define BDC_EPSTS3(n) (0x6c + (n * 0x10))
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#define BDC_EPSTS4(n) (0x70 + (n * 0x10))
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#define BDC_EPSTS5(n) (0x74 + (n * 0x10))
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#define BDC_EPSTS6(n) (0x78 + (n * 0x10))
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#define BDC_EPSTS7(n) (0x7c + (n * 0x10))
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#define BDC_EPSTS0 0x60
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#define BDC_EPSTS1 0x64
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#define BDC_EPSTS2 0x68
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#define BDC_EPSTS3 0x6c
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#define BDC_EPSTS4 0x70
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#define BDC_EPSTS5 0x74
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#define BDC_EPSTS6 0x78
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#define BDC_EPSTS7 0x7c
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#define BDC_SRRBAL(n) (0x200 + (n * 0x10))
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#define BDC_SRRBAH(n) (0x204 + (n * 0x10))
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#define BDC_SRRINT(n) (0x208 + (n * 0x10))
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@ -40,28 +40,28 @@ void bdc_dump_epsts(struct bdc *bdc)
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{
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u32 temp;
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temp = bdc_readl(bdc->regs, BDC_EPSTS0(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS0);
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dev_vdbg(bdc->dev, "BDC_EPSTS0:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS1(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS1);
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dev_vdbg(bdc->dev, "BDC_EPSTS1:0x%x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS2(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS2);
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dev_vdbg(bdc->dev, "BDC_EPSTS2:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS3(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS3);
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dev_vdbg(bdc->dev, "BDC_EPSTS3:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS4(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS4);
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dev_vdbg(bdc->dev, "BDC_EPSTS4:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS5(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS5);
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dev_vdbg(bdc->dev, "BDC_EPSTS5:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS6(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS6);
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dev_vdbg(bdc->dev, "BDC_EPSTS6:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS7(0));
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temp = bdc_readl(bdc->regs, BDC_EPSTS7);
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dev_vdbg(bdc->dev, "BDC_EPSTS7:0x%08x\n", temp);
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}
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@ -777,9 +777,9 @@ static int ep_dequeue(struct bdc_ep *ep, struct bdc_req *req)
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*/
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/* The current hw dequeue pointer */
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tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(0));
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tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0);
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deq_ptr_64 = tmp_32;
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tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS1(0));
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tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS1);
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deq_ptr_64 |= ((u64)tmp_32 << 32);
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/* we have the dma addr of next bd that will be fetched by hardware */
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