net/mlx5e: Support TX packet copy into WQE
AKA inline WQE. A TX latency optimization to save data gather DMA reads. Controlled by ETHTOOL_TX_COPYBREAK. Signed-off-by: Achiad Shochat <achiad@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -196,6 +196,7 @@ struct mlx5e_params {
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bool lro_en;
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u32 lro_wqe_sz;
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u8 rss_hfunc;
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u16 tx_max_inline;
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};
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enum {
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@ -520,3 +521,4 @@ static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)
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}
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extern const struct ethtool_ops mlx5e_ethtool_ops;
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u16 mlx5e_get_max_inline_cap(struct mlx5_core_dev *mdev);
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@ -699,6 +699,57 @@ static int mlx5e_set_rxfh(struct net_device *netdev, const u32 *indir,
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return err;
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}
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static int mlx5e_get_tunable(struct net_device *dev,
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const struct ethtool_tunable *tuna,
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void *data)
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{
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const struct mlx5e_priv *priv = netdev_priv(dev);
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int err = 0;
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switch (tuna->id) {
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case ETHTOOL_TX_COPYBREAK:
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*(u32 *)data = priv->params.tx_max_inline;
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break;
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default:
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err = -EINVAL;
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break;
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}
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return err;
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}
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static int mlx5e_set_tunable(struct net_device *dev,
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const struct ethtool_tunable *tuna,
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const void *data)
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{
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struct mlx5e_priv *priv = netdev_priv(dev);
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struct mlx5_core_dev *mdev = priv->mdev;
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struct mlx5e_params new_params;
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u32 val;
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int err = 0;
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switch (tuna->id) {
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case ETHTOOL_TX_COPYBREAK:
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val = *(u32 *)data;
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if (val > mlx5e_get_max_inline_cap(mdev)) {
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err = -EINVAL;
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break;
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}
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mutex_lock(&priv->state_lock);
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new_params = priv->params;
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new_params.tx_max_inline = val;
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err = mlx5e_update_priv_params(priv, &new_params);
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mutex_unlock(&priv->state_lock);
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break;
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default:
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err = -EINVAL;
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break;
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}
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return err;
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}
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const struct ethtool_ops mlx5e_ethtool_ops = {
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.get_drvinfo = mlx5e_get_drvinfo,
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.get_link = ethtool_op_get_link,
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@ -715,4 +766,6 @@ const struct ethtool_ops mlx5e_ethtool_ops = {
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.set_settings = mlx5e_set_settings,
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.get_rxfh = mlx5e_get_rxfh,
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.set_rxfh = mlx5e_set_rxfh,
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.get_tunable = mlx5e_get_tunable,
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.set_tunable = mlx5e_set_tunable,
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};
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@ -41,6 +41,7 @@ struct mlx5e_rq_param {
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struct mlx5e_sq_param {
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u32 sqc[MLX5_ST_SZ_DW(sqc)];
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struct mlx5_wq_param wq;
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u16 max_inline;
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};
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struct mlx5e_cq_param {
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@ -514,6 +515,7 @@ static int mlx5e_create_sq(struct mlx5e_channel *c,
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sq->wq.db = &sq->wq.db[MLX5_SND_DBR];
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sq->uar_map = sq->uar.map;
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sq->bf_buf_size = (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) / 2;
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sq->max_inline = param->max_inline;
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err = mlx5e_alloc_sq_db(sq, cpu_to_node(c->cpu));
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if (err)
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@ -1020,6 +1022,7 @@ static void mlx5e_build_sq_param(struct mlx5e_priv *priv,
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MLX5_SET(wq, wq, pd, priv->pdn);
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param->wq.buf_numa_node = dev_to_node(&priv->mdev->pdev->dev);
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param->max_inline = priv->params.tx_max_inline;
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}
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static void mlx5e_build_common_cq_param(struct mlx5e_priv *priv,
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@ -1703,6 +1706,15 @@ static int mlx5e_check_required_hca_cap(struct mlx5_core_dev *mdev)
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return 0;
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}
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u16 mlx5e_get_max_inline_cap(struct mlx5_core_dev *mdev)
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{
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int bf_buf_size = (1 << MLX5_CAP_GEN(mdev, log_bf_reg_size)) / 2;
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return bf_buf_size -
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sizeof(struct mlx5e_tx_wqe) +
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2 /*sizeof(mlx5e_tx_wqe.inline_hdr_start)*/;
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}
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static void mlx5e_build_netdev_priv(struct mlx5_core_dev *mdev,
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struct net_device *netdev,
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int num_comp_vectors)
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@ -1721,6 +1733,7 @@ static void mlx5e_build_netdev_priv(struct mlx5_core_dev *mdev,
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MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC;
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priv->params.tx_cq_moderation_pkts =
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MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_PKTS;
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priv->params.tx_max_inline = mlx5e_get_max_inline_cap(mdev);
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priv->params.min_rx_wqes =
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MLX5E_PARAMS_DEFAULT_MIN_RX_WQES;
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priv->params.rx_hash_log_tbl_sz =
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@ -112,7 +112,15 @@ u16 mlx5e_select_queue(struct net_device *dev, struct sk_buff *skb,
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static inline u16 mlx5e_get_inline_hdr_size(struct mlx5e_sq *sq,
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struct sk_buff *skb)
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{
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#define MLX5E_MIN_INLINE 16 /* eth header with vlan (w/o next ethertype) */
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/* Some NIC TX decisions, e.g loopback, are based on the packet
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* headers and occur before the data gather.
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* Therefore these headers must be copied into the WQE
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*/
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#define MLX5E_MIN_INLINE (ETH_HLEN + 2/*vlan tag*/)
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if (skb_headlen(skb) <= sq->max_inline)
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return skb_headlen(skb);
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return MLX5E_MIN_INLINE;
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}
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