perf/x86/intel: Add attr_update for Hybrid PMUs
The attribute_group for Hybrid PMUs should be different from the previous cpu PMU. For example, cpumask is required for a Hybrid PMU. The PMU type should be included in the event and format attribute. Add hybrid_attr_update for the Hybrid PMU. Check the PMU type in is_visible() function. Only display the event or format for the matched Hybrid PMU. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/1618237865-33448-19-git-send-email-kan.liang@linux.intel.com
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@ -5118,6 +5118,106 @@ static const struct attribute_group *attr_update[] = {
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NULL,
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};
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static bool is_attr_for_this_pmu(struct kobject *kobj, struct attribute *attr)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct x86_hybrid_pmu *pmu =
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container_of(dev_get_drvdata(dev), struct x86_hybrid_pmu, pmu);
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struct perf_pmu_events_hybrid_attr *pmu_attr =
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container_of(attr, struct perf_pmu_events_hybrid_attr, attr.attr);
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return pmu->cpu_type & pmu_attr->pmu_type;
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}
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static umode_t hybrid_events_is_visible(struct kobject *kobj,
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struct attribute *attr, int i)
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{
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return is_attr_for_this_pmu(kobj, attr) ? attr->mode : 0;
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}
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static inline int hybrid_find_supported_cpu(struct x86_hybrid_pmu *pmu)
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{
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int cpu = cpumask_first(&pmu->supported_cpus);
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return (cpu >= nr_cpu_ids) ? -1 : cpu;
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}
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static umode_t hybrid_tsx_is_visible(struct kobject *kobj,
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struct attribute *attr, int i)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct x86_hybrid_pmu *pmu =
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container_of(dev_get_drvdata(dev), struct x86_hybrid_pmu, pmu);
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int cpu = hybrid_find_supported_cpu(pmu);
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return (cpu >= 0) && is_attr_for_this_pmu(kobj, attr) && cpu_has(&cpu_data(cpu), X86_FEATURE_RTM) ? attr->mode : 0;
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}
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static umode_t hybrid_format_is_visible(struct kobject *kobj,
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struct attribute *attr, int i)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct x86_hybrid_pmu *pmu =
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container_of(dev_get_drvdata(dev), struct x86_hybrid_pmu, pmu);
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struct perf_pmu_format_hybrid_attr *pmu_attr =
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container_of(attr, struct perf_pmu_format_hybrid_attr, attr.attr);
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int cpu = hybrid_find_supported_cpu(pmu);
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return (cpu >= 0) && (pmu->cpu_type & pmu_attr->pmu_type) ? attr->mode : 0;
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}
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static struct attribute_group hybrid_group_events_td = {
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.name = "events",
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.is_visible = hybrid_events_is_visible,
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};
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static struct attribute_group hybrid_group_events_mem = {
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.name = "events",
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.is_visible = hybrid_events_is_visible,
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};
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static struct attribute_group hybrid_group_events_tsx = {
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.name = "events",
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.is_visible = hybrid_tsx_is_visible,
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};
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static struct attribute_group hybrid_group_format_extra = {
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.name = "format",
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.is_visible = hybrid_format_is_visible,
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};
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static ssize_t intel_hybrid_get_attr_cpus(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct x86_hybrid_pmu *pmu =
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container_of(dev_get_drvdata(dev), struct x86_hybrid_pmu, pmu);
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return cpumap_print_to_pagebuf(true, buf, &pmu->supported_cpus);
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}
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static DEVICE_ATTR(cpus, S_IRUGO, intel_hybrid_get_attr_cpus, NULL);
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static struct attribute *intel_hybrid_cpus_attrs[] = {
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&dev_attr_cpus.attr,
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NULL,
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};
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static struct attribute_group hybrid_group_cpus = {
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.attrs = intel_hybrid_cpus_attrs,
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};
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static const struct attribute_group *hybrid_attr_update[] = {
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&hybrid_group_events_td,
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&hybrid_group_events_mem,
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&hybrid_group_events_tsx,
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&group_caps_gen,
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&group_caps_lbr,
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&hybrid_group_format_extra,
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&group_default,
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&hybrid_group_cpus,
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NULL,
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};
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static struct attribute *empty_attrs;
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static void intel_pmu_check_num_counters(int *num_counters,
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@ -5861,14 +5961,22 @@ __init int intel_pmu_init(void)
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snprintf(pmu_name_str, sizeof(pmu_name_str), "%s", name);
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if (!is_hybrid()) {
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group_events_td.attrs = td_attr;
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group_events_mem.attrs = mem_attr;
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group_events_tsx.attrs = tsx_attr;
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group_format_extra.attrs = extra_attr;
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group_format_extra_skl.attrs = extra_skl_attr;
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group_events_td.attrs = td_attr;
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group_events_mem.attrs = mem_attr;
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group_events_tsx.attrs = tsx_attr;
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group_format_extra.attrs = extra_attr;
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group_format_extra_skl.attrs = extra_skl_attr;
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x86_pmu.attr_update = attr_update;
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} else {
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hybrid_group_events_td.attrs = td_attr;
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hybrid_group_events_mem.attrs = mem_attr;
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hybrid_group_events_tsx.attrs = tsx_attr;
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hybrid_group_format_extra.attrs = extra_attr;
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x86_pmu.attr_update = attr_update;
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x86_pmu.attr_update = hybrid_attr_update;
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}
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intel_pmu_check_num_counters(&x86_pmu.num_counters,
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&x86_pmu.num_counters_fixed,
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