ARM: dts: gemini: Switch to using macros
The macros for reset and clock lines were merged during the merge window, this switches the Gemini to use these macros rather than numerical defines. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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5771a8c088
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5896a4d802
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@ -5,6 +5,8 @@
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/include/ "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/cortina,gemini-clock.h>
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#include <dt-bindings/reset/cortina,gemini-reset.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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@ -45,15 +47,15 @@
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compatible = "cortina,gemini-watchdog";
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reg = <0x41000000 0x1000>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&syscon 23>;
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clocks = <&syscon 2>;
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resets = <&syscon GEMINI_RESET_WDOG>;
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clocks = <&syscon GEMINI_CLK_APB>;
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};
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uart0: serial@42000000 {
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compatible = "ns16550a";
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reg = <0x42000000 0x100>;
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resets = <&syscon 18>;
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clocks = <&syscon 6>;
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resets = <&syscon GEMINI_RESET_UART>;
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clocks = <&syscon GEMINI_CLK_UART>;
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interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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};
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@ -65,9 +67,9 @@
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interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
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<15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
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<16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
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resets = <&syscon 17>;
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resets = <&syscon GEMINI_RESET_TIMER>;
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/* APB clock or RTC clock */
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clocks = <&syscon 2>, <&syscon 0>;
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clocks = <&syscon GEMINI_CLK_APB>, <&syscon GEMINI_CLK_RTC>;
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clock-names = "PCLK", "EXTCLK";
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syscon = <&syscon>;
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};
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@ -76,19 +78,19 @@
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compatible = "cortina,gemini-rtc";
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reg = <0x45000000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&syscon 16>;
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clocks = <&syscon 2>, <&syscon 0>;
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resets = <&syscon GEMINI_RESET_RTC>;
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clocks = <&syscon GEMINI_CLK_APB>, <&syscon GEMINI_CLK_RTC>;
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clock-names = "PCLK", "EXTCLK";
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};
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sata: sata@46000000 {
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compatible = "cortina,gemini-sata-bridge";
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reg = <0x46000000 0x100>;
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resets = <&syscon 26>,
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<&syscon 27>;
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resets = <&syscon GEMINI_RESET_SATA0>,
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<&syscon GEMINI_RESET_SATA1>;
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reset-names = "sata0", "sata1";
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clocks = <&syscon 10>,
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<&syscon 11>;
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clocks = <&syscon GEMINI_CLK_GATE_SATA0>,
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<&syscon GEMINI_CLK_GATE_SATA1>;
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clock-names = "SATA0_PCLK", "SATA1_PCLK";
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syscon = <&syscon>;
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status = "disabled";
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@ -97,7 +99,7 @@
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intcon: interrupt-controller@48000000 {
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compatible = "faraday,ftintc010";
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reg = <0x48000000 0x1000>;
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resets = <&syscon 14>;
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resets = <&syscon GEMINI_RESET_INTCON0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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@ -112,8 +114,8 @@
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compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
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reg = <0x4d000000 0x100>;
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interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&syscon 20>;
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clocks = <&syscon 2>;
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resets = <&syscon GEMINI_RESET_GPIO0>;
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clocks = <&syscon GEMINI_CLK_APB>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -124,8 +126,8 @@
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compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
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reg = <0x4e000000 0x100>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&syscon 21>;
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clocks = <&syscon 2>;
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resets = <&syscon GEMINI_RESET_GPIO1>;
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clocks = <&syscon GEMINI_CLK_APB>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -136,8 +138,8 @@
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compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
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reg = <0x4f000000 0x100>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&syscon 22>;
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clocks = <&syscon 2>;
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resets = <&syscon GEMINI_RESET_GPIO2>;
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clocks = <&syscon GEMINI_CLK_APB>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -151,8 +153,8 @@
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* to configure the host bridge.
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*/
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reg = <0x50000000 0x100>;
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resets = <&syscon 7>;
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clocks = <&syscon 15>, <&syscon 4>;
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resets = <&syscon GEMINI_RESET_PCI>;
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clocks = <&syscon GEMINI_CLK_GATE_PCI>, <&syscon GEMINI_CLK_PCI>;
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clock-names = "PCLK", "PCICLK";
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#address-cells = <3>;
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#size-cells = <2>;
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@ -193,8 +195,8 @@
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compatible = "cortina,gemini-pata", "faraday,ftide010";
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reg = <0x63000000 0x1000>;
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interrupts = <4 IRQ_TYPE_EDGE_RISING>;
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resets = <&syscon 2>;
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clocks = <&syscon 14>;
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resets = <&syscon GEMINI_RESET_IDE>;
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clocks = <&syscon GEMINI_CLK_GATE_IDE>;
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clock-names = "PCLK";
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sata = <&sata>;
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status = "disabled";
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@ -204,8 +206,8 @@
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compatible = "cortina,gemini-pata", "faraday,ftide010";
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reg = <0x63400000 0x1000>;
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interrupts = <5 IRQ_TYPE_EDGE_RISING>;
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resets = <&syscon 2>;
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clocks = <&syscon 14>;
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resets = <&syscon GEMINI_RESET_IDE>;
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clocks = <&syscon GEMINI_CLK_GATE_IDE>;
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clock-names = "PCLK";
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sata = <&sata>;
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status = "disabled";
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@ -217,8 +219,8 @@
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arm,primecell-periphid = <0x0003b080>;
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reg = <0x67000000 0x1000>;
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interrupts = <9 IRQ_TYPE_EDGE_RISING>;
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resets = <&syscon 10>;
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clocks = <&syscon 1>;
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resets = <&syscon GEMINI_RESET_DMAC>;
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clocks = <&syscon GEMINI_CLK_AHB>;
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clock-names = "apb_pclk";
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/* Bus interface AHB1 (AHB0) is totally tilted */
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lli-bus-interface-ahb2;
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