ASoC: SOF: pcm: Restrict DSP D0i3 during S0ix to IPC3
[ Upstream commit 90a2353080eedec855d63f6aadfda14104ee9b06 ] Introduce a new field in struct sof_ipc_pcm_ops that can be used to restrict DSP D0i3 during S0ix suspend to IPC3. With IPC4, all streams must be stopped before S0ix suspend. Reviewed-by: Uday M Bhat <uday.m.bhat@intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://msgid.link/r/20240408194147.28919-3-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
a73f1e25d5
commit
58872c444a
|
@ -398,4 +398,5 @@ const struct sof_ipc_pcm_ops ipc3_pcm_ops = {
|
|||
.trigger = sof_ipc3_pcm_trigger,
|
||||
.dai_link_fixup = sof_ipc3_pcm_dai_link_fixup,
|
||||
.reset_hw_params_during_stop = true,
|
||||
.d0i3_supported_in_s0ix = true,
|
||||
};
|
||||
|
|
|
@ -325,14 +325,13 @@ static int sof_pcm_trigger(struct snd_soc_component *component,
|
|||
ipc_first = true;
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
if (sdev->system_suspend_target == SOF_SUSPEND_S0IX &&
|
||||
/*
|
||||
* If DSP D0I3 is allowed during S0iX, set the suspend_ignored flag for
|
||||
* D0I3-compatible streams to keep the firmware pipeline running
|
||||
*/
|
||||
if (pcm_ops && pcm_ops->d0i3_supported_in_s0ix &&
|
||||
sdev->system_suspend_target == SOF_SUSPEND_S0IX &&
|
||||
spcm->stream[substream->stream].d0i3_compatible) {
|
||||
/*
|
||||
* trap the event, not sending trigger stop to
|
||||
* prevent the FW pipelines from being stopped,
|
||||
* and mark the flag to ignore the upcoming DAPM
|
||||
* PM events.
|
||||
*/
|
||||
spcm->stream[substream->stream].suspend_ignored = true;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -113,6 +113,7 @@ struct snd_sof_dai_config_data {
|
|||
* triggers. The FW keeps the host DMA running in this case and
|
||||
* therefore the host must do the same and should stop the DMA during
|
||||
* hw_free.
|
||||
* @d0i3_supported_in_s0ix: Allow DSP D0I3 during S0iX
|
||||
*/
|
||||
struct sof_ipc_pcm_ops {
|
||||
int (*hw_params)(struct snd_soc_component *component, struct snd_pcm_substream *substream,
|
||||
|
@ -129,6 +130,7 @@ struct sof_ipc_pcm_ops {
|
|||
bool reset_hw_params_during_stop;
|
||||
bool ipc_first_on_start;
|
||||
bool platform_stop_during_hw_free;
|
||||
bool d0i3_supported_in_s0ix;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
Loading…
Reference in New Issue