ARM: imx6q: remove Atheros AR8035 SmartEEE fixup
This fixup removes the Lpi_en bit. If this patch breaks functionality of your board, use following device tree properties: qca,smarteee-tw-us-1g and qca,smarteee-tw-us-100m. For example: ethernet-phy@X { reg = <0xX>; qca,smarteee-tw-us-1g = <24>; .... }; Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -68,32 +68,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
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static int ar8035_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* Ar803x phy SmartEEE feature cause link status generates glitch,
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* which cause ethernet link down/up issue, so disable SmartEEE
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*/
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phy_write(dev, 0xd, 0x3);
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phy_write(dev, 0xe, 0x805d);
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phy_write(dev, 0xd, 0x4003);
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val = phy_read(dev, 0xe);
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phy_write(dev, 0xe, val & ~(1 << 8));
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return 0;
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}
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#define PHY_ID_AR8035 0x004dd072
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static void __init imx6q_enet_phy_init(void)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB)) {
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
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ar8035_phy_fixup);
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}
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}
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