tpm: tpm_tis: Share common data between phys
Split priv_data structure in common and phy specific structures. This will allow in future patches to reuse the same tis logic on top of new phy such as spi and i2c. Ultimately, other drivers may reuse this tis logic. (e.g: st33zp24...) iobase field is specific to TPM addressed on 0xFED4xxxx on LPC/SPI bus. This commit is based on the initial work by Peter Huewe. Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
This commit is contained in:
parent
d2efee6e3a
commit
57dacc2b4c
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@ -29,6 +29,7 @@
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#include <linux/acpi.h>
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#include <linux/freezer.h>
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#include "tpm.h"
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#include "tpm_tis_core.h"
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enum tis_access {
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TPM_ACCESS_VALID = 0x80,
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@ -93,16 +94,16 @@ struct tpm_info {
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#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
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#define TPM_RID(l) (0x0F04 | ((l) << 12))
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struct priv_data {
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struct tpm_tis_tcg_phy {
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struct tpm_tis_data priv;
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void __iomem *iobase;
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u16 manufacturer_id;
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int locality;
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int irq;
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bool irq_tested;
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wait_queue_head_t int_queue;
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wait_queue_head_t read_queue;
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};
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static inline struct tpm_tis_tcg_phy *to_tpm_tis_tcg_phy(struct tpm_tis_data *data)
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{
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return container_of(data, struct tpm_tis_tcg_phy, priv);
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}
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#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
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static int has_hid(struct acpi_device *dev, const char *hid)
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{
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@ -132,10 +133,11 @@ static inline int is_itpm(struct acpi_device *dev)
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* correct values in the other bits.' */
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static int wait_startup(struct tpm_chip *chip, int l)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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unsigned long stop = jiffies + chip->timeout_a;
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do {
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if (ioread8(priv->iobase + TPM_ACCESS(l)) &
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if (ioread8(phy->iobase + TPM_ACCESS(l)) &
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TPM_ACCESS_VALID)
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return 0;
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msleep(TPM_TIMEOUT);
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@ -145,9 +147,10 @@ static int wait_startup(struct tpm_chip *chip, int l)
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static int check_locality(struct tpm_chip *chip, int l)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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if ((ioread8(priv->iobase + TPM_ACCESS(l)) &
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if ((ioread8(phy->iobase + TPM_ACCESS(l)) &
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
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return priv->locality = l;
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@ -157,18 +160,20 @@ static int check_locality(struct tpm_chip *chip, int l)
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static void release_locality(struct tpm_chip *chip, int l, int force)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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if (force || (ioread8(priv->iobase + TPM_ACCESS(l)) &
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if (force || (ioread8(phy->iobase + TPM_ACCESS(l)) &
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
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iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
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priv->iobase + TPM_ACCESS(l));
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phy->iobase + TPM_ACCESS(l));
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}
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static int request_locality(struct tpm_chip *chip, int l)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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unsigned long stop, timeout;
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long rc;
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@ -176,7 +181,7 @@ static int request_locality(struct tpm_chip *chip, int l)
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return l;
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iowrite8(TPM_ACCESS_REQUEST_USE,
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priv->iobase + TPM_ACCESS(l));
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phy->iobase + TPM_ACCESS(l));
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stop = jiffies + chip->timeout_a;
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@ -209,24 +214,27 @@ again:
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static u8 tpm_tis_status(struct tpm_chip *chip)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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return ioread8(priv->iobase +
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return ioread8(phy->iobase +
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TPM_STS(priv->locality));
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}
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static void tpm_tis_ready(struct tpm_chip *chip)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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/* this causes the current command to be aborted */
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iowrite8(TPM_STS_COMMAND_READY,
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priv->iobase + TPM_STS(priv->locality));
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phy->iobase + TPM_STS(priv->locality));
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}
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static int get_burstcount(struct tpm_chip *chip)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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unsigned long stop;
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int burstcnt;
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@ -234,9 +242,9 @@ static int get_burstcount(struct tpm_chip *chip)
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/* which timeout value, spec has 2 answers (c & d) */
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stop = jiffies + chip->timeout_d;
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do {
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burstcnt = ioread8(priv->iobase +
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burstcnt = ioread8(phy->iobase +
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TPM_STS(priv->locality) + 1);
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burstcnt += ioread8(priv->iobase +
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burstcnt += ioread8(phy->iobase +
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TPM_STS(priv->locality) +
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2) << 8;
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if (burstcnt)
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@ -248,7 +256,8 @@ static int get_burstcount(struct tpm_chip *chip)
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static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int size = 0, burstcnt;
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while (size < count &&
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wait_for_tpm_stat(chip,
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== 0) {
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && size < count; burstcnt--)
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buf[size++] = ioread8(priv->iobase +
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buf[size++] = ioread8(phy->iobase +
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TPM_DATA_FIFO(priv->locality));
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}
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return size;
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@ -266,7 +275,7 @@ static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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int size = 0;
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int expected, status;
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@ -322,7 +331,8 @@ MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
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*/
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static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc, status, burstcnt;
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size_t count = 0;
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@ -343,7 +353,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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while (count < len - 1) {
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && count < len - 1; burstcnt--) {
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iowrite8(buf[count], priv->iobase +
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iowrite8(buf[count], phy->iobase +
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TPM_DATA_FIFO(priv->locality));
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count++;
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}
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@ -359,7 +369,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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/* write last byte */
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iowrite8(buf[count],
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priv->iobase + TPM_DATA_FIFO(priv->locality));
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phy->iobase + TPM_DATA_FIFO(priv->locality));
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wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
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&priv->int_queue, false);
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status = tpm_tis_status(chip);
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@ -378,15 +388,16 @@ out_err:
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static void disable_interrupts(struct tpm_chip *chip)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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u32 intmask;
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intmask =
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ioread32(priv->iobase +
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ioread32(phy->iobase +
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TPM_INT_ENABLE(priv->locality));
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intmask &= ~TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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priv->iobase + TPM_INT_ENABLE(priv->locality));
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phy->iobase + TPM_INT_ENABLE(priv->locality));
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devm_free_irq(chip->dev.parent, priv->irq, chip);
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priv->irq = 0;
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chip->flags &= ~TPM_CHIP_FLAG_IRQ;
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@ -399,7 +410,8 @@ static void disable_interrupts(struct tpm_chip *chip)
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*/
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static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc;
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u32 ordinal;
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unsigned long dur;
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@ -410,7 +422,7 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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/* go and do it */
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iowrite8(TPM_STS_GO,
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priv->iobase + TPM_STS(priv->locality));
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phy->iobase + TPM_STS(priv->locality));
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if (chip->flags & TPM_CHIP_FLAG_IRQ) {
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ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
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@ -436,8 +448,8 @@ out_err:
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static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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int rc, irq;
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
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return tpm_tis_send_main(chip, buf, len);
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@ -471,11 +483,12 @@ static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
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static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
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unsigned long *timeout_cap)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int i;
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u32 did_vid;
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did_vid = ioread32(priv->iobase + TPM_DID_VID(0));
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did_vid = ioread32(phy->iobase + TPM_DID_VID(0));
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for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
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if (vendor_timeout_overrides[i].did_vid != did_vid)
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@ -495,7 +508,8 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
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*/
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static int probe_itpm(struct tpm_chip *chip)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc = 0;
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u8 cmd_getticks[] = {
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0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
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@ -503,7 +517,7 @@ static int probe_itpm(struct tpm_chip *chip)
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};
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size_t len = sizeof(cmd_getticks);
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bool rem_itpm = itpm;
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u16 vendor = ioread16(priv->iobase + TPM_DID_VID(0));
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u16 vendor = ioread16(phy->iobase + TPM_DID_VID(0));
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/* probe only iTPMS */
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if (vendor != TPM_VID_INTEL)
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@ -537,7 +551,7 @@ out:
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static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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switch (priv->manufacturer_id) {
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case TPM_VID_WINBOND:
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@ -564,11 +578,12 @@ static const struct tpm_class_ops tpm_tis = {
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static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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{
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struct tpm_chip *chip = dev_id;
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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u32 interrupt;
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int i;
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interrupt = ioread32(priv->iobase +
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interrupt = ioread32(phy->iobase +
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TPM_INT_STATUS(priv->locality));
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if (interrupt == 0)
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@ -588,9 +603,9 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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/* Clear interrupts handled with TPM_EOI */
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iowrite32(interrupt,
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priv->iobase +
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phy->iobase +
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TPM_INT_STATUS(priv->locality));
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ioread32(priv->iobase + TPM_INT_STATUS(priv->locality));
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ioread32(phy->iobase + TPM_INT_STATUS(priv->locality));
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return IRQ_HANDLED;
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}
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@ -601,7 +616,8 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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int flags, int irq)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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u8 original_int_vec;
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if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
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@ -612,19 +628,19 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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}
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priv->irq = irq;
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original_int_vec = ioread8(priv->iobase +
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original_int_vec = ioread8(phy->iobase +
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TPM_INT_VECTOR(priv->locality));
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iowrite8(irq,
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priv->iobase + TPM_INT_VECTOR(priv->locality));
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phy->iobase + TPM_INT_VECTOR(priv->locality));
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/* Clear all existing */
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iowrite32(ioread32(priv->iobase +
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iowrite32(ioread32(phy->iobase +
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TPM_INT_STATUS(priv->locality)),
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priv->iobase + TPM_INT_STATUS(priv->locality));
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phy->iobase + TPM_INT_STATUS(priv->locality));
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/* Turn on */
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iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
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priv->iobase + TPM_INT_ENABLE(priv->locality));
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phy->iobase + TPM_INT_ENABLE(priv->locality));
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priv->irq_tested = false;
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@ -641,7 +657,7 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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*/
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if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
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iowrite8(original_int_vec,
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priv->iobase + TPM_INT_VECTOR(priv->locality));
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phy->iobase + TPM_INT_VECTOR(priv->locality));
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return 1;
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}
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@ -654,11 +670,12 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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*/
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static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
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{
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struct priv_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
|
||||
u8 original_int_vec;
|
||||
int i;
|
||||
|
||||
original_int_vec = ioread8(priv->iobase +
|
||||
original_int_vec = ioread8(phy->iobase +
|
||||
TPM_INT_VECTOR(priv->locality));
|
||||
|
||||
if (!original_int_vec) {
|
||||
|
@ -678,8 +695,9 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
|
|||
|
||||
static void tpm_tis_remove(struct tpm_chip *chip)
|
||||
{
|
||||
struct priv_data *priv = dev_get_drvdata(&chip->dev);
|
||||
void __iomem *reg = priv->iobase + TPM_INT_ENABLE(priv->locality);
|
||||
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
|
||||
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
|
||||
void __iomem *reg = phy->iobase + TPM_INT_ENABLE(priv->locality);
|
||||
|
||||
iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
|
||||
release_locality(chip, priv->locality, 1);
|
||||
|
@ -691,10 +709,10 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
u32 vendor, intfcaps, intmask;
|
||||
int rc, probe;
|
||||
struct tpm_chip *chip;
|
||||
struct priv_data *priv;
|
||||
struct tpm_tis_tcg_phy *phy;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
|
||||
if (priv == NULL)
|
||||
phy = devm_kzalloc(dev, sizeof(struct tpm_tis_tcg_phy), GFP_KERNEL);
|
||||
if (phy == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
chip = tpmm_chip_alloc(dev, &tpm_tis);
|
||||
|
@ -705,9 +723,9 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
chip->acpi_dev_handle = acpi_dev_handle;
|
||||
#endif
|
||||
|
||||
priv->iobase = devm_ioremap_resource(dev, &tpm_info->res);
|
||||
if (IS_ERR(priv->iobase))
|
||||
return PTR_ERR(priv->iobase);
|
||||
phy->iobase = devm_ioremap_resource(dev, &tpm_info->res);
|
||||
if (IS_ERR(phy->iobase))
|
||||
return PTR_ERR(phy->iobase);
|
||||
|
||||
/* Maximum timeouts */
|
||||
chip->timeout_a = TIS_TIMEOUT_A_MAX;
|
||||
|
@ -715,7 +733,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
chip->timeout_c = TIS_TIMEOUT_C_MAX;
|
||||
chip->timeout_d = TIS_TIMEOUT_D_MAX;
|
||||
|
||||
dev_set_drvdata(&chip->dev, priv);
|
||||
dev_set_drvdata(&chip->dev, &phy->priv);
|
||||
|
||||
if (wait_startup(chip, 0) != 0) {
|
||||
rc = -ENODEV;
|
||||
|
@ -723,13 +741,13 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
}
|
||||
|
||||
/* Take control of the TPM's interrupt hardware and shut it off */
|
||||
intmask = ioread32(priv->iobase +
|
||||
TPM_INT_ENABLE(priv->locality));
|
||||
intmask = ioread32(phy->iobase +
|
||||
TPM_INT_ENABLE(phy->priv.locality));
|
||||
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
|
||||
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
|
||||
intmask &= ~TPM_GLOBAL_INT_ENABLE;
|
||||
iowrite32(intmask,
|
||||
priv->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
phy->iobase + TPM_INT_ENABLE(phy->priv.locality));
|
||||
|
||||
if (request_locality(chip, 0) != 0) {
|
||||
rc = -ENODEV;
|
||||
|
@ -740,12 +758,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
if (rc)
|
||||
goto out_err;
|
||||
|
||||
vendor = ioread32(priv->iobase + TPM_DID_VID(0));
|
||||
priv->manufacturer_id = vendor;
|
||||
vendor = ioread32(phy->iobase + TPM_DID_VID(0));
|
||||
phy->priv.manufacturer_id = vendor;
|
||||
|
||||
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
|
||||
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
|
||||
vendor >> 16, ioread8(priv->iobase + TPM_RID(0)));
|
||||
vendor >> 16, ioread8(phy->iobase + TPM_RID(0)));
|
||||
|
||||
if (!itpm) {
|
||||
probe = probe_itpm(chip);
|
||||
|
@ -762,8 +780,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
|
||||
/* Figure out the capabilities */
|
||||
intfcaps =
|
||||
ioread32(priv->iobase +
|
||||
TPM_INTF_CAPS(priv->locality));
|
||||
ioread32(phy->iobase +
|
||||
TPM_INTF_CAPS(phy->priv.locality));
|
||||
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
|
||||
intfcaps);
|
||||
if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
|
||||
|
@ -796,8 +814,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
}
|
||||
|
||||
/* INTERRUPT Setup */
|
||||
init_waitqueue_head(&priv->read_queue);
|
||||
init_waitqueue_head(&priv->int_queue);
|
||||
init_waitqueue_head(&phy->priv.read_queue);
|
||||
init_waitqueue_head(&phy->priv.int_queue);
|
||||
if (interrupts && tpm_info->irq != -1) {
|
||||
if (tpm_info->irq) {
|
||||
tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
|
||||
|
@ -841,23 +859,24 @@ out_err:
|
|||
#ifdef CONFIG_PM_SLEEP
|
||||
static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
|
||||
{
|
||||
struct priv_data *priv = dev_get_drvdata(&chip->dev);
|
||||
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
|
||||
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
|
||||
u32 intmask;
|
||||
|
||||
/* reenable interrupts that device may have lost or
|
||||
BIOS/firmware may have disabled */
|
||||
iowrite8(priv->irq, priv->iobase +
|
||||
iowrite8(priv->irq, phy->iobase +
|
||||
TPM_INT_VECTOR(priv->locality));
|
||||
|
||||
intmask =
|
||||
ioread32(priv->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
ioread32(phy->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
|
||||
intmask |= TPM_INTF_CMD_READY_INT
|
||||
| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
|
||||
| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
|
||||
|
||||
iowrite32(intmask,
|
||||
priv->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
phy->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
}
|
||||
|
||||
static int tpm_tis_resume(struct device *dev)
|
||||
|
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright (C) 2005, 2006 IBM Corporation
|
||||
* Copyright (C) 2014, 2015 Intel Corporation
|
||||
*
|
||||
* Authors:
|
||||
* Leendert van Doorn <leendert@watson.ibm.com>
|
||||
* Kylene Hall <kjhall@us.ibm.com>
|
||||
*
|
||||
* Maintained by: <tpmdd-devel@lists.sourceforge.net>
|
||||
*
|
||||
* Device driver for TCG/TCPA TPM (trusted platform module).
|
||||
* Specifications at www.trustedcomputinggroup.org
|
||||
*
|
||||
* This device driver implements the TPM interface as defined in
|
||||
* the TCG TPM Interface Spec version 1.2, revision 1.0.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation, version 2 of the
|
||||
* License.
|
||||
*/
|
||||
|
||||
#ifndef __TPM_TIS_CORE_H__
|
||||
#define __TPM_TIS_CORE_H__
|
||||
|
||||
#include "tpm.h"
|
||||
|
||||
struct tpm_tis_data {
|
||||
u16 manufacturer_id;
|
||||
int locality;
|
||||
int irq;
|
||||
bool irq_tested;
|
||||
wait_queue_head_t int_queue;
|
||||
wait_queue_head_t read_queue;
|
||||
};
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue