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drm/amdgpu/gmc10: add sienna_cichlid support 

Same as navi10.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2019-03-19 10:52:52 +08:00 committed by Alex Deucher
parent 6c06333073
commit 57d706026f
1 changed files with 3 additions and 0 deletions
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3
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
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@ -712,6 +712,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
case CHIP_NAVI10:
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
default:
adev->gmc.gart_size = 512ULL << 20;
break;
@ -798,6 +799,7 @@ static int gmc_v10_0_sw_init(void *handle)
case CHIP_NAVI10:
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
adev->num_vmhubs = 2;
/*
* To fulfill 4-level page support,
@ -896,6 +898,7 @@ static void gmc_v10_0_init_golden_registers(struct amdgpu_device *adev)
case CHIP_NAVI10:
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
break;
default:
break;