dt-bindings: phy: migrate combo QMP PHY bindings to qcom,sc8280xp-qmp-usb43dp-phy.yaml
Migrate legacy bindings (described in qcom,sc7180-qmp-usb3-dp-phy.yaml) to qcom,sc8280xp-qmp-usb43dp-phy.yaml. This removes a need to declare the child PHY node or split resource regions. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-2-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Dmitry Baryshkov
Vinod Koul
parent
f5a8ecef3c
commit
57a79ce964
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@ -1,284 +0,0 @@
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QMP USB3 DP PHY controller (SC7180)
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description:
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The QMP PHY controller supports physical layer functionality for a number of
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controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.
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Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see
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qcom,sc8280xp-qmp-usb43dp-phy.yaml.
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maintainers:
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- Wesley Cheng <quic_wcheng@quicinc.com>
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properties:
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compatible:
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oneOf:
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- enum:
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- qcom,sc7180-qmp-usb3-dp-phy
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- qcom,sc8180x-qmp-usb3-dp-phy
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- qcom,sdm845-qmp-usb3-dp-phy
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- qcom,sm8150-qmp-usb3-dp-phy
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- qcom,sm8250-qmp-usb3-dp-phy
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- items:
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- enum:
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- qcom,sc7280-qmp-usb3-dp-phy
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- const: qcom,sm8250-qmp-usb3-dp-phy
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reg:
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items:
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- description: Address and length of PHY's USB serdes block.
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- description: Address and length of the DP_COM control block.
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- description: Address and length of PHY's DP serdes block.
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reg-names:
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items:
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- const: usb
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- const: dp_com
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- const: dp
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"#address-cells":
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enum: [ 1, 2 ]
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"#size-cells":
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enum: [ 1, 2 ]
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ranges: true
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clocks:
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minItems: 3
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maxItems: 4
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clock-names:
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minItems: 3
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maxItems: 4
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power-domains:
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maxItems: 1
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orientation-switch:
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description: Flag the port as possible handler of orientation switching
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type: boolean
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resets:
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items:
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- description: reset of phy block.
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- description: phy common block reset.
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reset-names:
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items:
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- const: phy
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- const: common
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vdda-phy-supply:
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description:
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Phandle to a regulator supply to PHY core block.
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vdda-pll-supply:
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description:
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Phandle to 1.8V regulator supply to PHY refclk pll block.
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vddp-ref-clk-supply:
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description:
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Phandle to a regulator supply to any specific refclk pll block.
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# Required nodes:
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patternProperties:
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"^usb3-phy@[0-9a-f]+$":
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type: object
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additionalProperties: false
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description:
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The USB3 PHY.
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properties:
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reg:
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items:
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- description: Address and length of TX.
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- description: Address and length of RX.
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- description: Address and length of PCS.
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- description: Address and length of TX2.
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- description: Address and length of RX2.
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- description: Address and length of pcs_misc.
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clocks:
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items:
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- description: pipe clock
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clock-names:
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deprecated: true
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items:
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- const: pipe0
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clock-output-names:
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items:
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- const: usb3_phy_pipe_clk_src
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'#clock-cells':
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const: 0
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'#phy-cells':
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const: 0
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required:
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- reg
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- clocks
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- '#clock-cells'
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- '#phy-cells'
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"^dp-phy@[0-9a-f]+$":
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type: object
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additionalProperties: false
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description:
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The DP PHY.
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properties:
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reg:
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items:
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- description: Address and length of TX.
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- description: Address and length of RX.
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- description: Address and length of PCS.
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- description: Address and length of TX2.
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- description: Address and length of RX2.
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'#clock-cells':
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const: 1
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'#phy-cells':
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const: 0
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required:
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- reg
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- '#clock-cells'
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- '#phy-cells'
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- ranges
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- clocks
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- clock-names
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- resets
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- reset-names
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- vdda-phy-supply
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- vdda-pll-supply
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allOf:
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- if:
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properties:
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compatible:
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enum:
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- qcom,sc7180-qmp-usb3-dp-phy
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- qcom,sdm845-qmp-usb3-dp-phy
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then:
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properties:
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clocks:
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items:
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- description: Phy aux clock
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- description: Phy config clock
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- description: 19.2 MHz ref clk
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- description: Phy common block aux clock
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clock-names:
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items:
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- const: aux
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- const: cfg_ahb
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- const: ref
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- const: com_aux
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- if:
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properties:
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compatible:
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enum:
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- qcom,sc8180x-qmp-usb3-dp-phy
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- qcom,sm8150-qmp-usb3-dp-phy
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then:
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properties:
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clocks:
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items:
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- description: Phy aux clock
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- description: 19.2 MHz ref clk
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- description: Phy common block aux clock
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clock-names:
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items:
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- const: aux
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- const: ref
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- const: com_aux
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- if:
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properties:
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compatible:
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enum:
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- qcom,sm8250-qmp-usb3-dp-phy
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then:
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properties:
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clocks:
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items:
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- description: Phy aux clock
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- description: Board XO source
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- description: Phy common block aux clock
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clock-names:
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items:
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- const: aux
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- const: ref_clk_src
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- const: com_aux
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sdm845.h>
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usb_1_qmpphy: phy-wrapper@88e9000 {
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compatible = "qcom,sdm845-qmp-usb3-dp-phy";
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reg = <0x088e9000 0x18c>,
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<0x088e8000 0x10>,
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<0x088ea000 0x40>;
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reg-names = "usb", "dp_com", "dp";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x088e9000 0x2000>;
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clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
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<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
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<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
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<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
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clock-names = "aux", "cfg_ahb", "ref", "com_aux";
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resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
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<&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
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reset-names = "phy", "common";
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vdda-phy-supply = <&vdda_usb2_ss_1p2>;
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vdda-pll-supply = <&vdda_usb2_ss_core>;
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orientation-switch;
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usb3-phy@200 {
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reg = <0x200 0x128>,
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<0x400 0x200>,
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<0xc00 0x218>,
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<0x600 0x128>,
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<0x800 0x200>,
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<0xa00 0x100>;
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#clock-cells = <0>;
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#phy-cells = <0>;
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clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
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clock-output-names = "usb3_phy_pipe_clk_src";
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};
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dp-phy@88ea200 {
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reg = <0xa200 0x200>,
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<0xa400 0x200>,
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<0xaa00 0x200>,
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<0xa600 0x200>,
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<0xa800 0x200>;
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#clock-cells = <1>;
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#phy-cells = <0>;
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};
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};
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@ -16,8 +16,14 @@ description:
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properties:
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compatible:
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enum:
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- qcom,sc7180-qmp-usb3-dp-phy
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- qcom,sc7280-qmp-usb3-dp-phy
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- qcom,sc8180x-qmp-usb3-dp-phy
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- qcom,sc8280xp-qmp-usb43dp-phy
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- qcom,sdm845-qmp-usb3-dp-phy
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- qcom,sm6350-qmp-usb3-dp-phy
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- qcom,sm8150-qmp-usb3-dp-phy
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- qcom,sm8250-qmp-usb3-dp-phy
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- qcom,sm8350-qmp-usb3-dp-phy
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- qcom,sm8450-qmp-usb3-dp-phy
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- qcom,sm8550-qmp-usb3-dp-phy
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@ -26,14 +32,17 @@ properties:
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maxItems: 1
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clocks:
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maxItems: 4
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minItems: 4
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maxItems: 5
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clock-names:
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minItems: 4
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items:
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- const: aux
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- const: ref
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- const: com_aux
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- const: usb3_pipe
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- const: cfg_ahb
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power-domains:
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maxItems: 1
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@ -85,7 +94,6 @@ required:
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- reg
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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- vdda-phy-supply
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@ -93,6 +101,40 @@ required:
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- "#clock-cells"
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- "#phy-cells"
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allOf:
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- if:
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properties:
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compatible:
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enum:
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- qcom,sc7180-qmp-usb3-dp-phy
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- qcom,sdm845-qmp-usb3-dp-phy
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then:
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properties:
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clocks:
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maxItems: 5
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clock-names:
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maxItems: 5
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else:
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properties:
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clocks:
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maxItems: 4
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clock-names:
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maxItems: 4
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- if:
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properties:
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compatible:
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enum:
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- qcom,sc8280xp-qmp-usb43dp-phy
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- qcom,sm6350-qmp-usb3-dp-phy
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- qcom,sm8550-qmp-usb3-dp-phy
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then:
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required:
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- power-domains
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else:
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properties:
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power-domains: false
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additionalProperties: false
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examples:
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