UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

Versatile DTS updates for the v5.7 series take one: 

- Schema validation for the top level of all ARM reference
   designs: Integrator, Versatile, RealView, Juno.
 - Clean up some node names in the trees so they pass
   validation fine.
 - Drop the old text bindings.
 - A top level DMA ranges patch from Rob.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl5fvGIACgkQQRCzN7AZ
 XXNf7xAAuf9DBhZ544JMn67I4reSltISWeng8TfPjT8ZB+3l8X+G6YEXoBdgd0dl
 SYwtJyJ7wOQJk2jCy9L5lOnvF3frD8OIZw/UDAhHno/kn4yrR2/sHjhqSGEpspaL
 wZ0LLRe6wnPNBQHgvGVa3T/Tr7nLbu5Gs/Z+LAb1C4V5atj386JLF9OxNcK5xUMx
 +abJinQF1kI79N5HgLE+BZ5qNZG4COlcdHZz5im6sBPKF4UDyfHYqUY0FGUIhV4j
 3biI1L5w0CWJ498eXOlQ5zMnuUyp17gEgd7MBOOe02LzJOfh6m2qHbOWIe8x22/i
 sqs/Q5hwSeKzrKFzwQqgY/i9O/WeIvziMVUAb3FzcuTrXJGKHXpMXkSYhsAv+Yyv
 gOkTmsUA4y9Q6LlhGCrZcpKzan7pM1rKtJMK+3yj/GvEookpzFj59LkWFHdsOIJZ
 Gp34xT5hO8RKSrrNMX7b92svJtFdWciKWxVPlEK2pdfNam3+B0/nkv2QLDJ8e1t6
 IslDcPDiJf7e0xEelG+tpkLpjls/1QSBA+kghZA5L0NL5mbnM9j4/NH7RMChfF/8
 zu6VKuQdDNGjpEqocCDy0OlGjD0gNQcHHaCQepqMX6LaEnEoA3zQezjDDRpXg2l+
 5ouUsPMtIWIG8lCxhI6XCFpWgmd05zOJRbbuKevoGwIchT1/bMA=
 =0W6a
 -----END PGP SIGNATURE-----

Merge tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt

Versatile DTS updates for the v5.7 series take one:

- Schema validation for the top level of all ARM reference
  designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
  validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.

* tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM/arm64: dts: Rename SMB bus to just bus
  dt-bindings: arm: Drop the non-YAML bindings
  dt-bindings: arm: Add Versatile Express and Juno YAML schema
  dt-bindings: arm: Add RealView YAML schema
  dt-bindings: arm: Add Versatile YAML schema
  dt-bindings: arm: Add Integrator YAML schema
  ARM: dts: RealView: Fix the name of the SoC node
  ARM: dts: Versatile: Use syscon as node name for IB2
  ARM: dts: integratorap: Remove top level dma-ranges

Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-03-25 21:39:15 +01:00
parent 7d716bd4b6 bee7ff37ec
commit 56fc0e678f
23 changed files with 519 additions and 483 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

86
Documentation/devicetree/bindings/arm/arm,integrator.yaml Normal file
View File

@ -0,0 +1,86 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,integrator.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Integrator Boards Device Tree Bindings
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |+
These were the first ARM platforms officially supported by ARM Ltd.
They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
so the system is modular and can host a variety of CPU tiles called
"core tiles" and referred to in the device tree as "core modules".
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: ARM Integrator Application Platform, this board has a PCI
host and several PCI slots, as well as a number of slots for logical
expansion modules, it is referred to as an "ASIC Development
Motherboard" and is extended with custom FPGA and is intended for
rapid prototyping. See ARM DUI 0098B. This board can physically come
pre-packaged in a PC Tower form factor called Integrator/PP1 or a
special metal fixture called Integrator/PP2, see ARM DUI 0169A.
items:
- const: arm,integrator-ap
- description: ARM Integrator Compact Platform (HBI-0086), this board has
a compact form factor and mainly consists of the bare minimum
peripherals to make use of the core module. See ARM DUI 0159B.
items:
- const: arm,integrator-cp
- description: ARM Integrator Standard Development Board (SDB) Platform,
this board is a PCI-based board conforming to the Microsoft SDB
(HARP) specification. See ARM DUI 0099A.
items:
- const: arm,integrator-sp
core-module@10000000:
type: object
description: the root node in the Integrator platforms must contain
a core module child node. They are always at physical address
0x10000000 in all the Integrator variants.
properties:
compatible:
items:
- const: arm,core-module-integrator
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
required:
- compatible
- reg
patternProperties:
"^syscon@[0-9a-f]+$":
description: All Integrator boards must provide a system controller as a
node in the root of the device tree.
type: object
properties:
compatible:
items:
- enum:
- arm,integrator-ap-syscon
- arm,integrator-cp-syscon
- arm,integrator-sp-syscon
- const: syscon
reg:
maxItems: 1
required:
- compatible
- reg
required:
- compatible
- core-module@10000000
...

123
Documentation/devicetree/bindings/arm/arm,realview.yaml Normal file
View File

@ -0,0 +1,123 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,realview.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM RealView Boards Device Tree Bindings
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |+
The ARM RealView series of reference designs were built to explore the ARM
11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to
the earlier CPUs such as TrustZone and multicore (MPCore).
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: ARM RealView Emulation Baseboard (HBI-0140) was created
as a generic platform to test different FPGA designs, and has
pluggable CPU modules, see ARM DUI 0303E.
items:
- const: arm,realview-eb
- description: ARM RealView Platform Baseboard for ARM1176JZF-S
(HBI-0147) was created as a development board to test ARM TrustZone,
CoreSight and Intelligent Energy Management (IEM) see ARM DUI 0425F.
items:
- const: arm,realview-pb1176
- description: ARM RealView Platform Baseboard for ARM 11 MPCore
(HBI-0159, HBI-0175 and HBI-0176) was created to showcase
multiprocessing with ARM11 using MPCore using symmetric
multiprocessing (SMP). See ARM DUI 0351E.
items:
- const: arm,realview-pb11mp
- description: ARM RealView Platform Baseboard for Cortex-A8 (HBI-0178,
HBI-0176 and HBI-0175) was the first reference platform for the
Cortex CPU family, including a Cortex-A8 test chip.
items:
- const: arm,realview-pba8
- description: ARM RealView Platform Baseboard Explore for Cortex-A9
(HBI-0182 and HBI-0183) was the reference platform for the Cortex-A9
CPU.
items:
- const: arm,realview-pbx
soc:
description: All RealView boards must provide a soc node in the root of the
device tree, representing the System-on-Chip since these test chips are
rather complex.
type: object
properties:
compatible:
oneOf:
- items:
- const: arm,realview-eb-soc
- const: simple-bus
- items:
- const: arm,realview-pb1176-soc
- const: simple-bus
- items:
- const: arm,realview-pb11mp-soc
- const: simple-bus
- items:
- const: arm,realview-pba8-soc
- const: simple-bus
- items:
- const: arm,realview-pbx-soc
- const: simple-bus
patternProperties:
"^.*syscon@[0-9a-f]+$":
type: object
description: All RealView boards must provide a syscon system controller
node inside the soc node.
properties:
compatible:
oneOf:
- items:
- const: arm,realview-eb11mp-revb-syscon
- const: arm,realview-eb-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-eb11mp-revc-syscon
- const: arm,realview-eb-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-eb-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pb1176-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pb11mp-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pba8-syscon
- const: syscon
- const: simple-mfd
- items:
- const: arm,realview-pbx-syscon
- const: syscon
- const: simple-mfd
required:
- compatible
- reg
required:
- compatible
required:
- compatible
- soc
...

71
Documentation/devicetree/bindings/arm/arm,versatile.yaml Normal file
View File

@ -0,0 +1,71 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,versatile.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile Boards Device Tree Bindings
maintainers:
- Linus Walleij <linus.walleij@linaro.org>
description: |+
The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
with various pluggable interface boards, in essence the Versatile PB version
is a superset of the Versatile AB version.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: The ARM Versatile Application Baseboard (HBI-0118) is an
evaluation board specifically for the ARM926EJ-S. It can be connected
to an IB1 interface board for a touchscreen-type use case or an IB2
for a candybar phone-type use case. See ARM DUI 0225D.
items:
- const: arm,versatile-ab
- description: The ARM Versatile Platform Baseboard (HBI-0117) is an
extension of the Versatile Application Baseboard that includes a
PCI host controller. Like the sibling board, it is done specifically
for ARM926EJ-S. See ARM DUI 0224B.
items:
- const: arm,versatile-pb
core-module@10000000:
type: object
description: the root node in the Versatile platforms must contain
a core module child node. They are always at physical address
0x10000000 in all the Versatile variants.
properties:
compatible:
items:
- const: arm,core-module-versatile
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
required:
- compatible
- reg
patternProperties:
"^syscon@[0-9a-f]+$":
type: object
description: When fitted with the IB2 Interface Board, the Versatile
AB will present an optional system controller node which controls the
extra peripherals on the interface board.
properties:
compatible:
contains:
const: arm,versatile-ib2-syscon
required:
- compatible
- reg
required:
- compatible
- core-module@10000000
...

223
Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml Normal file
View File

@ -0,0 +1,223 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM Versatile Express and Juno Boards Device Tree Bindings
maintainers:
- Sudeep Holla <sudeep.holla@arm.com>
- Linus Walleij <linus.walleij@linaro.org>
description: |+
ARM's Versatile Express platform were built as reference designs for exploring
multicore Cortex-A class systems. The Versatile Express family contains both
32 bit (Aarch32) and 64 bit (Aarch64) systems.
The board consist of a motherboard and one or more daughterboards (tiles). The
motherboard provides a set of peripherals. Processor and RAM "live" on the
tiles.
The motherboard and each core tile should be described by a separate Device
Tree source file, with the tile's description including the motherboard file
using an include directive. As the motherboard can be initialized in one of
two different configurations ("memory maps"), care must be taken to include
the correct one.
When a new generation of boards were introduced under the name "Juno", these
shared to many common characteristics with the Versatile Express that the
"arm,vexpress" compatible was retained in the root node, and these are
included in this binding schema as well.
The root node indicates the CPU SoC on the core tile, and this
is a daughterboard to the main motherboard. The name used in the compatible
string shall match the name given in the core tile's technical reference
manual, followed by "arm,vexpress" as an additional compatible value. If
further subvariants are released of the core tile, even more fine-granular
compatible strings with up to three compatible strings are used.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
in MPCore configuration in a test chip on the core tile. See ARM
DUI 0448I. This was the first Versatile Express platform.
items:
- const: arm,vexpress,v2p-ca9
- const: arm,vexpress
- description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
in a test chip on the core tile. It is intended to evaluate NEON, FPU
and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
items:
- const: arm,vexpress,v2p-ca5s
- const: arm,vexpress
- description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU
cores in a MPCore configuration in a test chip on the core tile. See
ARM DUI 0604F.
items:
- const: arm,vexpress,v2p-ca15
- const: arm,vexpress
- description: CoreTile Express A15x4 (V2P-CA15, HBI-0237A) has 4 Cortex
A15 CPU cores in a test chip on the core tile. This is the first test
chip called "TC1".
items:
- const: arm,vexpress,v2p-ca15,tc1
- const: arm,vexpress,v2p-ca15
- const: arm,vexpress
- description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15
CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
in a test chip on the core tile. See ARM DDI 0503I.
items:
- const: arm,vexpress,v2p-ca15_a7
- const: arm,vexpress
- description: LogicTile Express 20MG (V2F-1XV7) has 2 Cortex A53 CPU
cores in a test chip on the core tile. See ARM DDI 0498D.
items:
- const: arm,vexpress,v2f-1xv7,ca53x2
- const: arm,vexpress,v2f-1xv7
- const: arm,vexpress
- description: Arm Versatile Express Juno "r0" (the first Juno board,
V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on
AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53
cores in a big.LITTLE configuration. It also features the MALI T624
GPU. See ARM document 100113_0000_07_en.
items:
- const: arm,juno
- const: arm,vexpress
- description: Arm Versatile Express Juno r1 Development Platform
(V2M-Juno r1) was introduced mainly aimed at development of PCIe
based systems. Juno r1 also has support for AXI masters placed on
the TLX connectors to join the coherency domain. Otherwise it is the
same configuration as Juno r0. See ARM document 100122_0100_06_en.
items:
- const: arm,juno-r1
- const: arm,juno
- const: arm,vexpress
- description: Arm Versatile Express Juno r2 Development Platform
(V2M-Juno r2). It has the same feature set as Juno r0 and r1. See
ARM document 100114_0200_04_en.
items:
- const: arm,juno-r2
- const: arm,juno
- const: arm,vexpress
- description: Arm AEMv8a Versatile Express Real-Time System Model
(VE RTSM) is a programmers view of the Versatile Express with Arm
v8A hardware. See ARM DUI 0575D.
items:
- const: arm,rtsm_ve,aemv8a
- const: arm,vexpress
- description: Arm FVP (Fixed Virtual Platform) base model revision C
See ARM Document 100964_1190_00_en.
items:
- const: arm,fvp-base-revc
- const: arm,vexpress
- description: Arm Foundation model for Aarch64
items:
- const: arm,foundation-aarch64
- const: arm,vexpress
arm,hbi:
$ref: '/schemas/types.yaml#/definitions/uint32'
description: This indicates the ARM HBI (Hardware Board ID), this is
ARM's unique board model ID, visible on the PCB's silkscreen.
arm,vexpress,site:
description: As Versatile Express can be configured in number of physically
different setups, the device tree should describe platform topology.
For this reason the root node and main motherboard node must define this
property, describing the physical location of the children nodes.
0 means motherboard site, while 1 and 2 are daughterboard sites, and
0xf means "sisterboard" which is the site containing the main CPU tile.
allOf:
- $ref: '/schemas/types.yaml#/definitions/uint32'
- minimum: 0
maximum: 15
arm,vexpress,position:
description: When daughterboards are stacked on one site, their position
in the stack be be described this attribute.
allOf:
- $ref: '/schemas/types.yaml#/definitions/uint32'
- minimum: 0
maximum: 3
arm,vexpress,dcc:
description: When describing tiles consisting of more than one DCC, its
number can be specified with this attribute.
allOf:
- $ref: '/schemas/types.yaml#/definitions/uint32'
- minimum: 0
maximum: 3
patternProperties:
"^bus@[0-9a-f]+$":
description: Static Memory Bus (SMB) node, if this exists it describes
the connection between the motherboard and any tiles. Sometimes the
compatible is placed directly under this node, sometimes it is placed
in a subnode named "motherboard". Sometimes the compatible includes
"arm,vexpress,v2?-p1" sometimes (on software models) is is just
"simple-bus". If the compatible is placed in the "motherboard" node,
it is stricter and always has two compatibles.
type: object
allOf:
- $ref: '/schemas/simple-bus.yaml'
properties:
compatible:
oneOf:
- items:
- enum:
- arm,vexpress,v2m-p1
- arm,vexpress,v2p-p1
- const: simple-bus
- const: simple-bus
motherboard:
type: object
description: The motherboard description provides a single "motherboard"
node using 2 address cells corresponding to the Static Memory Bus
used between the motherboard and the tile. The first cell defines the
Chip Select (CS) line number, the second cell address offset within
the CS. All interrupt lines between the motherboard and the tile
are active high and are described using single cell.
properties:
"#address-cells":
const: 2
"#size-cells":
const: 1
compatible:
items:
- enum:
- arm,vexpress,v2m-p1
- arm,vexpress,v2p-p1
- const: simple-bus
arm,v2m-memory-map:
description: This describes the memory map type.
allOf:
- $ref: '/schemas/types.yaml#/definitions/string'
- enum:
- rs1
- rs2
required:
- compatible
required:
- compatible
allOf:
- if:
properties:
compatible:
contains:
enum:
- arm,vexpress,v2p-ca9
- arm,vexpress,v2p-ca5s
- arm,vexpress,v2p-ca15
- arm,vexpress,v2p-ca15_a7
- arm,vexpress,v2f-1xv7,ca53x2
then:
required:
- arm,hbi
...

237
Documentation/devicetree/bindings/arm/arm-boards
View File

@ -1,237 +0,0 @@
ARM Integrator/AP (Application Platform) and Integrator/CP (Compact Platform)
-----------------------------------------------------------------------------
ARM's oldest Linux-supported platform with connectors for different core
tiles of ARMv4, ARMv5 and ARMv6 type.
Required properties (in root node):
compatible = "arm,integrator-ap"; /* Application Platform */
compatible = "arm,integrator-cp"; /* Compact Platform */
FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
Required nodes:
- core-module: the root node to the Integrator platforms must have
a core-module with regs and the compatible string
"arm,core-module-integrator"
- external-bus-interface: the root node to the Integrator platforms
must have an external bus interface with regs and the
compatible-string "arm,external-bus-interface"
Required properties for the core module:
- regs: the location and size of the core module registers, one
range of 0x200 bytes.
- syscon: the root node of the Integrator platforms must have a
system controller node pointing to the control registers,
with the compatible string
"arm,integrator-ap-syscon"
"arm,integrator-cp-syscon"
respectively.
Required properties for the system controller:
- regs: the location and size of the system controller registers,
one range of 0x100 bytes.
Required properties for the AP system controller:
- interrupts: the AP syscon node must include the logical module
interrupts, stated in order of module instance <module 0>,
<module 1>, <module 2> ... for the CP system controller this
is not required not of any use.
/dts-v1/;
/include/ "integrator.dtsi"
/ {
model = "ARM Integrator/AP";
compatible = "arm,integrator-ap";
core-module@10000000 {
compatible = "arm,core-module-integrator";
reg = <0x10000000 0x200>;
};
ebi@12000000 {
compatible = "arm,external-bus-interface";
reg = <0x12000000 0x100>;
};
syscon {
compatible = "arm,integrator-ap-syscon";
reg = <0x11000000 0x100>;
interrupt-parent = <&pic>;
/* These are the logic module IRQs */
interrupts = <9>, <10>, <11>, <12>;
};
};
ARM Versatile Application and Platform Baseboards
-------------------------------------------------
ARM's development hardware platform with connectors for customizable
core tiles. The hardware configuration of the Versatile boards is
highly customizable.
Required properties (in root node):
compatible = "arm,versatile-ab"; /* Application baseboard */
compatible = "arm,versatile-pb"; /* Platform baseboard */
Interrupt controllers:
- VIC required properties:
compatible = "arm,versatile-vic";
interrupt-controller;
#interrupt-cells = <1>;
- SIC required properties:
compatible = "arm,versatile-sic";
interrupt-controller;
#interrupt-cells = <1>;
Required nodes:
- core-module: the root node to the Versatile platforms must have
a core-module with regs and the compatible strings
"arm,core-module-versatile", "syscon"
Optional nodes:
- arm,versatile-ib2-syscon : if the Versatile has an IB2 interface
board mounted, this has a separate system controller that is
defined in this node.
Required properties:
compatible = "arm,versatile-ib2-syscon", "syscon"
ARM RealView Boards
-------------------
The RealView boards cover tailored evaluation boards that are used to explore
the ARM11 and Cortex A-8 and Cortex A-9 processors.
Required properties (in root node):
/* RealView Emulation Baseboard */
compatible = "arm,realview-eb";
/* RealView Platform Baseboard for ARM1176JZF-S */
compatible = "arm,realview-pb1176";
/* RealView Platform Baseboard for ARM11 MPCore */
compatible = "arm,realview-pb11mp";
/* RealView Platform Baseboard for Cortex A-8 */
compatible = "arm,realview-pba8";
/* RealView Platform Baseboard Explore for Cortex A-9 */
compatible = "arm,realview-pbx";
Required nodes:
- soc: some node of the RealView platforms must be the SoC
node that contain the SoC-specific devices, with the compatible
string set to one of these tuples:
"arm,realview-eb-soc", "simple-bus"
"arm,realview-pb1176-soc", "simple-bus"
"arm,realview-pb11mp-soc", "simple-bus"
"arm,realview-pba8-soc", "simple-bus"
"arm,realview-pbx-soc", "simple-bus"
- syscon: some subnode of the RealView SoC node must be a
system controller node pointing to the control registers,
with the compatible string set to one of these:
"arm,realview-eb11mp-revb-syscon", "arm,realview-eb-syscon", "syscon"
"arm,realview-eb11mp-revc-syscon", "arm,realview-eb-syscon", "syscon"
"arm,realview-eb-syscon", "syscon"
"arm,realview-pb1176-syscon", "syscon"
"arm,realview-pb11mp-syscon", "syscon"
"arm,realview-pba8-syscon", "syscon"
"arm,realview-pbx-syscon", "syscon"
Required properties for the system controller:
- regs: the location and size of the system controller registers,
one range of 0x1000 bytes.
Example:
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "ARM RealView PB1176 with device tree";
compatible = "arm,realview-pb1176";
#address-cells = <1>;
#size-cells = <1>;
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-pb1176-soc", "simple-bus";
ranges;
syscon: syscon@10000000 {
compatible = "arm,realview-syscon", "syscon";
reg = <0x10000000 0x1000>;
};
};
};
ARM Versatile Express Boards
-----------------------------
For details on the device tree bindings for ARM Versatile Express boards
please consult the vexpress.txt file in the same directory as this file.
ARM Juno Boards
----------------
The Juno boards are targeting development for AArch64 systems. The first
iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64,
with the second iteration, Juno r1, mainly aimed at development of PCIe
based systems. Juno r1 also has support for AXI masters placed on the TLX
connectors to join the coherency domain.
Juno boards are described in a similar way to ARM Versatile Express boards,
with the motherboard part of the hardware being described in a separate file
to highlight the fact that is part of the support infrastructure for the SoC.
Juno device tree bindings also share the Versatile Express bindings as
described under the RS1 memory mapping.
Required properties (in root node):
compatible = "arm,juno"; /* For Juno r0 board */
compatible = "arm,juno-r1"; /* For Juno r1 board */
compatible = "arm,juno-r2"; /* For Juno r2 board */
Required nodes:
The description for the board must include:
- a "psci" node describing the boot method used for the secondary CPUs.
A detailed description of the bindings used for "psci" nodes is present
in the psci.yaml file.
- a "cpus" node describing the available cores and their associated
"enable-method"s. For more details see cpus.yaml file.
Example:
/dts-v1/;
/ {
model = "ARM Juno development board (r0)";
compatible = "arm,juno", "arm,vexpress";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
A57_0: cpu@0 {
compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
};
.....
A53_0: cpu@100 {
compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
};
.....
};
};

229
Documentation/devicetree/bindings/arm/vexpress.txt
View File

@ -1,229 +0,0 @@
ARM Versatile Express boards family
-----------------------------------
ARM's Versatile Express platform consists of a motherboard and one
or more daughterboards (tiles). The motherboard provides a set of
peripherals. Processor and RAM "live" on the tiles.
The motherboard and each core tile should be described by a separate
Device Tree source file, with the tile's description including
the motherboard file using a /include/ directive. As the motherboard
can be initialized in one of two different configurations ("memory
maps"), care must be taken to include the correct one.
Root node
---------
Required properties in the root node:
- compatible value:
compatible = "arm,vexpress,<model>", "arm,vexpress";
where <model> is the full tile model name (as used in the tile's
Technical Reference Manual), eg.:
- for Coretile Express A5x2 (V2P-CA5s):
compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
- for Coretile Express A9x4 (V2P-CA9):
compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
If a tile comes in several variants or can be used in more then one
configuration, the compatible value should be:
compatible = "arm,vexpress,<model>,<variant>", \
"arm,vexpress,<model>", "arm,vexpress";
eg:
- Coretile Express A15x2 (V2P-CA15) with Tech Chip 1:
compatible = "arm,vexpress,v2p-ca15,tc1", \
"arm,vexpress,v2p-ca15", "arm,vexpress";
- LogicTile Express 13MG (V2F-2XV6) running Cortex-A7 (3 cores) SMM:
compatible = "arm,vexpress,v2f-2xv6,ca7x3", \
"arm,vexpress,v2f-2xv6", "arm,vexpress";
Optional properties in the root node:
- tile model name (use name from the tile's Technical Reference
Manual, eg. "V2P-CA5s")
model = "<model>";
- tile's HBI number (unique ARM's board model ID, visible on the
PCB's silkscreen) in hexadecimal transcription:
arm,hbi = <0xhbi>
eg:
- for Coretile Express A5x2 (V2P-CA5s) HBI-0191:
arm,hbi = <0x191>;
- Coretile Express A9x4 (V2P-CA9) HBI-0225:
arm,hbi = <0x225>;
CPU nodes
---------
Top-level standard "cpus" node is required. It must contain a node
with device_type = "cpu" property for every available core, eg.:
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a5";
reg = <0>;
};
};
Configuration infrastructure
----------------------------
The platform has an elaborated configuration system, consisting of
microcontrollers residing on the mother- and daughterboards known
as Motherboard/Daughterboard Configuration Controller (MCC and DCC).
The controllers are responsible for the platform initialization
(reset generation, flash programming, FPGA bitfiles loading etc.)
but also control clock generators, voltage regulators, gather
environmental data like temperature, power consumption etc. Even
the video output switch (FPGA) is controlled that way.
The controllers are not mapped into normal memory address space
and must be accessed through bridges - other devices capable
of generating transactions on the configuration bus.
The nodes describing configuration controllers must define
the following properties:
- compatible value:
compatible = "arm,vexpress,config-bus";
- bridge phandle:
arm,vexpress,config-bridge = <phandle>;
and children describing available functions.
Platform topology
-----------------
As Versatile Express can be configured in number of physically
different setups, the device tree should describe platform topology.
Root node and main motherboard node must define the following
property, describing physical location of the children nodes:
- site number:
arm,vexpress,site = <number>;
where 0 means motherboard, 1 or 2 are daugtherboard sites,
0xf means "master" site (site containing main CPU tile)
- when daughterboards are stacked on one site, their position
in the stack be be described with:
arm,vexpress,position = <number>;
- when describing tiles consisting more than one DCC, its number
can be described with:
arm,vexpress,dcc = <number>;
Any of the numbers above defaults to zero if not defined in
the node or any of its parent.
Motherboard
-----------
The motherboard description file provides a single "motherboard" node
using 2 address cells corresponding to the Static Memory Bus used
between the motherboard and the tile. The first cell defines the Chip
Select (CS) line number, the second cell address offset within the CS.
All interrupt lines between the motherboard and the tile are active
high and are described using single cell.
Optional properties of the "motherboard" node:
- motherboard's memory map variant:
arm,v2m-memory-map = "<name>";
where name is one of:
- "rs1" - for RS1 map (i.a. peripherals on CS3); this map is also
referred to as "ARM Cortex-A Series memory map":
arm,v2m-memory-map = "rs1";
When this property is missing, the motherboard is using the original
memory map (also known as the "Legacy memory map", primarily used
with the original CoreTile Express A9x4) with peripherals on CS7.
Motherboard .dtsi files provide a set of labelled peripherals that
can be used to obtain required phandle in the tile's "aliases" node:
- UARTs, note that the numbers correspond to the physical connectors
on the motherboard's back panel:
v2m_serial0, v2m_serial1, v2m_serial2 and v2m_serial3
- I2C controllers:
v2m_i2c_dvi and v2m_i2c_pcie
- SP804 timers:
v2m_timer01 and v2m_timer23
The tile description should define a "smb" node, describing the
Static Memory Bus between the tile and motherboard. It must define
the following properties:
- "simple-bus" compatible value (to ensure creation of the children)
compatible = "simple-bus";
- mapping of the SMB CS/offset addresses into main address space:
#address-cells = <2>;
#size-cells = <1>;
ranges = <...>;
- interrupts mapping:
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 63>;
interrupt-map = <...>;
Example of a VE tile description (simplified)
---------------------------------------------
/dts-v1/;
/ {
model = "V2P-CA5s";
arm,hbi = <0x225>;
arm,vexpress,site = <0xf>;
compatible = "arm,vexpress-v2p-ca5s", "arm,vexpress";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases {
serial0 = &v2m_serial0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a5";
reg = <0>;
};
};
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x2c001000 0x1000>,
<0x2c000100 0x100>;
};
dcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
osc@0 {
compatible = "arm,vexpress-osc";
};
};
smb {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
/* CS0 is visible at 0x08000000 */
ranges = <0 0 0x08000000 0x04000000>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 63>;
/* Active high IRQ 0 is connected to GIC's SPI0 */
interrupt-map = <0 0 0 &gic 0 0 4>;
/include/ "vexpress-v2m-rs1.dtsi"
};
};

2
arch/arm/boot/dts/arm-realview-pbx.dtsi
View File

@ -210,7 +210,7 @@
};
};
soc: soc@0 {
soc: soc {
compatible = "arm,realview-pbx-soc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

1
arch/arm/boot/dts/integratorap.dts
View File

@ -9,7 +9,6 @@
/ {
model = "ARM Integrator/AP";
compatible = "arm,integrator-ap";
dma-ranges = <0x80000000 0x0 0x80000000>;
cpus {
#address-cells = <1>;

2
arch/arm/boot/dts/versatile-ab-ib2.dts
View File

@ -10,7 +10,7 @@
model = "ARM Versatile AB + IB2 board";
/* Special IB2 control register */
ib2_syscon@27000000 {
syscon@27000000 {
compatible = "arm,versatile-ib2-syscon", "syscon", "simple-mfd";
reg = <0x27000000 0x4>;

2
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
View File

@ -19,7 +19,7 @@
*/
/ {
smb@8000000 {
bus@8000000 {
motherboard {
model = "V2M-P1";
arm,hbi = <0x190>;

2
arch/arm/boot/dts/vexpress-v2m.dtsi
View File

@ -19,7 +19,7 @@
*/
/ {
smb@4000000 {
bus@4000000 {
motherboard {
model = "V2M-P1";
arm,hbi = <0x190>;

2
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
View File

@ -236,7 +236,7 @@
};
};
smb@8000000 {
bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;

2
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
View File

@ -608,7 +608,7 @@
};
};
smb: smb@8000000 {
smb: bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;

2
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
View File

@ -206,7 +206,7 @@
};
};
smb: smb@8000000 {
smb: bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;

2
arch/arm/boot/dts/vexpress-v2p-ca9.dts
View File

@ -295,7 +295,7 @@
};
};
smb: smb@4000000 {
smb: bus@4000000 {
compatible = "simple-bus";
#address-cells = <2>;

2
arch/arm64/boot/dts/arm/foundation-v8.dtsi
View File

@ -92,7 +92,7 @@
timeout-sec = <30>;
};
smb@8000000 {
bus@8000000 {
compatible = "arm,vexpress,v2m-p1", "simple-bus";
arm,v2m-memory-map = "rs1";
#address-cells = <2>; /* SMB chipselect number and offset */

2
arch/arm64/boot/dts/arm/fvp-base-revc.dts
View File

@ -206,7 +206,7 @@
};
};
smb@8000000 {
bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;

2
arch/arm64/boot/dts/arm/juno-base.dtsi
View File

@ -800,7 +800,7 @@
<0x00000008 0x80000000 0x1 0x80000000>;
};
smb@8000000 {
bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;

2
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
View File

@ -8,7 +8,7 @@
*/
/ {
smb@8000000 {
bus@8000000 {
mb_clk24mhz: clk24mhz {
compatible = "fixed-clock";
#clock-cells = <0>;

2
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
View File

@ -132,7 +132,7 @@
};
};
smb@8000000 {
bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;

2
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
View File

@ -5,7 +5,7 @@
* "rs2" extension for the v2m motherboard
*/
/ {
smb@8000000 {
bus@8000000 {
motherboard {
arm,v2m-memory-map = "rs2";

2
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
View File

@ -8,7 +8,7 @@
* VEMotherBoard.lisa
*/
/ {
smb@8000000 {
bus@8000000 {
motherboard {
arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";

2
arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
View File

@ -144,7 +144,7 @@
};
};
smb: smb@8000000 {
smb: bus@8000000 {
compatible = "simple-bus";
#address-cells = <2>;