powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)
spi_t was removed in commit 644b2a680c
("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed
that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But
it appears that the struct is needed for micropatch code. So, let's
reintroduce the struct.
Fixes the following build issue:
CC arch/powerpc/sysdev/micropatch.o
micropatch.c: In function 'cpm_load_patch':
micropatch.c:629: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token
micropatch.c:629: error: 'spp' undeclared (first use in this function)
micropatch.c:629: error: (Each undeclared identifier is reported only once
micropatch.c:629: error: for each function it appears in.)
Reported-by: LEROY Christophe <christophe.leroy@c-s.fr>
Reported-by: Tony Breeds <tony@bakeyournoodle.com>
Cc: <stable@kernel.org> [ .33, .34 ]
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
e467e104bb
commit
56825c88ff
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@ -6,6 +6,30 @@
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#include <linux/errno.h>
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#include <linux/of.h>
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/*
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* SPI Parameter RAM common to QE and CPM.
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*/
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struct spi_pram {
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__be16 rbase; /* Rx Buffer descriptor base address */
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__be16 tbase; /* Tx Buffer descriptor base address */
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u8 rfcr; /* Rx function code */
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u8 tfcr; /* Tx function code */
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__be16 mrblr; /* Max receive buffer length */
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__be32 rstate; /* Internal */
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__be32 rdp; /* Internal */
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__be16 rbptr; /* Internal */
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__be16 rbc; /* Internal */
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__be32 rxtmp; /* Internal */
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__be32 tstate; /* Internal */
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__be32 tdp; /* Internal */
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__be16 tbptr; /* Internal */
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__be16 tbc; /* Internal */
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__be32 txtmp; /* Internal */
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__be32 res; /* Tx temp. */
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__be16 rpbase; /* Relocation pointer (CPM1 only) */
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__be16 res1; /* Reserved */
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};
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/*
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* USB Controller pram common to QE and CPM.
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*/
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@ -16,6 +16,7 @@
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/8xx_immap.h>
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#include <asm/cpm.h>
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#include <asm/cpm1.h>
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/*
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@ -626,7 +627,7 @@ cpm_load_patch(cpm8xx_t *cp)
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volatile uint *dp; /* Dual-ported RAM. */
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volatile cpm8xx_t *commproc;
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volatile iic_t *iip;
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volatile spi_t *spp;
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volatile struct spi_pram *spp;
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volatile smc_uart_t *smp;
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int i;
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@ -668,8 +669,8 @@ cpm_load_patch(cpm8xx_t *cp)
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/* Put SPI above the IIC, also 32-byte aligned.
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*/
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i = (RPBASE + sizeof(iic_t) + 31) & ~31;
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spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
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spp->spi_rpbase = i;
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spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
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spp->rpbase = i;
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# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
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commproc->cp_cpmcr1 = 0x802a;
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@ -66,28 +66,6 @@ struct mpc8xxx_spi_reg {
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__be32 receive;
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};
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/* SPI Parameter RAM */
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struct spi_pram {
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__be16 rbase; /* Rx Buffer descriptor base address */
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__be16 tbase; /* Tx Buffer descriptor base address */
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u8 rfcr; /* Rx function code */
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u8 tfcr; /* Tx function code */
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__be16 mrblr; /* Max receive buffer length */
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__be32 rstate; /* Internal */
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__be32 rdp; /* Internal */
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__be16 rbptr; /* Internal */
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__be16 rbc; /* Internal */
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__be32 rxtmp; /* Internal */
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__be32 tstate; /* Internal */
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__be32 tdp; /* Internal */
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__be16 tbptr; /* Internal */
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__be16 tbc; /* Internal */
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__be32 txtmp; /* Internal */
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__be32 res; /* Tx temp. */
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__be16 rpbase; /* Relocation pointer (CPM1 only) */
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__be16 res1; /* Reserved */
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};
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/* SPI Controller mode register definitions */
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#define SPMODE_LOOP (1 << 30)
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#define SPMODE_CI_INACTIVEHIGH (1 << 29)
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