staging/rdma/hfi1: Correctly set RcvCtxtCtrl register
The RcvCtxtCtrl register was being incorrectly set upon context initialization and clean up resulting, in many cases, of contexts using settings from previous contexts' initialization. This resulted in bad and unexpected behavior. This was especially important for the TailUpd bit, which requires special handling and if set incorrectly could lead to severely degraded performance. This patch fixes the handling of the RcvCtxtCtrl register, ensuring that each context gets initialized with settings applicable only for that context. It also ensures the proper setting for the TailUpd bit by setting it to either 0 or 1 (as needed by the context's configuration) explicitly. Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Mitko Haralanov <mitko.haralanov@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -6684,11 +6684,17 @@ static void rxe_freeze(struct hfi1_devdata *dd)
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*/
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*/
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static void rxe_kernel_unfreeze(struct hfi1_devdata *dd)
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static void rxe_kernel_unfreeze(struct hfi1_devdata *dd)
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{
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{
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u32 rcvmask;
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int i;
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int i;
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/* enable all kernel contexts */
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/* enable all kernel contexts */
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for (i = 0; i < dd->n_krcv_queues; i++)
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for (i = 0; i < dd->n_krcv_queues; i++) {
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hfi1_rcvctrl(dd, HFI1_RCVCTRL_CTXT_ENB, i);
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rcvmask = HFI1_RCVCTRL_CTXT_ENB;
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/* HFI1_RCVCTRL_TAILUPD_[ENB|DIS] needs to be set explicitly */
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rcvmask |= HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, DMA_RTAIL) ?
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HFI1_RCVCTRL_TAILUPD_ENB : HFI1_RCVCTRL_TAILUPD_DIS;
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hfi1_rcvctrl(dd, rcvmask, i);
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}
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/* enable port */
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/* enable port */
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add_rcvctrl(dd, RCV_CTRL_RCV_PORT_ENABLE_SMASK);
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add_rcvctrl(dd, RCV_CTRL_RCV_PORT_ENABLE_SMASK);
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@ -11255,6 +11261,7 @@ void hfi1_rcvctrl(struct hfi1_devdata *dd, unsigned int op, int ctxt)
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if (dd->rcvhdrtail_dummy_physaddr) {
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if (dd->rcvhdrtail_dummy_physaddr) {
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write_kctxt_csr(dd, ctxt, RCV_HDR_TAIL_ADDR,
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write_kctxt_csr(dd, ctxt, RCV_HDR_TAIL_ADDR,
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dd->rcvhdrtail_dummy_physaddr);
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dd->rcvhdrtail_dummy_physaddr);
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/* Enabling RcvCtxtCtrl.TailUpd is intentional. */
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rcvctrl |= RCV_CTXT_CTRL_TAIL_UPD_SMASK;
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rcvctrl |= RCV_CTXT_CTRL_TAIL_UPD_SMASK;
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}
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}
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@ -11266,8 +11273,11 @@ void hfi1_rcvctrl(struct hfi1_devdata *dd, unsigned int op, int ctxt)
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rcvctrl &= ~RCV_CTXT_CTRL_INTR_AVAIL_SMASK;
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rcvctrl &= ~RCV_CTXT_CTRL_INTR_AVAIL_SMASK;
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if (op & HFI1_RCVCTRL_TAILUPD_ENB && rcd->rcvhdrqtailaddr_phys)
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if (op & HFI1_RCVCTRL_TAILUPD_ENB && rcd->rcvhdrqtailaddr_phys)
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rcvctrl |= RCV_CTXT_CTRL_TAIL_UPD_SMASK;
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rcvctrl |= RCV_CTXT_CTRL_TAIL_UPD_SMASK;
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if (op & HFI1_RCVCTRL_TAILUPD_DIS)
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if (op & HFI1_RCVCTRL_TAILUPD_DIS) {
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rcvctrl &= ~RCV_CTXT_CTRL_TAIL_UPD_SMASK;
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/* See comment on RcvCtxtCtrl.TailUpd above */
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if (!(op & HFI1_RCVCTRL_CTXT_DIS))
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rcvctrl &= ~RCV_CTXT_CTRL_TAIL_UPD_SMASK;
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}
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if (op & HFI1_RCVCTRL_TIDFLOW_ENB)
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if (op & HFI1_RCVCTRL_TIDFLOW_ENB)
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rcvctrl |= RCV_CTXT_CTRL_TID_FLOW_ENABLE_SMASK;
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rcvctrl |= RCV_CTXT_CTRL_TID_FLOW_ENABLE_SMASK;
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if (op & HFI1_RCVCTRL_TIDFLOW_DIS)
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if (op & HFI1_RCVCTRL_TIDFLOW_DIS)
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@ -771,6 +771,7 @@ static int hfi1_file_close(struct inode *inode, struct file *fp)
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hfi1_rcvctrl(dd, HFI1_RCVCTRL_CTXT_DIS |
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hfi1_rcvctrl(dd, HFI1_RCVCTRL_CTXT_DIS |
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HFI1_RCVCTRL_TIDFLOW_DIS |
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HFI1_RCVCTRL_TIDFLOW_DIS |
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HFI1_RCVCTRL_INTRAVAIL_DIS |
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HFI1_RCVCTRL_INTRAVAIL_DIS |
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HFI1_RCVCTRL_TAILUPD_DIS |
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HFI1_RCVCTRL_ONE_PKT_EGR_DIS |
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HFI1_RCVCTRL_ONE_PKT_EGR_DIS |
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HFI1_RCVCTRL_NO_RHQ_DROP_DIS |
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HFI1_RCVCTRL_NO_RHQ_DROP_DIS |
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HFI1_RCVCTRL_NO_EGR_DROP_DIS, uctxt->ctxt);
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HFI1_RCVCTRL_NO_EGR_DROP_DIS, uctxt->ctxt);
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@ -1156,8 +1157,16 @@ static int user_init(struct file *fp)
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rcvctrl_ops |= HFI1_RCVCTRL_NO_EGR_DROP_ENB;
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rcvctrl_ops |= HFI1_RCVCTRL_NO_EGR_DROP_ENB;
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if (HFI1_CAP_KGET_MASK(uctxt->flags, NODROP_RHQ_FULL))
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if (HFI1_CAP_KGET_MASK(uctxt->flags, NODROP_RHQ_FULL))
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rcvctrl_ops |= HFI1_RCVCTRL_NO_RHQ_DROP_ENB;
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rcvctrl_ops |= HFI1_RCVCTRL_NO_RHQ_DROP_ENB;
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/*
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* The RcvCtxtCtrl.TailUpd bit has to be explicitly written.
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* We can't rely on the correct value to be set from prior
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* uses of the chip or ctxt. Therefore, add the rcvctrl op
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* for both cases.
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*/
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if (HFI1_CAP_KGET_MASK(uctxt->flags, DMA_RTAIL))
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if (HFI1_CAP_KGET_MASK(uctxt->flags, DMA_RTAIL))
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rcvctrl_ops |= HFI1_RCVCTRL_TAILUPD_ENB;
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rcvctrl_ops |= HFI1_RCVCTRL_TAILUPD_ENB;
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else
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rcvctrl_ops |= HFI1_RCVCTRL_TAILUPD_DIS;
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hfi1_rcvctrl(uctxt->dd, rcvctrl_ops, uctxt->ctxt);
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hfi1_rcvctrl(uctxt->dd, rcvctrl_ops, uctxt->ctxt);
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/* Notify any waiting slaves */
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/* Notify any waiting slaves */
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@ -589,8 +589,8 @@ static void enable_chip(struct hfi1_devdata *dd)
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* Enable kernel ctxts' receive and receive interrupt.
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* Enable kernel ctxts' receive and receive interrupt.
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* Other ctxts done as user opens and initializes them.
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* Other ctxts done as user opens and initializes them.
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*/
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*/
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rcvmask = HFI1_RCVCTRL_CTXT_ENB | HFI1_RCVCTRL_INTRAVAIL_ENB;
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for (i = 0; i < dd->first_user_ctxt; ++i) {
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for (i = 0; i < dd->first_user_ctxt; ++i) {
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rcvmask = HFI1_RCVCTRL_CTXT_ENB | HFI1_RCVCTRL_INTRAVAIL_ENB;
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rcvmask |= HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, DMA_RTAIL) ?
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rcvmask |= HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, DMA_RTAIL) ?
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HFI1_RCVCTRL_TAILUPD_ENB : HFI1_RCVCTRL_TAILUPD_DIS;
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HFI1_RCVCTRL_TAILUPD_ENB : HFI1_RCVCTRL_TAILUPD_DIS;
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if (!HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, MULTI_PKT_EGR))
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if (!HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, MULTI_PKT_EGR))
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