V4L/DVB (11582): stv090x: fix Undocumented Registers
Signed-off-by: Manu Abraham <manu@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
parent
017eb0381f
commit
5657150759
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@ -176,8 +176,10 @@ static const struct stv090x_tab stv090x_rf_tab[] = {
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static struct stv090x_reg stv0900_initval[] = {
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{ STV090x_OUTCFG, 0x00 },
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{ STV090x_MODECFG, 0xff },
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{ STV090x_AGCRF1CFG, 0x11 },
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{ STV090x_AGCRF2CFG, 0x13 },
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{ STV090x_TSGENERAL1X, 0x14 },
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{ STV090x_TSTTNR2, 0x21 },
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{ STV090x_TSTTNR4, 0x21 },
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{ STV090x_P2_DISTXCTL, 0x22 },
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@ -203,8 +205,10 @@ static struct stv090x_reg stv0900_initval[] = {
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{ STV090x_P2_ERRCTRL2, 0xc1 },
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{ STV090x_P2_CFRICFG, 0xf8 },
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{ STV090x_P2_NOSCFG, 0x1c },
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{ STV090x_P2_DMDTOM, 0x20 },
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{ STV090x_P2_CORRELMANT, 0x70 },
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{ STV090x_P2_CORRELABS, 0x88 },
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{ STV090x_P2_AGC2O, 0x5b },
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{ STV090x_P2_AGC2REF, 0x38 },
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{ STV090x_P2_CARCFG, 0xe4 },
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{ STV090x_P2_ACLC, 0x1A },
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@ -246,6 +250,7 @@ static struct stv090x_reg stv0900_initval[] = {
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{ STV090x_P1_DMDCFGMD, 0xf9 },
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{ STV090x_P1_DEMOD, 0x08 },
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{ STV090x_P1_DMDCFG3, 0xc4 },
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{ STV090x_P1_DMDTOM, 0x20 },
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{ STV090x_P1_CARFREQ, 0xed },
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{ STV090x_P1_LDT, 0xd0 },
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{ STV090x_P1_LDT2, 0xb8 },
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@ -265,6 +270,7 @@ static struct stv090x_reg stv0900_initval[] = {
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{ STV090x_P1_NOSCFG, 0x1c },
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{ STV090x_P1_CORRELMANT, 0x70 },
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{ STV090x_P1_CORRELABS, 0x88 },
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{ STV090x_P1_AGC2O, 0x5b },
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{ STV090x_P1_AGC2REF, 0x38 },
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{ STV090x_P1_CARCFG, 0xe4 },
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{ STV090x_P1_ACLC, 0x1A },
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@ -326,6 +332,7 @@ static struct stv090x_reg stv0900_initval[] = {
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{ STV090x_GAINLLR_NF15, 0x1A },
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{ STV090x_GAINLLR_NF16, 0x1F },
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{ STV090x_GAINLLR_NF17, 0x21 },
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{ STV090x_RCCFGH, 0x20 },
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{ STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
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{ STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
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{ STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
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@ -364,12 +371,14 @@ static struct stv090x_reg stv0903_initval[] = {
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{ STV090x_P1_ERRCTRL2, 0xc1 },
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{ STV090x_P1_CFRICFG, 0xf8 },
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{ STV090x_P1_NOSCFG, 0x1c },
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{ STV090x_P1_DMDTOM, 0x20 },
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{ STV090x_P1_CORRELMANT, 0x70 },
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{ STV090x_P1_CORRELABS, 0x88 },
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{ STV090x_P1_AGC2REF, 0x38 } ,
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{ STV090x_P1_AGC2O, 0x5b },
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{ STV090x_P1_AGC2REF, 0x38 },
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{ STV090x_P1_CARCFG, 0xe4 },
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{ STV090x_P1_ACLC, 0x1A },
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{ STV090x_P1_BCLC, 0x09 } ,
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{ STV090x_P1_BCLC, 0x09 },
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{ STV090x_P1_CARHDR, 0x08 },
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{ STV090x_P1_KREFTMG, 0xc1 },
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{ STV090x_P1_SFRSTEP, 0x58 },
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@ -427,6 +436,7 @@ static struct stv090x_reg stv0903_initval[] = {
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{ STV090x_GAINLLR_NF15, 0x1A },
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{ STV090x_GAINLLR_NF16, 0x1F },
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{ STV090x_GAINLLR_NF17, 0x21 },
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{ STV090x_RCCFGH, 0x20 },
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{ STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
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{ STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
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};
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@ -434,6 +444,7 @@ static struct stv090x_reg stv0903_initval[] = {
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static struct stv090x_reg stv0900_cut20_val[] = {
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{ STV090x_P2_DMDCFG3, 0xe8 },
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{ STV090x_P2_DMDCFG4, 0x10 },
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{ STV090x_P2_CARFREQ, 0x38 },
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{ STV090x_P2_CARHDR, 0x20 },
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{ STV090x_P2_KREFTMG, 0x5a },
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@ -442,6 +453,7 @@ static struct stv090x_reg stv0900_cut20_val[] = {
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{ STV090x_P2_SMAPCOEF5, 0x04 },
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{ STV090x_P2_NOSCFG, 0x0c },
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{ STV090x_P1_DMDCFG3, 0xe8 },
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{ STV090x_P1_DMDCFG4, 0x10 },
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{ STV090x_P1_CARFREQ, 0x38 },
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{ STV090x_P1_CARHDR, 0x20 },
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{ STV090x_P1_KREFTMG, 0x5a },
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@ -467,6 +479,7 @@ static struct stv090x_reg stv0900_cut20_val[] = {
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static struct stv090x_reg stv0903_cut20_val[] = {
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{ STV090x_P1_DMDCFG3, 0xe8 },
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{ STV090x_P1_DMDCFG4, 0x10 },
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{ STV090x_P1_CARFREQ, 0x38 },
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{ STV090x_P1_CARHDR, 0x20 },
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{ STV090x_P1_KREFTMG, 0x5a },
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@ -640,11 +653,9 @@ static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 d
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static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
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{
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struct stv090x_state *state = fe->demodulator_priv;
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const struct stv090x_config *config = state->config;
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u32 reg;
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reg = STV090x_READ_DEMOD(state, I2CRPT);
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// STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
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if (enable) {
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dprintk(FE_DEBUG, 1, "Enable Gate");
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STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
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@ -3605,10 +3616,12 @@ static int stv090x_set_tspath(struct stv090x_state *state)
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case STV090x_TSMODE_SERIAL_PUNCTURED:
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case STV090x_TSMODE_SERIAL_CONTINUOUS:
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default:
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stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
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break;
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case STV090x_TSMODE_PARALLEL_PUNCTURED:
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case STV090x_TSMODE_DVBCI:
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stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
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reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
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STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
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if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
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@ -3632,10 +3645,12 @@ static int stv090x_set_tspath(struct stv090x_state *state)
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case STV090x_TSMODE_SERIAL_PUNCTURED:
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case STV090x_TSMODE_SERIAL_CONTINUOUS:
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default:
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stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
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break;
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case STV090x_TSMODE_PARALLEL_PUNCTURED:
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case STV090x_TSMODE_DVBCI:
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stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
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break;
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}
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break;
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@ -3893,6 +3908,7 @@ struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
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state->i2c = i2c;
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state->frontend.ops = stv090x_ops;
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state->frontend.demodulator_priv = state;
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state->demod = demod;
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state->demod_mode = config->demod_mode; /* Single or Dual mode */
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state->device = config->device;
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state->rolloff = 35; /* default */
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@ -48,6 +48,8 @@
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#define STV090x_OFFST_OUTPARRS3_HZ_FIELD 3
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#define STV090x_WIDTH_OUTPARRS3_HZ_FIELD 1
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#define STV090x_MODECFG 0xf11d
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#define STV090x_IRQSTATUS3 0xf120
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#define STV090x_OFFST_SPLL_LOCK_FIELD 5
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#define STV090x_WIDTH_SPLL_LOCK_FIELD 1
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@ -312,9 +314,9 @@
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#define STV090x_OFFST_ERRORx_XOR_FIELD 0
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#define STV090x_WIDTH_ERRORx_XOR_FIELD 1
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#define STV090x_DPNxCFG(__x) (0xf15c + (__x - 1) * 0x5)
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#define STV090x_DPNxCFG(__x) (0xf15c + (__x - 1) * 0x5)
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#define STV090x_DPN1CFG STV090x_DPNxCFG(1)
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#define STV090x_DPN2CFG STV090x_DPNxCFG(2)
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#define STV090x_DPN2CFG STV090x_DPNxCFG(2)
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#define STV090x_DPN3CFG STV090x_DPNxCFG(3)
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#define STV090x_OFFST_DPNx_OPD_FIELD 7
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#define STV090x_WIDTH_DPNx_OPD_FIELD 1
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@ -571,8 +573,8 @@
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#define STV090x_WIDTH_FSKR_CARLOSS_THRESH_FIELD 8
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#define STV090x_Px_DISTXCTL(__x) (0xF1A0 - (__x - 1) * 0x10)
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#define STV090x_P1_DISTXCTL (1)
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#define STV090x_P2_DISTXCTL (2)
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#define STV090x_P1_DISTXCTL STV090x_Px_DISTXCTL(1)
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#define STV090x_P2_DISTXCTL STV090x_Px_DISTXCTL(2)
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#define STV090x_OFFST_Px_TIM_OFF_FIELD 7
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#define STV090x_WIDTH_Px_TIM_OFF_FIELD 1
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#define STV090x_OFFST_Px_DISEQC_RESET_FIELD 6
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@ -585,8 +587,8 @@
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#define STV090x_WIDTH_Px_DISTX_MODE_FIELD 3
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#define STV090x_Px_DISRXCTL(__x) (0xf1a1 - (__x - 1) * 0x10)
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#define STV090x_P1_DISRXCTL (1)
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#define STV090x_P2_DISRXCTL (2)
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#define STV090x_P1_DISRXCTL STV090x_Px_DISRXCTL(1)
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#define STV090x_P2_DISRXCTL STV090x_Px_DISRXCTL(2)
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#define STV090x_OFFST_Px_RECEIVER_ON_FIELD 7
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#define STV090x_WIDTH_Px_RECEIVER_ON_FIELD 1
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#define STV090x_OFFST_Px_IGNO_SHORT22K_FIELD 6
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@ -603,8 +605,8 @@
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#define STV090x_WIDTH_Px_IRQ_4NBYTES_FIELD 1
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#define STV090x_Px_DISRX_ST0(__x) (0xf1a4 - (__x - 1) * 0x10)
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#define STV090x_P1_DISRX_ST0 (1)
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#define STV090x_P2_DISRX_ST0 (2)
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#define STV090x_P1_DISRX_ST0 STV090x_Px_DISRX_ST0(1)
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#define STV090x_P2_DISRX_ST0 STV090x_Px_DISRX_ST0(2)
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#define STV090x_OFFST_Px_RX_END_FIELD 7
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#define STV090x_WIDTH_Px_RX_END_FIELD 1
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#define STV090x_OFFST_Px_RX_ACTIVE_FIELD 6
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@ -621,8 +623,8 @@
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#define STV090x_WIDTH_Px_ABORT_DISRX_FIELD 1
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#define STV090x_Px_DISRX_ST1(__x) (0xf1a5 - (__x - 1) * 0x10)
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#define STV090x_P1_DISRX_ST1 (1)
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#define STV090x_P2_DISRX_ST1 (2)
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#define STV090x_P1_DISRX_ST1 STV090x_Px_DISRX_ST1(1)
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#define STV090x_P2_DISRX_ST1 STV090x_Px_DISRX_ST1(2)
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#define STV090x_OFFST_Px_RX_FAIL_FIELD 7
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#define STV090x_WIDTH_Px_RX_FAIL_FIELD 1
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#define STV090x_OFFST_Px_FIFO_PARITYFAIL_FIELD 6
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@ -635,20 +637,20 @@
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#define STV090x_WIDTH_Px_FIFO_BYTENBR_FIELD 4
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#define STV090x_Px_DISRXDATA(__x) (0xf1a6 - (__x - 1) * 0x10)
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#define STV090x_P1_DISRXDATA (1)
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#define STV090x_P2_DISRXDATA (2)
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#define STV090x_P1_DISRXDATA STV090x_Px_DISRXDATA(1)
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#define STV090x_P2_DISRXDATA STV090x_Px_DISRXDATA(2)
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#define STV090x_OFFST_Px_DISRX_DATA_FIELD 0
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#define STV090x_WIDTH_Px_DISRX_DATA_FIELD 8
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#define STV090x_Px_DISTXDATA(__x) (0xf1a7 - (__x - 1) * 0x10)
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#define STV090x_P1_DISTXDATA (1)
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#define STV090x_P2_DISTXDATA (2)
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#define STV090x_P1_DISTXDATA STV090x_Px_DISTXDATA(1)
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#define STV090x_P2_DISTXDATA STV090x_Px_DISTXDATA(2)
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#define STV090x_OFFST_Px_DISEQC_FIFO_FIELD 0
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#define STV090x_WIDTH_Px_DISEQC_FIFO_FIELD 8
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#define STV090x_Px_DISTXSTATUS(__x) (0xf1a8 - (__x - 1) * 0x10)
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#define STV090x_P1_DISTXSTATUS (1)
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#define STV090x_P2_DISTXSTATUS (2)
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#define STV090x_P1_DISTXSTATUS STV090x_Px_DISTXSTATUS(1)
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#define STV090x_P2_DISTXSTATUS STV090x_Px_DISTXSTATUS(2)
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#define STV090x_OFFST_Px_TX_FAIL_FIELD 7
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#define STV090x_WIDTH_Px_TX_FAIL_FIELD 1
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#define STV090x_OFFST_Px_FIFO_FULL_FIELD 6
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@ -661,26 +663,26 @@
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#define STV090x_WIDTH_Px_TXFIFO_BYTES_FIELD 4
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#define STV090x_Px_F22TX(__x) (0xf1a9 - (__x - 1) * 0x10)
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#define STV090x_P1_F22TX (1)
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#define STV090x_P2_F22TX (2)
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#define STV090x_P1_F22TX STV090x_Px_F22TX(1)
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#define STV090x_P2_F22TX STV090x_Px_F22TX(2)
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#define STV090x_OFFST_Px_F22_REG_FIELD 0
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#define STV090x_WIDTH_Px_F22_REG_FIELD 8
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#define STV090x_Px_F22RX(__x) (0xf1aa - (__x - 1) * 0x10)
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#define STV090x_P1_F22RX (1)
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#define STV090x_P2_F22RX (2)
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#define STV090x_P1_F22RX STV090x_Px_F22RX(1)
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#define STV090x_P2_F22RX STV090x_Px_F22RX(2)
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#define STV090x_OFFST_Px_F22RX_REG_FIELD 0
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#define STV090x_WIDTH_Px_F22RX_REG_FIELD 8
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#define STV090x_Px_ACRPRESC(__x) (0xf1ac - (__x - 1) * 0x10)
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#define STV090x_P1_ACRPRESC (1)
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#define STV090x_P2_ACRPRESC (2)
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#define STV090x_P1_ACRPRESC STV090x_Px_ACRPRESC(1)
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#define STV090x_P2_ACRPRESC STV090x_Px_ACRPRESC(2)
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#define STV090x_OFFST_Px_ACR_PRESC_FIELD 0
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#define STV090x_WIDTH_Px_ACR_PRESC_FIELD 3
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#define STV090x_Px_ACRDIV(__x) (0xf1ad - (__x - 1) * 0x10)
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#define STV090x_P1_ACRDIV (1)
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#define STV090x_P2_ACRDIV (2)
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#define STV090x_P1_ACRDIV STV090x_Px_ACRDIV(1)
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#define STV090x_P2_ACRDIV STV090x_Px_ACRDIV(2)
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#define STV090x_OFFST_Px_ACR_DIV_FIELD 0
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#define STV090x_WIDTH_Px_ACR_DIV_FIELD 8
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#define STV090x_OFFST_Px_NOSTOP_FIFOFULL_FIELD 3
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#define STV090x_WIDTH_Px_NOSTOP_FIFOFULL_FIELD 1
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#define STV090x_Px_DMDCFG4(__x) (0xf41f - (__x - 1) * 0x200)
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#define STV090x_P1_DMDCFG4 STV090x_Px_DMDCFG4(1)
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#define STV090x_P2_DMDCFG4 STV090x_Px_DMDCFG4(2)
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#define STV090x_Px_CORRELMANT(__x) (0xF420 - (__x - 1) * 0x200)
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#define STV090x_P1_CORRELMANT STV090x_Px_CORRELMANT(1)
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#define STV090x_P2_CORRELMANT STV090x_Px_CORRELMANT(2)
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#define STV090x_OFFST_Px_PLH_TYPE_FIELD 0
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#define STV090x_WIDTH_Px_PLH_TYPE_FIELD 2
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#define STV090x_Px_AGCK32(__x) (0xf42b - (__x - 1) * 0x200)
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#define STV090x_P1_AGCK32 STV090x_Px_AGCK32(1)
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#define STV090x_P2_AGCK32 STV090x_Px_AGCK32(2)
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#define STV090x_Px_AGC2O(__x) (0xF42C - (__x - 1) * 0x200)
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#define STV090x_P1_AGC2O STV090x_Px_AGC2O(1)
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#define STV090x_P2_AGC2O STV090x_Px_AGC2O(2)
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#define STV090x_Px_AGC2REF(__x) (0xF42D - (__x - 1) * 0x200)
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#define STV090x_P1_AGC2REF STV090x_Px_AGC2REF(1)
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#define STV090x_P2_AGC2REF STV090x_Px_AGC2REF(2)
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@ -1640,7 +1654,7 @@
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#define STV090x_OFFST_Px_SMAPCOEF_8P_LLR23_FIELD 0
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#define STV090x_WIDTH_Px_SMAPCOEF_8P_LLR23_FIELD 7
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#define STV090x_Px_DMDPLHSTAT(__x) (0xF520 - (__x - 1) * 0x200)
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#define STV090x_Px_DMDPLHSTAT(__x) (0xF520 - (__x - 1) * 0x200)
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#define STV090x_P1_DMDPLHSTAT STV090x_Px_DMDPLHSTAT(1)
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#define STV090x_P2_DMDPLHSTAT STV090x_Px_DMDPLHSTAT(2)
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#define STV090x_OFFST_Px_PLH_STATISTIC_FIELD 0
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@ -2281,12 +2295,17 @@
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#define STV090x_OFFST_Px_FSPYBER_CTIME_FIELD 0
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#define STV090x_WIDTH_Px_FSPYBER_CTIME_FIELD 3
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#define STV090x_RCCFGH 0xf600
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#define STV090x_TSGENERAL 0xF630
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#define STV090x_OFFST_Px_MUXSTREAM_OUT_FIELD 3
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#define STV090x_WIDTH_Px_MUXSTREAM_OUT_FIELD 1
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#define STV090x_OFFST_Px_TSFIFO_PERMPARAL_FIELD 1
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#define STV090x_WIDTH_Px_TSFIFO_PERMPARAL_FIELD 2
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#define STV090x_TSGENERAL1X 0xf670
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#define STV090x_CFGEXT 0xfa80
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#define STV090x_TSTRES0 0xFF11
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#define STV090x_OFFST_FRESFEC_FIELD 7
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||||
#define STV090x_WIDTH_FRESFEC_FIELD 1
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||||
|
|
Loading…
Reference in New Issue