Add support for Kaveri CPUs to k10temp driver. Add support for S12x0 to
coretemp driver. Cleanup and minor fixes in several drivers. Notable are 'Do not return -EAGAIN for low temperatures' to coretemp and 'Re-enable logical device mapping for NCT6791 during resume' to nct6775. Both will be sent to -stable, but only after some time in mainline. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJS3U/4AAoJEMsfJm/On5mB3JkP+wUC+MW2qRRS2KwUQsZfCoDp +mKUsa0AEfRQOyYjJZe40vr5md0vsdDnzn/QaxD1FQb9uuqNLVxv9NyR/D5kAm7R bQFrkXx1mNdY5qOThuO0X/bg9QmCiGSn2tPZrUen1iH+QT/9QYc491YvnTb84u6g Fi+BlhI/R8POSt9mZIZ+AXipGakGJsZMyTHlTbZRwiwJR9koiONkwo7HWr4tifWZ TtkX3VmgCxTEqBO44T1atwOCmdd5B1gP+8YnqyTrYQf3y2+Rs6Aqad/iuHomn0/v fMo2zIMH5qXAkWkWd4n/AXiaa1pTgt7Y4tRrP+heE4C8b0fvzXJjCNMtyyp5SdTg OKqTEAXcUK4bxrG7dQ/u7Z65gFSImWftO9H6KquxilRMAP2UQIpi6S7/sWEneq5R +k7KSw8s4wVAo5IRDulYekS67E/Is4FEz9POo/QMGw4rPVmbi+Z3XEMuDyJTjYTO Xl8XlfPiMplkzVNBk/ffC8+xAieZD7Llw7VTOM3Gilv4VzGDZl4xdCEY/oqtJ/z9 AkUZrPWocSMbhesr71yA4Emv+bfcWIUB3/qAugoBXUn0Vlmh+/28LLCCRKIZ1Dqq LmCyKyIT3IxaTPnVSnlqjVLwF8UPslyTMRyXbNkZqkPGyMhdT+hYpieo8C1d98Qy QdU80KIXGSXu7mtnVwYP =kUCC -----END PGP SIGNATURE----- Merge tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging Pull hwmon updates from Guenter Roeck: "Add support for Kaveri CPUs to k10temp driver. Add support for S12x0 to coretemp driver. Cleanup and minor fixes in several drivers. Notable are 'Do not return -EAGAIN for low temperatures' to coretemp and 'Re-enable logical device mapping for NCT6791 during resume' to nct6775. Both will be sent to -stable, but only after some time in mainline" * tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: hwmon: (k10temp) Add support for Kaveri CPUs hwmon: (sht15) add include guard hwmon: (max197) add include guard hwmon: (nct6775) Re-enable logical device mapping for NCT6791 during resume hwmon: (s3c) Trivial cleanup in hwmon-s3c.h hwmon: (coretemp) Do not return -EAGAIN for low temperatures hwmon: (da9052) Fix adc to voltage calculation hwmon: (coretemp) Refine TjMax detection hwmon: (coretemp) Add PCI device ID for CE41x0 CPUs hwmon: (coretemp) Use PCI host bridge ID to identify CPU if necessary hwmon: remove DEFINE_PCI_DEVICE_TABLE macro
This commit is contained in:
commit
561a60f025
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@ -36,6 +36,7 @@
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <asm/msr.h>
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#include <asm/processor.h>
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#include <asm/cpu_device_id.h>
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@ -176,20 +177,33 @@ static ssize_t show_temp(struct device *dev,
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/* Check whether the time interval has elapsed */
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if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
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rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
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tdata->valid = 0;
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/* Check whether the data is valid */
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if (eax & 0x80000000) {
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tdata->temp = tdata->tjmax -
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((eax >> 16) & 0x7f) * 1000;
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tdata->valid = 1;
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}
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/*
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* Ignore the valid bit. In all observed cases the register
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* value is either low or zero if the valid bit is 0.
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* Return it instead of reporting an error which doesn't
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* really help at all.
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*/
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tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
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tdata->valid = 1;
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tdata->last_updated = jiffies;
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}
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mutex_unlock(&tdata->update_lock);
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return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
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return sprintf(buf, "%d\n", tdata->temp);
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}
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struct tjmax_pci {
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unsigned int device;
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int tjmax;
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};
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static const struct tjmax_pci tjmax_pci_table[] = {
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{ 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
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{ 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
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{ 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
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{ 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
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};
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struct tjmax {
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char const *id;
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int tjmax;
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@ -198,9 +212,6 @@ struct tjmax {
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static const struct tjmax tjmax_table[] = {
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{ "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
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{ "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
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{ "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */
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{ "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
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{ "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
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};
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struct tjmax_model {
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@ -222,8 +233,11 @@ static const struct tjmax_model tjmax_model_table[] = {
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* is undetectable by software
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*/
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{ 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
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{ 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z2760) */
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{ 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
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{ 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
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{ 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
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* Also matches S12x0 (stepping 9), covered by
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* PCI table
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*/
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};
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static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
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@ -236,8 +250,20 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
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int err;
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u32 eax, edx;
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int i;
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struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
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/*
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* Explicit tjmax table entries override heuristics.
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* First try PCI host bridge IDs, followed by model ID strings
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* and model/stepping information.
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*/
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if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
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for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
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if (host_bridge->device == tjmax_pci_table[i].device)
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return tjmax_pci_table[i].tjmax;
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}
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}
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/* explicit tjmax table entries override heuristics */
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for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
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if (strstr(c->x86_model_id, tjmax_table[i].id))
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return tjmax_table[i].tjmax;
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if (cpu_has_tjmax(c))
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dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
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} else {
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val = (eax >> 16) & 0xff;
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val = (eax >> 16) & 0x7f;
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/*
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* If the TjMax is not plausible, an assumption
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* will be used
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*/
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if (val) {
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if (val >= 85) {
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dev_dbg(dev, "TjMax is %d degrees C\n", val);
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return val * 1000;
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}
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@ -45,7 +45,7 @@ static const char * const input_names[] = {
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/* Conversion function for VDDOUT and VBAT */
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static inline int volt_reg_to_mv(int value)
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{
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return DIV_ROUND_CLOSEST(value * 1000, 512) + 2500;
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return DIV_ROUND_CLOSEST(value * 2000, 1023) + 2500;
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}
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/* Conversion function for ADC channels 4, 5 and 6 */
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/* Conversion function for VBBAT */
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static inline int vbbat_reg_to_mv(int value)
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{
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return DIV_ROUND_CLOSEST(value * 2500, 512);
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return DIV_ROUND_CLOSEST(value * 5000, 1023);
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}
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static inline int da9052_enable_vddout_channel(struct da9052 *da9052)
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@ -249,7 +249,7 @@ static void fam15h_power_remove(struct pci_dev *pdev)
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sysfs_remove_group(&dev->kobj, &fam15h_power_attr_group);
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}
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static DEFINE_PCI_DEVICE_TABLE(fam15h_power_id_table) = {
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static const struct pci_device_id fam15h_power_id_table[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
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{}
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@ -204,12 +204,13 @@ static void k10temp_remove(struct pci_dev *pdev)
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&sensor_dev_attr_temp1_crit_hyst.dev_attr);
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}
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static DEFINE_PCI_DEVICE_TABLE(k10temp_id_table) = {
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static const struct pci_device_id k10temp_id_table[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
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{}
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};
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static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 1, 1);
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static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
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static DEFINE_PCI_DEVICE_TABLE(k8temp_ids) = {
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static const struct pci_device_id k8temp_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
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{ 0 },
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};
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@ -3936,6 +3936,18 @@ static int nct6775_probe(struct platform_device *pdev)
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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static void nct6791_enable_io_mapping(int sioaddr)
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{
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int val;
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val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
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if (val & 0x10) {
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pr_info("Enabling hardware monitor logical device mappings.\n");
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superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
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val & ~0x10);
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}
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}
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#ifdef CONFIG_PM
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static int nct6775_suspend(struct device *dev)
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{
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static int nct6775_resume(struct device *dev)
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{
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struct nct6775_data *data = dev_get_drvdata(dev);
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int i, j;
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int i, j, err = 0;
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mutex_lock(&data->update_lock);
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data->bank = 0xff; /* Force initial bank selection */
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if (data->kind == nct6791) {
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err = superio_enter(data->sioreg);
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if (err)
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goto abort;
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nct6791_enable_io_mapping(data->sioreg);
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superio_exit(data->sioreg);
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}
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/* Restore limits */
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for (i = 0; i < data->in_num; i++) {
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if (!(data->have_in & (1 << i)))
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nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
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}
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abort:
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/* Force re-reading all values */
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data->valid = false;
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mutex_unlock(&data->update_lock);
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return 0;
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return err;
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}
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static const struct dev_pm_ops nct6775_dev_pm_ops = {
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pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
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superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
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}
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if (sio_data->kind == nct6791) {
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val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
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if (val & 0x10) {
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pr_info("Enabling hardware monitor logical device mappings.\n");
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superio_outb(sioaddr,
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NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
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val & ~0x10);
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}
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}
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if (sio_data->kind == nct6791)
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nct6791_enable_io_mapping(sioaddr);
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superio_exit(sioaddr);
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pr_info("Found %s or compatible chip at %#x:%#x\n",
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@ -754,7 +754,7 @@ static struct sis5595_data *sis5595_update_device(struct device *dev)
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return data;
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}
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static DEFINE_PCI_DEVICE_TABLE(sis5595_pci_ids) = {
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static const struct pci_device_id sis5595_pci_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
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{ 0, }
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};
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@ -824,7 +824,7 @@ static struct via686a_data *via686a_update_device(struct device *dev)
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return data;
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}
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static DEFINE_PCI_DEVICE_TABLE(via686a_pci_ids) = {
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static const struct pci_device_id via686a_pci_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) },
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{ }
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};
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@ -766,7 +766,7 @@ static struct platform_driver vt8231_driver = {
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.remove = vt8231_remove,
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};
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static DEFINE_PCI_DEVICE_TABLE(vt8231_pci_ids) = {
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static const struct pci_device_id vt8231_pci_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4) },
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{ 0, }
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};
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@ -1,5 +1,4 @@
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/* linux/arch/arm/plat-s3c/include/plat/hwmon.h
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*
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/*
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* Copyright 2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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@ -11,8 +10,8 @@
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_ADC_HWMON_H
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#define __ASM_ARCH_ADC_HWMON_H __FILE__
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#ifndef __HWMON_S3C_H__
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#define __HWMON_S3C_H__
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/**
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* s3c_hwmon_chcfg - channel configuration
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@ -47,5 +46,4 @@ struct s3c_hwmon_pdata {
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*/
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extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
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#endif /* __ASM_ARCH_ADC_HWMON_H */
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#endif /* __HWMON_S3C_H__ */
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@ -11,6 +11,9 @@
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* For further information, see the Documentation/hwmon/max197 file.
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*/
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#ifndef _PDATA_MAX197_H
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#define _PDATA_MAX197_H
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/**
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* struct max197_platform_data - MAX197 connectivity info
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* @convert: Function used to start a conversion with control byte ctrl.
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@ -19,3 +22,5 @@
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struct max197_platform_data {
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int (*convert)(u8 ctrl);
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};
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#endif /* _PDATA_MAX197_H */
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@ -12,6 +12,9 @@
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* For further information, see the Documentation/hwmon/sht15 file.
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*/
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#ifndef _PDATA_SHT15_H
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#define _PDATA_SHT15_H
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/**
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* struct sht15_platform_data - sht15 connectivity info
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* @gpio_data: no. of gpio to which bidirectional data line is
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|
@ -31,3 +34,5 @@ struct sht15_platform_data {
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bool no_otp_reload;
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bool low_resolution;
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||||
};
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||||
#endif /* _PDATA_SHT15_H */
|
||||
|
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Loading…
Reference in New Issue