Add support for Kaveri CPUs to k10temp driver. Add support for S12x0 to

coretemp driver.
 Cleanup and minor fixes in several drivers. Notable are 'Do not return -EAGAIN
 for low temperatures' to coretemp and 'Re-enable logical device mapping for
 NCT6791 during resume' to nct6775. Both will be sent to -stable, but only
 after some time in mainline.
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Merge tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging

Pull hwmon updates from Guenter Roeck:
 "Add support for Kaveri CPUs to k10temp driver.  Add support for S12x0
  to coretemp driver.

  Cleanup and minor fixes in several drivers.  Notable are 'Do not
  return -EAGAIN for low temperatures' to coretemp and 'Re-enable
  logical device mapping for NCT6791 during resume' to nct6775.  Both
  will be sent to -stable, but only after some time in mainline"

* tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging:
  hwmon: (k10temp) Add support for Kaveri CPUs
  hwmon: (sht15) add include guard
  hwmon: (max197) add include guard
  hwmon: (nct6775) Re-enable logical device mapping for NCT6791 during resume
  hwmon: (s3c) Trivial cleanup in hwmon-s3c.h
  hwmon: (coretemp) Do not return -EAGAIN for low temperatures
  hwmon: (da9052) Fix adc to voltage calculation
  hwmon: (coretemp) Refine TjMax detection
  hwmon: (coretemp) Add PCI device ID for CE41x0 CPUs
  hwmon: (coretemp) Use PCI host bridge ID to identify CPU if necessary
  hwmon: remove DEFINE_PCI_DEVICE_TABLE macro
This commit is contained in:
Linus Torvalds 2014-01-20 09:34:20 -08:00
commit 561a60f025
12 changed files with 92 additions and 41 deletions

View File

@ -36,6 +36,7 @@
#include <linux/cpu.h>
#include <linux/smp.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <asm/msr.h>
#include <asm/processor.h>
#include <asm/cpu_device_id.h>
@ -176,20 +177,33 @@ static ssize_t show_temp(struct device *dev,
/* Check whether the time interval has elapsed */
if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
tdata->valid = 0;
/* Check whether the data is valid */
if (eax & 0x80000000) {
tdata->temp = tdata->tjmax -
((eax >> 16) & 0x7f) * 1000;
tdata->valid = 1;
}
/*
* Ignore the valid bit. In all observed cases the register
* value is either low or zero if the valid bit is 0.
* Return it instead of reporting an error which doesn't
* really help at all.
*/
tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
tdata->valid = 1;
tdata->last_updated = jiffies;
}
mutex_unlock(&tdata->update_lock);
return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
return sprintf(buf, "%d\n", tdata->temp);
}
struct tjmax_pci {
unsigned int device;
int tjmax;
};
static const struct tjmax_pci tjmax_pci_table[] = {
{ 0x0708, 110000 }, /* CE41x0 (Sodaville ) */
{ 0x0c72, 102000 }, /* Atom S1240 (Centerton) */
{ 0x0c73, 95000 }, /* Atom S1220 (Centerton) */
{ 0x0c75, 95000 }, /* Atom S1260 (Centerton) */
};
struct tjmax {
char const *id;
int tjmax;
@ -198,9 +212,6 @@ struct tjmax {
static const struct tjmax tjmax_table[] = {
{ "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
{ "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
{ "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */
{ "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
{ "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
};
struct tjmax_model {
@ -222,8 +233,11 @@ static const struct tjmax_model tjmax_model_table[] = {
* is undetectable by software
*/
{ 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
{ 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z2760) */
{ 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
{ 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */
{ 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
* Also matches S12x0 (stepping 9), covered by
* PCI table
*/
};
static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
@ -236,8 +250,20 @@ static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
int err;
u32 eax, edx;
int i;
struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
/*
* Explicit tjmax table entries override heuristics.
* First try PCI host bridge IDs, followed by model ID strings
* and model/stepping information.
*/
if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
if (host_bridge->device == tjmax_pci_table[i].device)
return tjmax_pci_table[i].tjmax;
}
}
/* explicit tjmax table entries override heuristics */
for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
if (strstr(c->x86_model_id, tjmax_table[i].id))
return tjmax_table[i].tjmax;
@ -343,12 +369,12 @@ static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
if (cpu_has_tjmax(c))
dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
} else {
val = (eax >> 16) & 0xff;
val = (eax >> 16) & 0x7f;
/*
* If the TjMax is not plausible, an assumption
* will be used
*/
if (val) {
if (val >= 85) {
dev_dbg(dev, "TjMax is %d degrees C\n", val);
return val * 1000;
}

View File

@ -45,7 +45,7 @@ static const char * const input_names[] = {
/* Conversion function for VDDOUT and VBAT */
static inline int volt_reg_to_mv(int value)
{
return DIV_ROUND_CLOSEST(value * 1000, 512) + 2500;
return DIV_ROUND_CLOSEST(value * 2000, 1023) + 2500;
}
/* Conversion function for ADC channels 4, 5 and 6 */
@ -57,7 +57,7 @@ static inline int input_reg_to_mv(int value)
/* Conversion function for VBBAT */
static inline int vbbat_reg_to_mv(int value)
{
return DIV_ROUND_CLOSEST(value * 2500, 512);
return DIV_ROUND_CLOSEST(value * 5000, 1023);
}
static inline int da9052_enable_vddout_channel(struct da9052 *da9052)

View File

@ -249,7 +249,7 @@ static void fam15h_power_remove(struct pci_dev *pdev)
sysfs_remove_group(&dev->kobj, &fam15h_power_attr_group);
}
static DEFINE_PCI_DEVICE_TABLE(fam15h_power_id_table) = {
static const struct pci_device_id fam15h_power_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
{}

View File

@ -204,12 +204,13 @@ static void k10temp_remove(struct pci_dev *pdev)
&sensor_dev_attr_temp1_crit_hyst.dev_attr);
}
static DEFINE_PCI_DEVICE_TABLE(k10temp_id_table) = {
static const struct pci_device_id k10temp_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
{}
};

View File

@ -135,7 +135,7 @@ static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 1, 0);
static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 1, 1);
static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
static DEFINE_PCI_DEVICE_TABLE(k8temp_ids) = {
static const struct pci_device_id k8temp_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
{ 0 },
};

View File

@ -3936,6 +3936,18 @@ static int nct6775_probe(struct platform_device *pdev)
return PTR_ERR_OR_ZERO(hwmon_dev);
}
static void nct6791_enable_io_mapping(int sioaddr)
{
int val;
val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
if (val & 0x10) {
pr_info("Enabling hardware monitor logical device mappings.\n");
superio_outb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
val & ~0x10);
}
}
#ifdef CONFIG_PM
static int nct6775_suspend(struct device *dev)
{
@ -3955,11 +3967,20 @@ static int nct6775_suspend(struct device *dev)
static int nct6775_resume(struct device *dev)
{
struct nct6775_data *data = dev_get_drvdata(dev);
int i, j;
int i, j, err = 0;
mutex_lock(&data->update_lock);
data->bank = 0xff; /* Force initial bank selection */
if (data->kind == nct6791) {
err = superio_enter(data->sioreg);
if (err)
goto abort;
nct6791_enable_io_mapping(data->sioreg);
superio_exit(data->sioreg);
}
/* Restore limits */
for (i = 0; i < data->in_num; i++) {
if (!(data->have_in & (1 << i)))
@ -3996,11 +4017,12 @@ static int nct6775_resume(struct device *dev)
nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
}
abort:
/* Force re-reading all values */
data->valid = false;
mutex_unlock(&data->update_lock);
return 0;
return err;
}
static const struct dev_pm_ops nct6775_dev_pm_ops = {
@ -4088,15 +4110,9 @@ static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
}
if (sio_data->kind == nct6791) {
val = superio_inb(sioaddr, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
if (val & 0x10) {
pr_info("Enabling hardware monitor logical device mappings.\n");
superio_outb(sioaddr,
NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
val & ~0x10);
}
}
if (sio_data->kind == nct6791)
nct6791_enable_io_mapping(sioaddr);
superio_exit(sioaddr);
pr_info("Found %s or compatible chip at %#x:%#x\n",

View File

@ -754,7 +754,7 @@ static struct sis5595_data *sis5595_update_device(struct device *dev)
return data;
}
static DEFINE_PCI_DEVICE_TABLE(sis5595_pci_ids) = {
static const struct pci_device_id sis5595_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
{ 0, }
};

View File

@ -824,7 +824,7 @@ static struct via686a_data *via686a_update_device(struct device *dev)
return data;
}
static DEFINE_PCI_DEVICE_TABLE(via686a_pci_ids) = {
static const struct pci_device_id via686a_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) },
{ }
};

View File

@ -766,7 +766,7 @@ static struct platform_driver vt8231_driver = {
.remove = vt8231_remove,
};
static DEFINE_PCI_DEVICE_TABLE(vt8231_pci_ids) = {
static const struct pci_device_id vt8231_pci_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4) },
{ 0, }
};

View File

@ -1,5 +1,4 @@
/* linux/arch/arm/plat-s3c/include/plat/hwmon.h
*
/*
* Copyright 2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
@ -11,8 +10,8 @@
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_ADC_HWMON_H
#define __ASM_ARCH_ADC_HWMON_H __FILE__
#ifndef __HWMON_S3C_H__
#define __HWMON_S3C_H__
/**
* s3c_hwmon_chcfg - channel configuration
@ -47,5 +46,4 @@ struct s3c_hwmon_pdata {
*/
extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd);
#endif /* __ASM_ARCH_ADC_HWMON_H */
#endif /* __HWMON_S3C_H__ */

View File

@ -11,6 +11,9 @@
* For further information, see the Documentation/hwmon/max197 file.
*/
#ifndef _PDATA_MAX197_H
#define _PDATA_MAX197_H
/**
* struct max197_platform_data - MAX197 connectivity info
* @convert: Function used to start a conversion with control byte ctrl.
@ -19,3 +22,5 @@
struct max197_platform_data {
int (*convert)(u8 ctrl);
};
#endif /* _PDATA_MAX197_H */

View File

@ -12,6 +12,9 @@
* For further information, see the Documentation/hwmon/sht15 file.
*/
#ifndef _PDATA_SHT15_H
#define _PDATA_SHT15_H
/**
* struct sht15_platform_data - sht15 connectivity info
* @gpio_data: no. of gpio to which bidirectional data line is
@ -31,3 +34,5 @@ struct sht15_platform_data {
bool no_otp_reload;
bool low_resolution;
};
#endif /* _PDATA_SHT15_H */