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staging: rtl8188eu: remove rtl8188eu driver from staging dir 

This driver was deprecated with the introduction of the r8188eu driver,
based upon Realtek sources that were modified for CFG80211 support and
other fixes on GitHub by Larry Finger. As that driver is now progressing
at pace, we should remove this one.

Signed-off-by: Phillip Potter <phil@philpotter.co.uk>
Link: https://lore.kernel.org/r/20210731133809.196681-1-phil@philpotter.co.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Phillip Potter 2021-07-31 14:38:09 +01:00 committed by Greg Kroah-Hartman
parent 06889446a7
commit 55dfa29b43
111 changed files with 0 additions and 44646 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/staging/Kconfig
View File

@ -36,8 +36,6 @@ source "drivers/staging/rtl8723bs/Kconfig"
source "drivers/staging/rtl8712/Kconfig"
source "drivers/staging/rtl8188eu/Kconfig"
source "drivers/staging/r8188eu/Kconfig"
source "drivers/staging/rts5208/Kconfig"

1
drivers/staging/Makefile
View File

@ -8,7 +8,6 @@ obj-$(CONFIG_RTL8192U) += rtl8192u/
obj-$(CONFIG_RTL8192E) += rtl8192e/
obj-$(CONFIG_RTL8723BS) += rtl8723bs/
obj-$(CONFIG_R8712U) += rtl8712/
obj-$(CONFIG_R8188EU_OLD) += rtl8188eu/
obj-$(CONFIG_R8188EU) += r8188eu/
obj-$(CONFIG_RTS5208) += rts5208/
obj-$(CONFIG_NETLOGIC_XLR_NET) += netlogic/

26
drivers/staging/rtl8188eu/Kconfig
View File

@ -1,26 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config R8188EU_OLD
tristate "Realtek RTL8188EU Wireless LAN NIC driver (DEPRECATED)"
depends on WLAN && USB && CFG80211
depends on m
select WIRELESS_EXT
select WEXT_PRIV
select LIB80211
select LIB80211_CRYPT_WEP
select LIB80211_CRYPT_CCMP
help
This option adds the Realtek RTL8188EU USB device such as TP-Link TL-WN725N.
If built as a module, it will be called rtl8188eu. This driver is now due to
be dropped due to the import of a newer version.
if R8188EU_OLD
config 88EU_AP_MODE
bool "Realtek RTL8188EU AP mode"
default y
help
This option enables Access Point mode. Unless you know that your system
will never be used as an AP, or the target system has limited memory,
"Y" should be selected.
endif

56
drivers/staging/rtl8188eu/Makefile
View File

@ -1,56 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
rtl8188eu-y := \
core/mac_cfg.o \
core/rtw_ap.o \
core/rtw_cmd.o \
core/rtw_efuse.o \
core/rtw_ieee80211.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_pwrctrl.o \
core/rtw_recv.o \
core/rtw_rf.o \
core/rtw_security.o \
core/rtw_sreset.o \
core/rtw_sta_mgt.o \
core/rtw_wlan_util.o \
core/rtw_xmit.o \
hal/fw.o \
hal/bb_cfg.o \
hal/rf_cfg.o \
hal/pwrseqcmd.o \
hal/pwrseq.o \
hal/hal8188e_rate_adaptive.o \
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_hwconfig.o \
hal/odm_rtl8188e.o \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/phy.o \
hal/rf.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
hal/rtl8188eu_recv.o \
hal/rtl8188eu_xmit.o \
hal/usb_halinit.o \
os_dep/ioctl_linux.o \
os_dep/mlme_linux.o \
os_dep/mon.o \
os_dep/os_intfs.o \
os_dep/osdep_service.o \
os_dep/recv_linux.o \
os_dep/rtw_android.o \
os_dep/usb_intf.o \
os_dep/usb_ops_linux.o \
os_dep/xmit_linux.o
obj-$(CONFIG_R8188EU_OLD) := rtl8188eu.o
ccflags-y += -I$(srctree)/$(src)/include

14
drivers/staging/rtl8188eu/TODO
View File

@ -1,14 +0,0 @@
TODO:
- find and remove remaining code valid only for 5 GHz. Most of the obvious
ones have been removed, but things like channel > 14 still exist.
- find and remove any code for other chips that is left over
- convert any remaining unusual variable types
- find codes that can use %pM and %Nph formatting
- checkpatch.pl fixes - most of the remaining ones are lines too long. Many
of them will require refactoring
- merge Realtek's bugfixes and new features into the driver
- switch to use LIB80211
- switch to use MAC80211
Please send any patches to Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
and Larry Finger <Larry.Finger@lwfinger.net>.

120
drivers/staging/rtl8188eu/core/mac_cfg.c
View File

@ -1,120 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include "odm_precomp.h"
#include "phy.h"
/* MAC_REG.TXT */
static u32 array_MAC_REG[] = {
0x026, 0x00000041,
0x027, 0x00000035,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x431, 0x00000001,
0x432, 0x00000002,
0x433, 0x00000004,
0x434, 0x00000005,
0x435, 0x00000006,
0x436, 0x00000007,
0x437, 0x00000008,
0x438, 0x00000000,
0x439, 0x00000000,
0x43A, 0x00000001,
0x43B, 0x00000002,
0x43C, 0x00000004,
0x43D, 0x00000005,
0x43E, 0x00000006,
0x43F, 0x00000007,
0x440, 0x0000005D,
0x441, 0x00000001,
0x442, 0x00000000,
0x444, 0x00000015,
0x445, 0x000000F0,
0x446, 0x0000000F,
0x447, 0x00000000,
0x458, 0x00000041,
0x459, 0x000000A8,
0x45A, 0x00000072,
0x45B, 0x000000B9,
0x460, 0x00000066,
0x461, 0x00000066,
0x480, 0x00000008,
0x4C8, 0x000000FF,
0x4C9, 0x00000008,
0x4CC, 0x000000FF,
0x4CD, 0x000000FF,
0x4CE, 0x00000001,
0x4D3, 0x00000001,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
0x503, 0x00000000,
0x504, 0x00000028,
0x505, 0x000000A3,
0x506, 0x0000005E,
0x507, 0x00000000,
0x508, 0x0000002B,
0x509, 0x000000A4,
0x50A, 0x0000005E,
0x50B, 0x00000000,
0x50C, 0x0000004F,
0x50D, 0x000000A4,
0x50E, 0x00000000,
0x50F, 0x00000000,
0x512, 0x0000001C,
0x514, 0x0000000A,
0x516, 0x0000000A,
0x525, 0x0000004F,
0x550, 0x00000010,
0x551, 0x00000010,
0x559, 0x00000002,
0x55D, 0x000000FF,
0x605, 0x00000030,
0x608, 0x0000000E,
0x609, 0x0000002A,
0x620, 0x000000FF,
0x621, 0x000000FF,
0x622, 0x000000FF,
0x623, 0x000000FF,
0x624, 0x000000FF,
0x625, 0x000000FF,
0x626, 0x000000FF,
0x627, 0x000000FF,
0x652, 0x00000020,
0x63C, 0x0000000A,
0x63D, 0x0000000A,
0x63E, 0x0000000E,
0x63F, 0x0000000E,
0x640, 0x00000040,
0x66E, 0x00000005,
0x700, 0x00000021,
0x701, 0x00000043,
0x702, 0x00000065,
0x703, 0x00000087,
0x708, 0x00000021,
0x709, 0x00000043,
0x70A, 0x00000065,
0x70B, 0x00000087,
};
bool phy_mac_config(struct adapter *adapt)
{
u32 i;
u32 arraylength;
u32 *ptrarray;
arraylength = ARRAY_SIZE(array_MAC_REG);
ptrarray = array_MAC_REG;
for (i = 0; i < arraylength; i += 2)
usb_write8(adapt, ptrarray[i], (u8)ptrarray[i + 1]);
usb_write8(adapt, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
return true;
}

1665
drivers/staging/rtl8188eu/core/rtw_ap.c
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File diff suppressed because it is too large Load Diff

1218
drivers/staging/rtl8188eu/core/rtw_cmd.c
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File diff suppressed because it is too large Load Diff

850
drivers/staging/rtl8188eu/core/rtw_efuse.c
View File

@ -1,850 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTW_EFUSE_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_efuse.h>
#include <usb_ops_linux.h>
#include <rtl8188e_hal.h>
#include <rtw_iol.h>
#define REG_EFUSE_CTRL 0x0030
#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
static void efuse_power_switch(struct adapter *pAdapter, u8 pwrstate)
{
u16 tmpv16;
if (pwrstate) {
usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
/* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), default valid */
tmpv16 = usb_read16(pAdapter, REG_SYS_ISO_CTRL);
if (!(tmpv16 & PWC_EV12V)) {
tmpv16 |= PWC_EV12V;
usb_write16(pAdapter, REG_SYS_ISO_CTRL, tmpv16);
}
/* Reset: 0x0000h[28], default valid */
tmpv16 = usb_read16(pAdapter, REG_SYS_FUNC_EN);
if (!(tmpv16 & FEN_ELDR)) {
tmpv16 |= FEN_ELDR;
usb_write16(pAdapter, REG_SYS_FUNC_EN, tmpv16);
}
/* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */
tmpv16 = usb_read16(pAdapter, REG_SYS_CLKR);
if ((!(tmpv16 & LOADER_CLK_EN)) || (!(tmpv16 & ANA8M))) {
tmpv16 |= (LOADER_CLK_EN | ANA8M);
usb_write16(pAdapter, REG_SYS_CLKR, tmpv16);
}
} else {
usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF);
}
}
static void
efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf)
{
u8 *efuseTbl = NULL;
u8 rtemp8;
u16 eFuse_Addr = 0;
u8 offset, wren;
u16 i, j;
u16 **eFuseWord = NULL;
u16 efuse_utilized = 0;
u8 u1temp = 0;
void **tmp = NULL;
efuseTbl = kzalloc(EFUSE_MAP_LEN_88E, GFP_KERNEL);
if (!efuseTbl)
return;
tmp = kcalloc(EFUSE_MAX_SECTION_88E,
sizeof(void *) + EFUSE_MAX_WORD_UNIT * sizeof(u16),
GFP_KERNEL);
if (!tmp)
goto eFuseWord_failed;
for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
tmp[i] = ((char *)(tmp + EFUSE_MAX_SECTION_88E)) + i * EFUSE_MAX_WORD_UNIT * sizeof(u16);
eFuseWord = (u16 **)tmp;
/* 0. Refresh efuse init map as all oxFF. */
for (i = 0; i < EFUSE_MAX_SECTION_88E; i++)
for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++)
eFuseWord[i][j] = 0xFFFF;
/* */
/* 1. Read the first byte to check if efuse is empty!!! */
/* */
/* */
rtemp8 = *(phymap + eFuse_Addr);
if (rtemp8 != 0xFF) {
efuse_utilized++;
eFuse_Addr++;
} else {
goto exit;
}
/* */
/* 2. Read real efuse content. Filter PG header and every section data. */
/* */
while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
/* Check PG header for section num. */
if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */
u1temp = (rtemp8 & 0xE0) >> 5;
rtemp8 = *(phymap + eFuse_Addr);
if ((rtemp8 & 0x0F) == 0x0F) {
eFuse_Addr++;
rtemp8 = *(phymap + eFuse_Addr);
if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E))
eFuse_Addr++;
continue;
} else {
offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
wren = rtemp8 & 0x0F;
eFuse_Addr++;
}
} else {
offset = (rtemp8 >> 4) & 0x0f;
wren = rtemp8 & 0x0f;
}
if (offset < EFUSE_MAX_SECTION_88E) {
/* Get word enable value from PG header */
for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
/* Check word enable condition in the section */
if (!(wren & 0x01)) {
rtemp8 = *(phymap + eFuse_Addr);
eFuse_Addr++;
efuse_utilized++;
eFuseWord[offset][i] = (rtemp8 & 0xff);
if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
break;
rtemp8 = *(phymap + eFuse_Addr);
eFuse_Addr++;
efuse_utilized++;
eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00);
if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E)
break;
}
wren >>= 1;
}
}
/* Read next PG header */
rtemp8 = *(phymap + eFuse_Addr);
if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
efuse_utilized++;
eFuse_Addr++;
}
}
/* */
/* 3. Collect 16 sections and 4 word unit into Efuse map. */
/* */
for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) {
for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) {
efuseTbl[(i * 8) + (j * 2)] = (eFuseWord[i][j] & 0xff);
efuseTbl[(i * 8) + ((j * 2) + 1)] = ((eFuseWord[i][j] >> 8) & 0xff);
}
}
/* */
/* 4. Copy from Efuse map to output pointer memory!!! */
/* */
for (i = 0; i < _size_byte; i++)
pbuf[i] = efuseTbl[_offset + i];
/* */
/* 5. Calculate Efuse utilization. */
/* */
exit:
kfree(eFuseWord);
eFuseWord_failed:
kfree(efuseTbl);
}
static void efuse_read_phymap_from_txpktbuf(
struct adapter *adapter,
int bcnhead, /* beacon head, where FW store len(2-byte) and efuse physical map. */
u8 *content, /* buffer to store efuse physical map */
u16 *size /* for efuse content: the max byte to read. will update to byte read */
)
{
u16 dbg_addr = 0;
unsigned long start = 0;
u8 reg_0x143 = 0;
u32 lo32 = 0, hi32 = 0;
u16 len = 0, count = 0;
int i = 0;
u16 limit = *size;
u8 *pos = content;
if (bcnhead < 0) /* if not valid */
bcnhead = usb_read8(adapter, REG_TDECTRL + 1);
usb_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
dbg_addr = bcnhead * 128 / 8; /* 8-bytes addressing */
while (1) {
usb_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr + i);
usb_write8(adapter, REG_TXPKTBUF_DBG, 0);
start = jiffies;
while (!(reg_0x143 = usb_read8(adapter, REG_TXPKTBUF_DBG)) &&
jiffies_to_msecs(jiffies - start) < 1000)
usleep_range(1000, 2000);
lo32 = usb_read32(adapter, REG_PKTBUF_DBG_DATA_L);
hi32 = usb_read32(adapter, REG_PKTBUF_DBG_DATA_H);
if (i == 0) {
usb_read8(adapter, REG_PKTBUF_DBG_DATA_L);
usb_read8(adapter, REG_PKTBUF_DBG_DATA_L + 1);
len = le16_to_cpu(*((__le16 *)&lo32));
limit = min_t(u16, len - 2, limit);
memcpy(pos, ((u8 *)&lo32) + 2, (limit >= count + 2) ? 2 : limit - count);
count += (limit >= count + 2) ? 2 : limit - count;
pos = content + count;
} else {
memcpy(pos, ((u8 *)&lo32), (limit >= count + 4) ? 4 : limit - count);
count += (limit >= count + 4) ? 4 : limit - count;
pos = content + count;
}
if (limit > count && len - 2 > count) {
memcpy(pos, (u8 *)&hi32, (limit >= count + 4) ? 4 : limit - count);
count += (limit >= count + 4) ? 4 : limit - count;
pos = content + count;
}
if (limit <= count || len - 2 <= count)
break;
i++;
}
usb_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS);
*size = count;
}
static s32 iol_read_efuse(struct adapter *padapter, u8 txpktbuf_bndy, u16 offset, u16 size_byte, u8 *logical_map)
{
s32 status = _FAIL;
u8 physical_map[512];
u16 size = 512;
usb_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
memset(physical_map, 0xFF, 512);
usb_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
if (status == _SUCCESS)
efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
return status;
}
static void efuse_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf)
{
if (rtw_iol_applied(Adapter)) {
rtw_hal_power_on(Adapter);
iol_mode_enable(Adapter, 1);
iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
iol_mode_enable(Adapter, 0);
}
}
u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data)
{
u16 tmpaddr = 0;
u16 start_addr = efuse_addr;
u8 badworden = 0x0F;
u8 tmpdata[8];
memset(tmpdata, 0xff, PGPKT_DATA_SIZE);
if (!(word_en & BIT(0))) {
tmpaddr = start_addr;
efuse_OneByteWrite(pAdapter, start_addr++, data[0]);
efuse_OneByteWrite(pAdapter, start_addr++, data[1]);
efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0]);
efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[1]);
if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
badworden &= (~BIT(0));
}
if (!(word_en & BIT(1))) {
tmpaddr = start_addr;
efuse_OneByteWrite(pAdapter, start_addr++, data[2]);
efuse_OneByteWrite(pAdapter, start_addr++, data[3]);
efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[2]);
efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[3]);
if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
badworden &= (~BIT(1));
}
if (!(word_en & BIT(2))) {
tmpaddr = start_addr;
efuse_OneByteWrite(pAdapter, start_addr++, data[4]);
efuse_OneByteWrite(pAdapter, start_addr++, data[5]);
efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4]);
efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[5]);
if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
badworden &= (~BIT(2));
}
if (!(word_en & BIT(3))) {
tmpaddr = start_addr;
efuse_OneByteWrite(pAdapter, start_addr++, data[6]);
efuse_OneByteWrite(pAdapter, start_addr++, data[7]);
efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6]);
efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[7]);
if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
badworden &= (~BIT(3));
}
return badworden;
}
static u16 Efuse_GetCurrentSize(struct adapter *pAdapter)
{
u16 efuse_addr = 0;
u8 hoffset = 0, hworden = 0;
u8 efuse_data, word_cnts = 0;
rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
while (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data) &&
AVAILABLE_EFUSE_ADDR(efuse_addr)) {
if (efuse_data == 0xFF)
break;
if ((efuse_data & 0x1F) == 0x0F) { /* extended header */
hoffset = efuse_data;
efuse_addr++;
efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data);
if ((efuse_data & 0x0F) == 0x0F) {
efuse_addr++;
continue;
} else {
hoffset = ((hoffset & 0xE0) >> 5) |
((efuse_data & 0xF0) >> 1);
hworden = efuse_data & 0x0F;
}
} else {
hoffset = (efuse_data >> 4) & 0x0F;
hworden = efuse_data & 0x0F;
}
word_cnts = Efuse_CalculateWordCnts(hworden);
/* read next header */
efuse_addr = efuse_addr + (word_cnts * 2) + 1;
}
rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
return efuse_addr;
}
int Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data)
{
u8 ReadState = PG_STATE_HEADER;
int bDataEmpty = true;
u8 efuse_data, word_cnts = 0;
u16 efuse_addr = 0;
u8 hoffset = 0, hworden = 0;
u8 tmpidx = 0;
u8 tmpdata[8];
u8 tmp_header = 0;
if (!data)
return false;
if (offset > EFUSE_MAX_SECTION_88E)
return false;
memset(data, 0xff, sizeof(u8) * PGPKT_DATA_SIZE);
memset(tmpdata, 0xff, sizeof(u8) * PGPKT_DATA_SIZE);
/* <Roger_TODO> Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */
/* Skip dummy parts to prevent unexpected data read from Efuse. */
/* By pass right now. 2009.02.19. */
while (AVAILABLE_EFUSE_ADDR(efuse_addr)) {
/* Header Read ------------- */
if (ReadState & PG_STATE_HEADER) {
if (efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data) && (efuse_data != 0xFF)) {
if (EXT_HEADER(efuse_data)) {
tmp_header = efuse_data;
efuse_addr++;
efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data);
if (!ALL_WORDS_DISABLED(efuse_data)) {
hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
hworden = efuse_data & 0x0F;
} else {
efuse_addr++;
continue;
}
} else {
hoffset = (efuse_data >> 4) & 0x0F;
hworden = efuse_data & 0x0F;
}
word_cnts = Efuse_CalculateWordCnts(hworden);
bDataEmpty = true;
if (hoffset == offset) {
for (tmpidx = 0; tmpidx < word_cnts * 2; tmpidx++) {
if (efuse_OneByteRead(pAdapter, efuse_addr + 1 + tmpidx, &efuse_data)) {
tmpdata[tmpidx] = efuse_data;
if (efuse_data != 0xff)
bDataEmpty = false;
}
}
if (!bDataEmpty) {
ReadState = PG_STATE_DATA;
} else {/* read next header */
efuse_addr = efuse_addr + (word_cnts * 2) + 1;
ReadState = PG_STATE_HEADER;
}
} else {/* read next header */
efuse_addr = efuse_addr + (word_cnts * 2) + 1;
ReadState = PG_STATE_HEADER;
}
} else {
break;
}
} else if (ReadState & PG_STATE_DATA) {
/* Data section Read ------------- */
efuse_WordEnableDataRead(hworden, tmpdata, data);
efuse_addr = efuse_addr + (word_cnts * 2) + 1;
ReadState = PG_STATE_HEADER;
}
}
if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff) && (data[3] == 0xff) &&
(data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff) && (data[7] == 0xff))
return false;
else
return true;
}
static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, struct pgpkt *pFixPkt, u16 *pAddr)
{
u8 originaldata[8], badworden = 0;
u16 efuse_addr = *pAddr;
u32 PgWriteSuccess = 0;
memset(originaldata, 0xff, 8);
if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata)) {
/* check if data exist */
badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata);
if (badworden != 0xf) { /* write fail */
PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata);
if (!PgWriteSuccess)
return false;
efuse_addr = Efuse_GetCurrentSize(pAdapter);
} else {
efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1;
}
} else {
efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1;
}
*pAddr = efuse_addr;
return true;
}
static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u16 *pAddr, struct pgpkt *pTargetPkt)
{
bool ret = false;
u16 efuse_addr = *pAddr;
u16 efuse_max_available_len =
EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E;
u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0;
u8 repeatcnt = 0;
while (efuse_addr < efuse_max_available_len) {
pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
while (tmp_header == 0xFF) {
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
return false;
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
}
/* to write ext_header */
if (tmp_header == pg_header) {
efuse_addr++;
pg_header_temp = pg_header;
pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
while (tmp_header == 0xFF) {
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
return false;
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
}
if ((tmp_header & 0x0F) == 0x0F) { /* word_en PG fail */
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
return false;
efuse_addr++;
continue;
} else if (pg_header != tmp_header) { /* offset PG fail */
struct pgpkt fixPkt;
fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1);
fixPkt.word_en = tmp_header & 0x0F;
fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
if (!hal_EfuseFixHeaderProcess(pAdapter, &fixPkt, &efuse_addr))
return false;
} else {
ret = true;
break;
}
} else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */
efuse_addr += 2;
continue;
}
}
*pAddr = efuse_addr;
return ret;
}
static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u16 *pAddr, struct pgpkt *pTargetPkt)
{
bool ret = false;
u8 pg_header = 0, tmp_header = 0;
u16 efuse_addr = *pAddr;
u8 repeatcnt = 0;
pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
while (tmp_header == 0xFF) {
if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_)
return false;
efuse_OneByteWrite(pAdapter, efuse_addr, pg_header);
efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header);
}
if (pg_header == tmp_header) {
ret = true;
} else {
struct pgpkt fixPkt;
fixPkt.offset = (tmp_header >> 4) & 0x0F;
fixPkt.word_en = tmp_header & 0x0F;
fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en);
if (!hal_EfuseFixHeaderProcess(pAdapter, &fixPkt, &efuse_addr))
return false;
}
*pAddr = efuse_addr;
return ret;
}
static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u16 *pAddr, struct pgpkt *pTargetPkt)
{
u16 efuse_addr = *pAddr;
u8 badworden;
u32 PgWriteSuccess = 0;
badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data);
if (badworden == 0x0F) {
/* write ok */
return true;
}
/* reorganize other pg packet */
PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data);
if (!PgWriteSuccess)
return false;
else
return true;
}
static bool
hal_EfusePgPacketWriteHeader(
struct adapter *pAdapter,
u16 *pAddr,
struct pgpkt *pTargetPkt)
{
bool ret = false;
if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
ret = hal_EfusePgPacketWrite2ByteHeader(pAdapter, pAddr, pTargetPkt);
else
ret = hal_EfusePgPacketWrite1ByteHeader(pAdapter, pAddr, pTargetPkt);
return ret;
}
static bool wordEnMatched(struct pgpkt *pTargetPkt, struct pgpkt *pCurPkt,
u8 *pWden)
{
u8 match_word_en = 0x0F; /* default all words are disabled */
/* check if the same words are enabled both target and current PG packet */
if (((pTargetPkt->word_en & BIT(0)) == 0) &&
((pCurPkt->word_en & BIT(0)) == 0))
match_word_en &= ~BIT(0); /* enable word 0 */
if (((pTargetPkt->word_en & BIT(1)) == 0) &&
((pCurPkt->word_en & BIT(1)) == 0))
match_word_en &= ~BIT(1); /* enable word 1 */
if (((pTargetPkt->word_en & BIT(2)) == 0) &&
((pCurPkt->word_en & BIT(2)) == 0))
match_word_en &= ~BIT(2); /* enable word 2 */
if (((pTargetPkt->word_en & BIT(3)) == 0) &&
((pCurPkt->word_en & BIT(3)) == 0))
match_word_en &= ~BIT(3); /* enable word 3 */
*pWden = match_word_en;
if (match_word_en != 0xf)
return true;
else
return false;
}
static bool hal_EfuseCheckIfDatafollowed(struct adapter *pAdapter, u8 word_cnts, u16 startAddr)
{
bool ret = false;
u8 i, efuse_data;
for (i = 0; i < (word_cnts * 2); i++) {
if (efuse_OneByteRead(pAdapter, (startAddr + i), &efuse_data) && (efuse_data != 0xFF))
ret = true;
}
return ret;
}
static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u16 *pAddr, struct pgpkt *pTargetPkt)
{
bool ret = false;
u8 i, efuse_data = 0, cur_header = 0;
u8 matched_wden = 0, badworden = 0;
u16 startAddr = 0;
u16 efuse_max_available_len =
EFUSE_REAL_CONTENT_LEN_88E - EFUSE_OOB_PROTECT_BYTES_88E;
struct pgpkt curPkt;
rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
startAddr %= EFUSE_REAL_CONTENT_LEN;
while (1) {
if (startAddr >= efuse_max_available_len) {
ret = false;
break;
}
if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data) && (efuse_data != 0xFF)) {
if (EXT_HEADER(efuse_data)) {
cur_header = efuse_data;
startAddr++;
efuse_OneByteRead(pAdapter, startAddr, &efuse_data);
if (ALL_WORDS_DISABLED(efuse_data)) {
ret = false;
break;
}
curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
curPkt.word_en = efuse_data & 0x0F;
} else {
cur_header = efuse_data;
curPkt.offset = (cur_header >> 4) & 0x0F;
curPkt.word_en = cur_header & 0x0F;
}
curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en);
/* if same header is found but no data followed */
/* write some part of data followed by the header. */
if ((curPkt.offset == pTargetPkt->offset) &&
(!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr + 1)) &&
wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) {
/* Here to write partial data */
badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data);
if (badworden != 0x0F) {
u32 PgWriteSuccess = 0;
/* if write fail on some words, write these bad words again */
PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data);
if (!PgWriteSuccess) {
ret = false; /* write fail, return */
break;
}
}
/* partial write ok, update the target packet for later use */
for (i = 0; i < 4; i++) {
if ((matched_wden & (0x1 << i)) == 0) /* this word has been written */
pTargetPkt->word_en |= (0x1 << i); /* disable the word */
}
pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
}
/* read from next header */
startAddr = startAddr + (curPkt.word_cnts * 2) + 1;
} else {
/* not used header, 0xff */
*pAddr = startAddr;
ret = true;
break;
}
}
return ret;
}
static void hal_EfuseConstructPGPkt(u8 offset, u8 word_en, u8 *pData, struct pgpkt *pTargetPkt)
{
memset((void *)pTargetPkt->data, 0xFF, sizeof(u8) * 8);
pTargetPkt->offset = offset;
pTargetPkt->word_en = word_en;
efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
}
bool Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *pData)
{
struct pgpkt targetPkt;
u16 startAddr = 0;
if (Efuse_GetCurrentSize(pAdapter) >= EFUSE_MAP_LEN_88E)
return false;
hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
if (!hal_EfusePartialWriteCheck(pAdapter, &startAddr, &targetPkt))
return false;
if (!hal_EfusePgPacketWriteHeader(pAdapter, &startAddr, &targetPkt))
return false;
if (!hal_EfusePgPacketWriteData(pAdapter, &startAddr, &targetPkt))
return false;
return true;
}
u8 Efuse_CalculateWordCnts(u8 word_en)
{
u8 word_cnts = 0;
if (!(word_en & BIT(0)))
word_cnts++; /* 0 : write enable */
if (!(word_en & BIT(1)))
word_cnts++;
if (!(word_en & BIT(2)))
word_cnts++;
if (!(word_en & BIT(3)))
word_cnts++;
return word_cnts;
}
u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data)
{
u8 tmpidx = 0;
u8 result;
usb_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff));
usb_write8(pAdapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) |
(usb_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC));
usb_write8(pAdapter, EFUSE_CTRL + 3, 0x72);/* read cmd */
while (!(0x80 & usb_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100))
tmpidx++;
if (tmpidx < 100) {
*data = usb_read8(pAdapter, EFUSE_CTRL);
result = true;
} else {
*data = 0xff;
result = false;
}
return result;
}
u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data)
{
u8 tmpidx = 0;
u8 result;
usb_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff));
usb_write8(pAdapter, EFUSE_CTRL + 2,
(usb_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC) |
(u8)((addr >> 8) & 0x03));
usb_write8(pAdapter, EFUSE_CTRL, data);/* data */
usb_write8(pAdapter, EFUSE_CTRL + 3, 0xF2);/* write cmd */
while ((0x80 & usb_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100))
tmpidx++;
if (tmpidx < 100)
result = true;
else
result = false;
return result;
}
/* Read allowed word in current efuse section data. */
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata)
{
if (!(word_en & BIT(0))) {
targetdata[0] = sourdata[0];
targetdata[1] = sourdata[1];
}
if (!(word_en & BIT(1))) {
targetdata[2] = sourdata[2];
targetdata[3] = sourdata[3];
}
if (!(word_en & BIT(2))) {
targetdata[4] = sourdata[4];
targetdata[5] = sourdata[5];
}
if (!(word_en & BIT(3))) {
targetdata[6] = sourdata[6];
targetdata[7] = sourdata[7];
}
}
/* Read All Efuse content */
static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 *Efuse)
{
efuse_power_switch(pAdapter, true);
efuse_ReadEFuse(pAdapter, 0, EFUSE_MAP_LEN_88E, Efuse);
efuse_power_switch(pAdapter, false);
}
/* Transfer current EFUSE content to shadow init and modify map. */
void EFUSE_ShadowMapUpdate(struct adapter *pAdapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
if (pEEPROM->bautoload_fail_flag)
memset(pEEPROM->efuse_eeprom_data, 0xFF, EFUSE_MAP_LEN_88E);
else
Efuse_ReadAllMap(pAdapter, pEEPROM->efuse_eeprom_data);
}

990
drivers/staging/rtl8188eu/core/rtw_ieee80211.c
View File

@ -1,990 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _IEEE80211_C
#include <linux/ieee80211.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <ieee80211.h>
#include <wifi.h>
#include <osdep_service.h>
#include <wlan_bssdef.h>
u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 };
u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 };
u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 };
u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 };
u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 };
u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 };
u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 };
u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 };
u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 };
u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 };
u16 RSN_VERSION_BSD = 1;
u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 };
u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 };
u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 };
u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 };
u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 };
u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 };
u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 };
u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 };
/* */
/* for adhoc-master to generate ie and provide supported-rate to fw */
/* */
static u8 WIFI_CCKRATES[] = {
IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK,
IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK,
IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK,
IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK
};
static u8 WIFI_OFDMRATES[] = {
IEEE80211_OFDM_RATE_6MB,
IEEE80211_OFDM_RATE_9MB,
IEEE80211_OFDM_RATE_12MB,
IEEE80211_OFDM_RATE_18MB,
IEEE80211_OFDM_RATE_24MB,
IEEE80211_OFDM_RATE_36MB,
IEEE80211_OFDM_RATE_48MB,
IEEE80211_OFDM_RATE_54MB
};
int rtw_get_bit_value_from_ieee_value(u8 val)
{
static const unsigned char dot11_rate_table[] = {
2, 4, 11, 22, 12, 18, 24, 36, 48,
72, 96, 108, 0}; /* last element must be zero!! */
int i = 0;
while (dot11_rate_table[i] != 0) {
if (dot11_rate_table[i] == val)
return BIT(i);
i++;
}
return 0;
}
bool rtw_is_cckrates_included(u8 *rate)
{
while (*rate) {
u8 r = *rate & 0x7f;
if (r == 2 || r == 4 || r == 11 || r == 22)
return true;
rate++;
}
return false;
}
bool rtw_is_cckratesonly_included(u8 *rate)
{
while (*rate) {
u8 r = *rate & 0x7f;
if (r != 2 && r != 4 && r != 11 && r != 22)
return false;
rate++;
}
return true;
}
int rtw_check_network_type(unsigned char *rate)
{
/* could be pure B, pure G, or B/G */
if (rtw_is_cckratesonly_included(rate))
return WIRELESS_11B;
else if (rtw_is_cckrates_included(rate))
return WIRELESS_11BG;
else
return WIRELESS_11G;
}
u8 *rtw_set_fixed_ie(void *pbuf, unsigned int len, void *source,
unsigned int *frlen)
{
memcpy(pbuf, source, len);
*frlen = *frlen + len;
return ((u8 *)pbuf) + len;
}
/* rtw_set_ie will update frame length */
u8 *rtw_set_ie
(
u8 *pbuf,
int index,
uint len,
u8 *source,
uint *frlen /* frame length */
)
{
*pbuf = (u8)index;
*(pbuf + 1) = (u8)len;
if (len > 0)
memcpy((void *)(pbuf + 2), (void *)source, len);
*frlen = *frlen + (len + 2);
return pbuf + len + 2;
}
/*
* ----------------------------------------------------------------------------
* index: the information element id index, limit is the limit for search
* ----------------------------------------------------------------------------
*/
u8 *rtw_get_ie(u8 *pbuf, int index, uint *len, int limit)
{
int tmp, i;
u8 *p;
if (limit < 1)
return NULL;
p = pbuf;
i = 0;
*len = 0;
while (1) {
if (*p == index) {
*len = *(p + 1);
return p;
}
tmp = *(p + 1);
p += (tmp + 2);
i += (tmp + 2);
if (i >= limit)
break;
}
return NULL;
}
void rtw_set_supported_rate(u8 *SupportedRates, uint mode)
{
memset(SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
switch (mode) {
case WIRELESS_11B:
memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN);
break;
case WIRELESS_11G:
case WIRELESS_11A:
case WIRELESS_11_5N:
case WIRELESS_11A_5N:/* Todo: no basic rate for ofdm ? */
memcpy(SupportedRates, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN);
break;
case WIRELESS_11BG:
case WIRELESS_11G_24N:
case WIRELESS_11_24N:
case WIRELESS_11BG_24N:
memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN);
memcpy(SupportedRates + IEEE80211_CCK_RATE_LEN, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN);
break;
}
}
uint rtw_get_rateset_len(u8 *rateset)
{
uint i;
for (i = 0; i < 13; i++)
if (rateset[i] == 0)
break;
return i;
}
int rtw_generate_ie(struct registry_priv *pregistrypriv)
{
u8 wireless_mode;
int rateLen;
uint sz = 0;
struct wlan_bssid_ex *pdev_network = &pregistrypriv->dev_network;
u8 *ie = pdev_network->ies;
/* timestamp will be inserted by hardware */
sz += 8;
ie += sz;
/* beacon interval : 2bytes */
*(__le16 *)ie = cpu_to_le16((u16)pdev_network->Configuration.BeaconPeriod);/* BCN_INTERVAL; */
sz += 2;
ie += 2;
/* capability info */
*(u16 *)ie = 0;
*(__le16 *)ie |= cpu_to_le16(WLAN_CAPABILITY_IBSS);
if (pregistrypriv->preamble == PREAMBLE_SHORT)
*(__le16 *)ie |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
if (pdev_network->Privacy)
*(__le16 *)ie |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
sz += 2;
ie += 2;
/* SSID */
ie = rtw_set_ie(ie, WLAN_EID_SSID, pdev_network->ssid.ssid_length, pdev_network->ssid.ssid, &sz);
/* supported rates */
if (pregistrypriv->wireless_mode == WIRELESS_11ABGN)
wireless_mode = WIRELESS_11BG_24N;
else
wireless_mode = pregistrypriv->wireless_mode;
rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode);
rateLen = rtw_get_rateset_len(pdev_network->SupportedRates);
if (rateLen > 8) {
ie = rtw_set_ie(ie, WLAN_EID_SUPP_RATES, 8, pdev_network->SupportedRates, &sz);
/* ie = rtw_set_ie(ie, WLAN_EID_EXT_SUPP_RATES, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); */
} else {
ie = rtw_set_ie(ie, WLAN_EID_SUPP_RATES, rateLen, pdev_network->SupportedRates, &sz);
}
/* DS parameter set */
ie = rtw_set_ie(ie, WLAN_EID_DS_PARAMS, 1, (u8 *)&pdev_network->Configuration.DSConfig, &sz);
/* IBSS Parameter Set */
ie = rtw_set_ie(ie, WLAN_EID_IBSS_PARAMS, 2, (u8 *)&pdev_network->Configuration.ATIMWindow, &sz);
if (rateLen > 8)
ie = rtw_set_ie(ie, WLAN_EID_EXT_SUPP_RATES, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz);
return sz;
}
unsigned char *rtw_get_wpa_ie(unsigned char *pie, uint *wpa_ie_len, int limit)
{
uint len;
u16 val16;
__le16 le_tmp;
static const unsigned char wpa_oui_type[] = {0x00, 0x50, 0xf2, 0x01};
u8 *pbuf = pie;
int limit_new = limit;
while (1) {
pbuf = rtw_get_ie(pbuf, WLAN_EID_VENDOR_SPECIFIC, &len, limit_new);
if (pbuf) {
/* check if oui matches... */
if (memcmp((pbuf + 2), wpa_oui_type, sizeof(wpa_oui_type)))
goto check_next_ie;
/* check version... */
memcpy((u8 *)&le_tmp, (pbuf + 6), sizeof(val16));
val16 = le16_to_cpu(le_tmp);
if (val16 != 0x0001)
goto check_next_ie;
*wpa_ie_len = *(pbuf + 1);
return pbuf;
}
*wpa_ie_len = 0;
return NULL;
check_next_ie:
limit_new = limit - (pbuf - pie) - 2 - len;
if (limit_new <= 0)
break;
pbuf += (2 + len);
}
*wpa_ie_len = 0;
return NULL;
}
unsigned char *rtw_get_wpa2_ie(unsigned char *pie, uint *rsn_ie_len, int limit)
{
return rtw_get_ie(pie, WLAN_EID_RSN, rsn_ie_len, limit);
}
int rtw_get_wpa_cipher_suite(u8 *s)
{
if (!memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN))
return WPA_CIPHER_NONE;
if (!memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN))
return WPA_CIPHER_WEP40;
if (!memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN))
return WPA_CIPHER_TKIP;
if (!memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN))
return WPA_CIPHER_CCMP;
if (!memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN))
return WPA_CIPHER_WEP104;
return 0;
}
int rtw_get_wpa2_cipher_suite(u8 *s)
{
if (!memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN))
return WPA_CIPHER_NONE;
if (!memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN))
return WPA_CIPHER_WEP40;
if (!memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN))
return WPA_CIPHER_TKIP;
if (!memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN))
return WPA_CIPHER_CCMP;
if (!memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN))
return WPA_CIPHER_WEP104;
return 0;
}
int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x)
{
int i, ret = _SUCCESS;
int left, count;
u8 *pos;
u8 SUITE_1X[4] = {0x00, 0x50, 0xf2, 1};
if (wpa_ie_len <= 0) {
/* No WPA IE - fail silently */
return _FAIL;
}
if ((*wpa_ie != WLAN_EID_VENDOR_SPECIFIC) || (*(wpa_ie + 1) != (u8)(wpa_ie_len - 2)) ||
(memcmp(wpa_ie + 2, RTW_WPA_OUI_TYPE, WPA_SELECTOR_LEN)))
return _FAIL;
pos = wpa_ie;
pos += 8;
left = wpa_ie_len - 8;
/* group_cipher */
if (left >= WPA_SELECTOR_LEN) {
*group_cipher = rtw_get_wpa_cipher_suite(pos);
pos += WPA_SELECTOR_LEN;
left -= WPA_SELECTOR_LEN;
} else if (left > 0) {
return _FAIL;
}
/* pairwise_cipher */
if (left >= 2) {
count = get_unaligned_le16(pos);
pos += 2;
left -= 2;
if (count == 0 || left < count * WPA_SELECTOR_LEN)
return _FAIL;
for (i = 0; i < count; i++) {
*pairwise_cipher |= rtw_get_wpa_cipher_suite(pos);
pos += WPA_SELECTOR_LEN;
left -= WPA_SELECTOR_LEN;
}
} else if (left == 1) {
return _FAIL;
}
if (is_8021x) {
if (left >= 6) {
pos += 2;
if (!memcmp(pos, SUITE_1X, 4))
*is_8021x = 1;
}
}
return ret;
}
int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x)
{
int i, ret = _SUCCESS;
int left, count;
u8 *pos;
u8 SUITE_1X[4] = {0x00, 0x0f, 0xac, 0x01};
if (rsn_ie_len <= 0) {
/* No RSN IE - fail silently */
return _FAIL;
}
if ((*rsn_ie != WLAN_EID_RSN) || (*(rsn_ie + 1) != (u8)(rsn_ie_len - 2)))
return _FAIL;
pos = rsn_ie;
pos += 4;
left = rsn_ie_len - 4;
/* group_cipher */
if (left >= RSN_SELECTOR_LEN) {
*group_cipher = rtw_get_wpa2_cipher_suite(pos);
pos += RSN_SELECTOR_LEN;
left -= RSN_SELECTOR_LEN;
} else if (left > 0) {
return _FAIL;
}
/* pairwise_cipher */
if (left >= 2) {
count = get_unaligned_le16(pos);
pos += 2;
left -= 2;
if (count == 0 || left < count * RSN_SELECTOR_LEN)
return _FAIL;
for (i = 0; i < count; i++) {
*pairwise_cipher |= rtw_get_wpa2_cipher_suite(pos);
pos += RSN_SELECTOR_LEN;
left -= RSN_SELECTOR_LEN;
}
} else if (left == 1) {
return _FAIL;
}
if (is_8021x) {
if (left >= 6) {
pos += 2;
if (!memcmp(pos, SUITE_1X, 4))
*is_8021x = 1;
}
}
return ret;
}
void rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie, u16 *wpa_len)
{
u8 authmode;
u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01};
uint cnt;
/* Search required WPA or WPA2 IE and copy to sec_ie[] */
cnt = _TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_;
while (cnt < in_len) {
authmode = in_ie[cnt];
if ((authmode == WLAN_EID_VENDOR_SPECIFIC) && (!memcmp(&in_ie[cnt + 2], &wpa_oui[0], 4))) {
if (wpa_ie)
memcpy(wpa_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
*wpa_len = in_ie[cnt + 1] + 2;
cnt += in_ie[cnt + 1] + 2; /* get next */
} else {
if (authmode == WLAN_EID_RSN) {
if (rsn_ie)
memcpy(rsn_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
*rsn_len = in_ie[cnt + 1] + 2;
cnt += in_ie[cnt + 1] + 2; /* get next */
} else {
cnt += in_ie[cnt + 1] + 2; /* get next */
}
}
}
}
u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen)
{
u8 match = false;
u8 eid, wps_oui[4] = {0x0, 0x50, 0xf2, 0x04};
if (!ie_ptr)
return match;
eid = ie_ptr[0];
if ((eid == WLAN_EID_VENDOR_SPECIFIC) && (!memcmp(&ie_ptr[2], wps_oui, 4))) {
*wps_ielen = ie_ptr[1] + 2;
match = true;
}
return match;
}
/**
* rtw_get_wps_ie - Search WPS IE from a series of ies
* @in_ie: Address of ies to search
* @in_len: Length limit from in_ie
* @wps_ie: If not NULL and WPS IE is found, WPS IE will be copied to the buf starting from wps_ie
* @wps_ielen: If not NULL and WPS IE is found, will set to the length of the entire WPS IE
*
* Returns: The address of the WPS IE found, or NULL
*/
u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen)
{
uint cnt;
u8 *wpsie_ptr = NULL;
u8 eid, wps_oui[4] = {0x0, 0x50, 0xf2, 0x04};
if (wps_ielen)
*wps_ielen = 0;
if (!in_ie || in_len <= 0)
return wpsie_ptr;
cnt = 0;
while (cnt < in_len) {
eid = in_ie[cnt];
if ((eid == WLAN_EID_VENDOR_SPECIFIC) && (!memcmp(&in_ie[cnt + 2], wps_oui, 4))) {
wpsie_ptr = &in_ie[cnt];
if (wps_ie)
memcpy(wps_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
if (wps_ielen)
*wps_ielen = in_ie[cnt + 1] + 2;
cnt += in_ie[cnt + 1] + 2;
break;
}
cnt += in_ie[cnt + 1] + 2; /* goto next */
}
return wpsie_ptr;
}
/**
* rtw_get_wps_attr - Search a specific WPS attribute from a given WPS IE
* @wps_ie: Address of WPS IE to search
* @wps_ielen: Length limit from wps_ie
* @target_attr_id: The attribute ID of WPS attribute to search
* @buf_attr: If not NULL and the WPS attribute is found, WPS attribute will be copied to the buf starting from buf_attr
* @len_attr: If not NULL and the WPS attribute is found, will set to the length of the entire WPS attribute
*
* Returns: the address of the specific WPS attribute found, or NULL
*/
u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id, u8 *buf_attr, u32 *len_attr)
{
u8 *attr_ptr = NULL;
u8 *target_attr_ptr = NULL;
u8 wps_oui[4] = {0x00, 0x50, 0xF2, 0x04};
if (len_attr)
*len_attr = 0;
if ((wps_ie[0] != WLAN_EID_VENDOR_SPECIFIC) ||
(memcmp(wps_ie + 2, wps_oui, 4)))
return attr_ptr;
/* 6 = 1(Element ID) + 1(Length) + 4(WPS OUI) */
attr_ptr = wps_ie + 6; /* goto first attr */
while (attr_ptr - wps_ie < wps_ielen) {
/* 4 = 2(Attribute ID) + 2(Length) */
u16 attr_id = get_unaligned_be16(attr_ptr);
u16 attr_data_len = get_unaligned_be16(attr_ptr + 2);
u16 attr_len = attr_data_len + 4;
if (attr_id == target_attr_id) {
target_attr_ptr = attr_ptr;
if (buf_attr)
memcpy(buf_attr, attr_ptr, attr_len);
if (len_attr)
*len_attr = attr_len;
break;
}
attr_ptr += attr_len; /* goto next */
}
return target_attr_ptr;
}
/**
* rtw_get_wps_attr_content - Search a specific WPS attribute content from a given WPS IE
* @wps_ie: Address of WPS IE to search
* @wps_ielen: Length limit from wps_ie
* @target_attr_id: The attribute ID of WPS attribute to search
* @buf_content: If not NULL and the WPS attribute is found, WPS attribute content will be copied to the buf starting from buf_content
* @len_content: If not NULL and the WPS attribute is found, will set to the length of the WPS attribute content
*
* Returns: the address of the specific WPS attribute content found, or NULL
*/
u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id, u8 *buf_content, uint *len_content)
{
u8 *attr_ptr;
u32 attr_len;
if (len_content)
*len_content = 0;
attr_ptr = rtw_get_wps_attr(wps_ie, wps_ielen, target_attr_id, NULL, &attr_len);
if (attr_ptr && attr_len) {
if (buf_content)
memcpy(buf_content, attr_ptr + 4, attr_len - 4);
if (len_content)
*len_content = attr_len - 4;
return attr_ptr + 4;
}
return NULL;
}
static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
struct rtw_ieee802_11_elems *elems, int show_errors)
{
unsigned int oui;
/*
* first 3 bytes in vendor specific information element are the IEEE
* OUI of the vendor. The following byte is used a vendor specific
* sub-type.
*/
if (elen < 4)
return -1;
oui = RTW_GET_BE24(pos);
switch (oui) {
case OUI_MICROSOFT:
/*
* Microsoft/Wi-Fi information elements are further typed and
* subtyped
*/
switch (pos[3]) {
case 1:
/*
* Microsoft OUI (00:50:F2) with OUI Type 1:
* real WPA information element
*/
elems->wpa_ie = pos;
elems->wpa_ie_len = elen;
break;
case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */
if (elen < 5)
return -1;
switch (pos[4]) {
case WME_OUI_SUBTYPE_INFORMATION_ELEMENT:
case WME_OUI_SUBTYPE_PARAMETER_ELEMENT:
elems->wme = pos;
elems->wme_len = elen;
break;
case WME_OUI_SUBTYPE_TSPEC_ELEMENT:
elems->wme_tspec = pos;
elems->wme_tspec_len = elen;
break;
default:
return -1;
}
break;
case 4:
/* Wi-Fi Protected Setup (WPS) IE */
elems->wps_ie = pos;
elems->wps_ie_len = elen;
break;
default:
return -1;
}
break;
case OUI_BROADCOM:
switch (pos[3]) {
case VENDOR_HT_CAPAB_OUI_TYPE:
elems->vendor_ht_cap = pos;
elems->vendor_ht_cap_len = elen;
break;
default:
return -1;
}
break;
default:
return -1;
}
return 0;
}
/**
* rtw_ieee802_11_parse_elems - Parse information elements in management frames
* @start: Pointer to the start of ies
* @len: Length of IE buffer in octets
* @elems: Data structure for parsed elements
* @show_errors: Whether to show parsing errors in debug log
* Returns: Parsing result
*/
enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
struct rtw_ieee802_11_elems *elems,
int show_errors)
{
uint left = len;
u8 *pos = start;
int unknown = 0;
memset(elems, 0, sizeof(*elems));
while (left >= 2) {
u8 id, elen;
id = *pos++;
elen = *pos++;
left -= 2;
if (elen > left)
return ParseFailed;
switch (id) {
case WLAN_EID_SSID:
elems->ssid = pos;
elems->ssid_len = elen;
break;
case WLAN_EID_SUPP_RATES:
elems->supp_rates = pos;
elems->supp_rates_len = elen;
break;
case WLAN_EID_FH_PARAMS:
elems->fh_params = pos;
elems->fh_params_len = elen;
break;
case WLAN_EID_DS_PARAMS:
elems->ds_params = pos;
elems->ds_params_len = elen;
break;
case WLAN_EID_CF_PARAMS:
elems->cf_params = pos;
elems->cf_params_len = elen;
break;
case WLAN_EID_TIM:
elems->tim = pos;
elems->tim_len = elen;
break;
case WLAN_EID_IBSS_PARAMS:
elems->ibss_params = pos;
elems->ibss_params_len = elen;
break;
case WLAN_EID_CHALLENGE:
elems->challenge = pos;
elems->challenge_len = elen;
break;
case WLAN_EID_ERP_INFO:
elems->erp_info = pos;
elems->erp_info_len = elen;
break;
case WLAN_EID_EXT_SUPP_RATES:
elems->ext_supp_rates = pos;
elems->ext_supp_rates_len = elen;
break;
case WLAN_EID_VENDOR_SPECIFIC:
if (rtw_ieee802_11_parse_vendor_specific(pos, elen, elems, show_errors))
unknown++;
break;
case WLAN_EID_RSN:
elems->rsn_ie = pos;
elems->rsn_ie_len = elen;
break;
case WLAN_EID_PWR_CAPABILITY:
elems->power_cap = pos;
elems->power_cap_len = elen;
break;
case WLAN_EID_SUPPORTED_CHANNELS:
elems->supp_channels = pos;
elems->supp_channels_len = elen;
break;
case WLAN_EID_MOBILITY_DOMAIN:
elems->mdie = pos;
elems->mdie_len = elen;
break;
case WLAN_EID_FAST_BSS_TRANSITION:
elems->ftie = pos;
elems->ftie_len = elen;
break;
case WLAN_EID_TIMEOUT_INTERVAL:
elems->timeout_int = pos;
elems->timeout_int_len = elen;
break;
case WLAN_EID_HT_CAPABILITY:
elems->ht_capabilities = pos;
elems->ht_capabilities_len = elen;
break;
case WLAN_EID_HT_OPERATION:
elems->ht_operation = pos;
elems->ht_operation_len = elen;
break;
default:
unknown++;
break;
}
left -= elen;
pos += elen;
}
if (left)
return ParseFailed;
return unknown ? ParseUnknown : ParseOK;
}
void rtw_macaddr_cfg(u8 *mac_addr)
{
u8 mac[ETH_ALEN];
if (!mac_addr)
return;
if (rtw_initmac && mac_pton(rtw_initmac, mac)) {
/* Users specify the mac address */
ether_addr_copy(mac_addr, mac);
} else {
/* Use the mac address stored in the Efuse */
ether_addr_copy(mac, mac_addr);
}
if (is_broadcast_ether_addr(mac) || is_zero_ether_addr(mac))
eth_random_addr(mac_addr);
}
static int rtw_get_cipher_info(struct wlan_network *pnetwork)
{
uint wpa_ielen;
unsigned char *pbuf;
int group_cipher = 0, pairwise_cipher = 0, is8021x = 0;
int ret = _FAIL;
pbuf = rtw_get_wpa_ie(&pnetwork->network.ies[12], &wpa_ielen, pnetwork->network.ie_length - 12);
if (pbuf && (wpa_ielen > 0)) {
if (rtw_parse_wpa_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is8021x) == _SUCCESS) {
pnetwork->BcnInfo.pairwise_cipher = pairwise_cipher;
pnetwork->BcnInfo.group_cipher = group_cipher;
pnetwork->BcnInfo.is_8021x = is8021x;
ret = _SUCCESS;
}
} else {
pbuf = rtw_get_wpa2_ie(&pnetwork->network.ies[12], &wpa_ielen, pnetwork->network.ie_length - 12);
if (pbuf && (wpa_ielen > 0)) {
if (rtw_parse_wpa2_ie(pbuf, wpa_ielen + 2, &group_cipher, &pairwise_cipher, &is8021x) == _SUCCESS) {
pnetwork->BcnInfo.pairwise_cipher = pairwise_cipher;
pnetwork->BcnInfo.group_cipher = group_cipher;
pnetwork->BcnInfo.is_8021x = is8021x;
ret = _SUCCESS;
}
}
}
return ret;
}
void rtw_get_bcn_info(struct wlan_network *pnetwork)
{
unsigned short cap = 0;
u8 bencrypt = 0;
__le16 le_tmp;
u16 wpa_len = 0, rsn_len = 0;
struct HT_info_element *pht_info = NULL;
uint len;
unsigned char *p;
memcpy(&le_tmp, rtw_get_capability_from_ie(pnetwork->network.ies), 2);
cap = le16_to_cpu(le_tmp);
if (cap & WLAN_CAPABILITY_PRIVACY) {
bencrypt = 1;
pnetwork->network.Privacy = 1;
} else {
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_OPENSYS;
}
rtw_get_sec_ie(pnetwork->network.ies, pnetwork->network.ie_length, NULL, &rsn_len, NULL, &wpa_len);
if (rsn_len > 0) {
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WPA2;
} else if (wpa_len > 0) {
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WPA;
} else {
if (bencrypt)
pnetwork->BcnInfo.encryp_protocol = ENCRYP_PROTOCOL_WEP;
}
rtw_get_cipher_info(pnetwork);
/* get bwmode and ch_offset */
/* parsing HT_CAP_IE */
p = rtw_get_ie(pnetwork->network.ies + _FIXED_IE_LENGTH_, WLAN_EID_HT_CAPABILITY, &len, pnetwork->network.ie_length - _FIXED_IE_LENGTH_);
if (p && len > 0) {
struct ieee80211_ht_cap *ht_cap =
(struct ieee80211_ht_cap *)(p + 2);
pnetwork->BcnInfo.ht_cap_info = le16_to_cpu(ht_cap->cap_info);
} else {
pnetwork->BcnInfo.ht_cap_info = 0;
}
/* parsing HT_INFO_IE */
p = rtw_get_ie(pnetwork->network.ies + _FIXED_IE_LENGTH_, WLAN_EID_HT_OPERATION, &len, pnetwork->network.ie_length - _FIXED_IE_LENGTH_);
if (p && len > 0) {
pht_info = (struct HT_info_element *)(p + 2);
pnetwork->BcnInfo.ht_info_infos_0 = pht_info->infos[0];
} else {
pnetwork->BcnInfo.ht_info_infos_0 = 0;
}
}
/* show MCS rate, unit: 100Kbps */
u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char *MCS_rate)
{
u16 max_rate = 0;
if (rf_type == RF_1T1R) {
if (MCS_rate[0] & BIT(7))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1500 : 1350) : ((short_GI_20) ? 722 : 650);
else if (MCS_rate[0] & BIT(6))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1350 : 1215) : ((short_GI_20) ? 650 : 585);
else if (MCS_rate[0] & BIT(5))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520);
else if (MCS_rate[0] & BIT(4))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390);
else if (MCS_rate[0] & BIT(3))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260);
else if (MCS_rate[0] & BIT(2))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 450 : 405) : ((short_GI_20) ? 217 : 195);
else if (MCS_rate[0] & BIT(1))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130);
else if (MCS_rate[0] & BIT(0))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 150 : 135) : ((short_GI_20) ? 72 : 65);
} else {
if (MCS_rate[1]) {
if (MCS_rate[1] & BIT(7))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 3000 : 2700) : ((short_GI_20) ? 1444 : 1300);
else if (MCS_rate[1] & BIT(6))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 2700 : 2430) : ((short_GI_20) ? 1300 : 1170);
else if (MCS_rate[1] & BIT(5))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 2400 : 2160) : ((short_GI_20) ? 1156 : 1040);
else if (MCS_rate[1] & BIT(4))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1800 : 1620) : ((short_GI_20) ? 867 : 780);
else if (MCS_rate[1] & BIT(3))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520);
else if (MCS_rate[1] & BIT(2))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390);
else if (MCS_rate[1] & BIT(1))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260);
else if (MCS_rate[1] & BIT(0))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130);
} else {
if (MCS_rate[0] & BIT(7))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1500 : 1350) : ((short_GI_20) ? 722 : 650);
else if (MCS_rate[0] & BIT(6))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1350 : 1215) : ((short_GI_20) ? 650 : 585);
else if (MCS_rate[0] & BIT(5))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 1200 : 1080) : ((short_GI_20) ? 578 : 520);
else if (MCS_rate[0] & BIT(4))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 900 : 810) : ((short_GI_20) ? 433 : 390);
else if (MCS_rate[0] & BIT(3))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 600 : 540) : ((short_GI_20) ? 289 : 260);
else if (MCS_rate[0] & BIT(2))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 450 : 405) : ((short_GI_20) ? 217 : 195);
else if (MCS_rate[0] & BIT(1))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 300 : 270) : ((short_GI_20) ? 144 : 130);
else if (MCS_rate[0] & BIT(0))
max_rate = (bw_40MHz) ? ((short_GI_40) ? 150 : 135) : ((short_GI_20) ? 72 : 65);
}
}
return max_rate;
}

512
drivers/staging/rtl8188eu/core/rtw_ioctl_set.c
View File

@ -1,512 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTW_IOCTL_SET_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_ioctl_set.h>
#include <hal_intf.h>
static const struct {
int channel_plan;
char *name;
} channel_table[] = { { RT_CHANNEL_DOMAIN_FCC, "US" },
{ RT_CHANNEL_DOMAIN_ETSI, "EU" },
{ RT_CHANNEL_DOMAIN_MKK, "JP" },
{ RT_CHANNEL_DOMAIN_CHINA, "CN"} };
extern void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_do_join(struct adapter *padapter)
{
struct list_head *plist, *phead;
u8 *pibss = NULL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct __queue *queue = &pmlmepriv->scanned_queue;
u8 ret = _SUCCESS;
spin_lock_bh(&pmlmepriv->scanned_queue.lock);
phead = get_list_head(queue);
plist = phead->next;
pmlmepriv->cur_network.join_res = -2;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
pmlmepriv->pscanned = plist;
pmlmepriv->to_join = true;
if (list_empty(&queue->queue)) {
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
/* when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty */
/* we try to issue sitesurvey firstly */
if (!pmlmepriv->LinkDetectInfo.bBusyTraffic ||
pmlmepriv->to_roaming > 0) {
/* submit site_survey_cmd */
ret = rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0);
if (ret != _SUCCESS)
pmlmepriv->to_join = false;
} else {
pmlmepriv->to_join = false;
ret = _FAIL;
}
goto exit;
} else {
int select_ret;
spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (select_ret == _SUCCESS) {
pmlmepriv->to_join = false;
mod_timer(&pmlmepriv->assoc_timer,
jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
/* submit createbss_cmd to change to a ADHOC_MASTER */
/* pmlmepriv->lock has been acquired by caller... */
struct wlan_bssid_ex *pdev_network = &padapter->registrypriv.dev_network;
pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE;
pibss = padapter->registrypriv.dev_network.MacAddress;
memcpy(&pdev_network->ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid));
rtw_update_registrypriv_dev_network(padapter);
rtw_generate_random_ibss(pibss);
if (rtw_createbss_cmd(padapter) != _SUCCESS) {
ret = false;
goto exit;
}
pmlmepriv->to_join = false;
} else {
/* can't associate ; reset under-linking */
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
/* when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue */
/* we try to issue sitesurvey firstly */
if (!pmlmepriv->LinkDetectInfo.bBusyTraffic ||
pmlmepriv->to_roaming > 0) {
ret = rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0);
if (ret != _SUCCESS)
pmlmepriv->to_join = false;
} else {
ret = _FAIL;
pmlmepriv->to_join = false;
}
}
}
}
exit:
return ret;
}
u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid)
{
u8 status = _SUCCESS;
u32 cur_time = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if ((bssid[0] == 0x00 && bssid[1] == 0x00 && bssid[2] == 0x00 &&
bssid[3] == 0x00 && bssid[4] == 0x00 && bssid[5] == 0x00) ||
(bssid[0] == 0xFF && bssid[1] == 0xFF && bssid[2] == 0xFF &&
bssid[3] == 0xFF && bssid[4] == 0xFF && bssid[5] == 0xFF)) {
status = _FAIL;
goto exit;
}
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
goto release_mlme_lock;
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE)) {
if (!memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN)) {
if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE))
goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
} else {
rtw_disassoc_cmd(padapter, 0, true);
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
}
}
handle_tkip_countermeasure:
/* should we add something here...? */
if (padapter->securitypriv.btkip_countermeasure) {
cur_time = jiffies;
if (cur_time - padapter->securitypriv.btkip_countermeasure_time > 60 * HZ) {
padapter->securitypriv.btkip_countermeasure = false;
padapter->securitypriv.btkip_countermeasure_time = 0;
} else {
status = _FAIL;
goto release_mlme_lock;
}
}
memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN);
pmlmepriv->assoc_by_bssid = true;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
pmlmepriv->to_join = true;
else
status = rtw_do_join(padapter);
release_mlme_lock:
spin_unlock_bh(&pmlmepriv->lock);
exit:
return status;
}
u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
{
u8 status = _SUCCESS;
u32 cur_time = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *pnetwork = &pmlmepriv->cur_network;
if (!padapter->hw_init_completed) {
status = _FAIL;
goto exit;
}
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
goto handle_tkip_countermeasure;
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
goto release_mlme_lock;
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE)) {
if (pmlmepriv->assoc_ssid.ssid_length == ssid->ssid_length &&
!memcmp(&pmlmepriv->assoc_ssid.ssid, ssid->ssid, ssid->ssid_length)) {
if (!check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
if (!rtw_is_same_ibss(padapter, pnetwork)) {
/* if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again */
rtw_disassoc_cmd(padapter, 0, true);
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
} else {
goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
}
} else {
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1);
}
} else {
rtw_disassoc_cmd(padapter, 0, true);
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter);
if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) {
_clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
}
}
}
handle_tkip_countermeasure:
if (padapter->securitypriv.btkip_countermeasure) {
cur_time = jiffies;
if (cur_time - padapter->securitypriv.btkip_countermeasure_time > 60 * HZ) {
padapter->securitypriv.btkip_countermeasure = false;
padapter->securitypriv.btkip_countermeasure_time = 0;
} else {
status = _FAIL;
goto release_mlme_lock;
}
}
memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(struct ndis_802_11_ssid));
pmlmepriv->assoc_by_bssid = false;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
pmlmepriv->to_join = true;
else
status = rtw_do_join(padapter);
release_mlme_lock:
spin_unlock_bh(&pmlmepriv->lock);
exit:
return status;
}
u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
enum ndis_802_11_network_infra networktype)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
enum ndis_802_11_network_infra *pold_state = &cur_network->network.InfrastructureMode;
if (*pold_state != networktype) {
spin_lock_bh(&pmlmepriv->lock);
if (*pold_state == Ndis802_11APMode) {
/* change to other mode from Ndis802_11APMode */
cur_network->join_res = -1;
#ifdef CONFIG_88EU_AP_MODE
stop_ap_mode(padapter);
#endif
}
if (check_fwstate(pmlmepriv, _FW_LINKED) ||
*pold_state == Ndis802_11IBSS)
rtw_disassoc_cmd(padapter, 0, true);
if (check_fwstate(pmlmepriv, _FW_LINKED) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))
rtw_free_assoc_resources(padapter);
if (*pold_state == Ndis802_11Infrastructure ||
*pold_state == Ndis802_11IBSS) {
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_indicate_disconnect(padapter); /* will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not */
}
*pold_state = networktype;
_clr_fwstate_(pmlmepriv, ~WIFI_NULL_STATE);
switch (networktype) {
case Ndis802_11IBSS:
set_fwstate(pmlmepriv, WIFI_ADHOC_STATE);
break;
case Ndis802_11Infrastructure:
set_fwstate(pmlmepriv, WIFI_STATION_STATE);
break;
case Ndis802_11APMode:
set_fwstate(pmlmepriv, WIFI_AP_STATE);
#ifdef CONFIG_88EU_AP_MODE
start_ap_mode(padapter);
#endif
break;
case Ndis802_11AutoUnknown:
case Ndis802_11InfrastructureMax:
break;
}
spin_unlock_bh(&pmlmepriv->lock);
}
return true;
}
u8 rtw_set_802_11_disassociate(struct adapter *padapter)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
rtw_disassoc_cmd(padapter, 0, true);
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter);
rtw_pwr_wakeup(padapter);
}
spin_unlock_bh(&pmlmepriv->lock);
return true;
}
u8 rtw_set_802_11_bssid_list_scan(struct adapter *padapter, struct ndis_802_11_ssid *pssid, int ssid_max_num)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
u8 res = true;
if (!padapter) {
res = false;
goto exit;
}
if (!padapter->hw_init_completed) {
res = false;
goto exit;
}
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING) ||
pmlmepriv->LinkDetectInfo.bBusyTraffic) {
/* Scan or linking is in progress, do nothing. */
res = true;
} else {
if (rtw_is_scan_deny(padapter)) {
indicate_wx_scan_complete_event(padapter);
return _SUCCESS;
}
spin_lock_bh(&pmlmepriv->lock);
res = rtw_sitesurvey_cmd(padapter, pssid, ssid_max_num, NULL, 0);
spin_unlock_bh(&pmlmepriv->lock);
}
exit:
return res;
}
u8 rtw_set_802_11_authentication_mode(struct adapter *padapter, enum ndis_802_11_auth_mode authmode)
{
struct security_priv *psecuritypriv = &padapter->securitypriv;
int res;
u8 ret;
psecuritypriv->ndisauthtype = authmode;
if (psecuritypriv->ndisauthtype > 3)
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
res = rtw_set_auth(padapter, psecuritypriv);
if (res == _SUCCESS)
ret = true;
else
ret = false;
return ret;
}
u8 rtw_set_802_11_add_wep(struct adapter *padapter, struct ndis_802_11_wep *wep)
{
int keyid, res;
struct security_priv *psecuritypriv = &padapter->securitypriv;
u8 ret = _SUCCESS;
keyid = wep->KeyIndex & 0x3fffffff;
if (keyid >= 4) {
ret = false;
goto exit;
}
switch (wep->KeyLength) {
case 5:
psecuritypriv->dot11PrivacyAlgrthm = _WEP40_;
break;
case 13:
psecuritypriv->dot11PrivacyAlgrthm = _WEP104_;
break;
default:
psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_;
break;
}
memcpy(&psecuritypriv->dot11DefKey[keyid].skey[0],
&wep->KeyMaterial, wep->KeyLength);
psecuritypriv->dot11DefKeylen[keyid] = wep->KeyLength;
psecuritypriv->dot11PrivacyKeyIndex = keyid;
res = rtw_set_key(padapter, psecuritypriv, keyid, 1);
if (res == _FAIL)
ret = false;
exit:
return ret;
}
/* Return 0 or 100Kbps */
u16 rtw_get_cur_max_rate(struct adapter *adapter)
{
int i = 0;
u8 *p;
u16 rate = 0, max_rate = 0;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct registry_priv *pregistrypriv = &adapter->registrypriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
u8 bw_40MHz = 0, short_GI_20 = 0, short_GI_40 = 0;
u32 ht_ielen = 0;
if (!check_fwstate(pmlmepriv, _FW_LINKED) &&
!check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))
return 0;
if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N | WIRELESS_11_5N)) {
p = rtw_get_ie(&pcur_bss->ies[12], WLAN_EID_HT_CAPABILITY,
&ht_ielen, pcur_bss->ie_length - 12);
if (p && ht_ielen > 0) {
/* cur_bwmod is updated by beacon, pmlmeinfo is updated by association response */
bw_40MHz = (pmlmeext->cur_bwmode && (HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH & pmlmeinfo->HT_info.infos[0])) ? 1 : 0;
short_GI_20 = (le16_to_cpu(pmlmeinfo->HT_caps.cap_info) & IEEE80211_HT_CAP_SGI_20) ? 1 : 0;
short_GI_40 = (le16_to_cpu(pmlmeinfo->HT_caps.cap_info) & IEEE80211_HT_CAP_SGI_40) ? 1 : 0;
max_rate = rtw_mcs_rate(
RF_1T1R,
bw_40MHz & pregistrypriv->cbw40_enable,
short_GI_20,
short_GI_40,
pmlmeinfo->HT_caps.mcs.rx_mask
);
}
} else {
while (pcur_bss->SupportedRates[i] != 0 &&
pcur_bss->SupportedRates[i] != 0xFF) {
rate = pcur_bss->SupportedRates[i] & 0x7F;
if (rate > max_rate)
max_rate = rate;
i++;
}
max_rate *= 5;
}
return max_rate;
}
/* Return _SUCCESS or _FAIL */
int rtw_set_country(struct adapter *adapter, const char *country_code)
{
int i;
int channel_plan = RT_CHANNEL_DOMAIN_WORLD_WIDE_5G;
for (i = 0; i < ARRAY_SIZE(channel_table); i++) {
if (strcmp(channel_table[i].name, country_code) == 0) {
channel_plan = channel_table[i].channel_plan;
break;
}
}
return rtw_set_chplan_cmd(adapter, channel_plan, 1);
}

19
drivers/staging/rtl8188eu/core/rtw_iol.c
View File

@ -1,19 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <rtw_iol.h>
bool rtw_iol_applied(struct adapter *adapter)
{
if (adapter->registrypriv.fw_iol == 1)
return true;
if (adapter->registrypriv.fw_iol == 2 &&
!adapter_to_dvobj(adapter)->ishighspeed)
return true;
return false;
}

460
drivers/staging/rtl8188eu/core/rtw_led.c
View File

@ -1,460 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <drv_types.h>
#include "rtw_led.h"
/* */
/* Description: */
/* Callback function of LED BlinkTimer, */
/* it just schedules to corresponding BlinkWorkItem/led_blink_hdl */
/* */
static void BlinkTimerCallback(struct timer_list *t)
{
struct LED_871x *pLed = from_timer(pLed, t, BlinkTimer);
struct adapter *padapter = pLed->padapter;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
schedule_work(&pLed->BlinkWorkItem);
}
/* */
/* Description: */
/* Callback function of LED BlinkWorkItem. */
/* */
void BlinkWorkItemCallback(struct work_struct *work)
{
struct LED_871x *pLed = container_of(work, struct LED_871x,
BlinkWorkItem);
blink_handler(pLed);
}
/* */
/* Description: */
/* Reset status of LED_871x object. */
/* */
void ResetLedStatus(struct LED_871x *pLed)
{
pLed->CurrLedState = RTW_LED_OFF; /* Current LED state. */
pLed->led_on = false; /* true if LED is ON, false if LED is OFF. */
pLed->bLedBlinkInProgress = false; /* true if it is blinking, false o.w.. */
pLed->bLedWPSBlinkInProgress = false;
pLed->BlinkTimes = 0; /* Number of times to toggle led state for blinking. */
pLed->BlinkingLedState = LED_UNKNOWN; /* Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. */
pLed->bLedNoLinkBlinkInProgress = false;
pLed->bLedLinkBlinkInProgress = false;
pLed->bLedScanBlinkInProgress = false;
}
/*Description: */
/* Initialize an LED_871x object. */
void InitLed871x(struct adapter *padapter, struct LED_871x *pLed)
{
pLed->padapter = padapter;
ResetLedStatus(pLed);
timer_setup(&pLed->BlinkTimer, BlinkTimerCallback, 0);
INIT_WORK(&pLed->BlinkWorkItem, BlinkWorkItemCallback);
}
/* */
/* Description: */
/* DeInitialize an LED_871x object. */
/* */
void DeInitLed871x(struct LED_871x *pLed)
{
cancel_work_sync(&pLed->BlinkWorkItem);
del_timer_sync(&pLed->BlinkTimer);
ResetLedStatus(pLed);
}
/* */
/* Description: */
/* Implementation of LED blinking behavior. */
/* It toggle off LED and schedule corresponding timer if necessary. */
/* */
static void SwLedBlink1(struct LED_871x *pLed)
{
struct adapter *padapter = pLed->padapter;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
/* Change LED according to BlinkingLedState specified. */
if (pLed->BlinkingLedState == RTW_LED_ON)
sw_led_on(padapter, pLed);
else
sw_led_off(padapter, pLed);
if (padapter->pwrctrlpriv.rf_pwrstate != rf_on) {
sw_led_off(padapter, pLed);
ResetLedStatus(pLed);
return;
}
switch (pLed->CurrLedState) {
case LED_BLINK_SLOWLY:
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_NORMAL:
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_SCAN:
pLed->BlinkTimes--;
if (pLed->BlinkTimes == 0) {
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_NORMAL;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
pLed->bLedScanBlinkInProgress = false;
} else {
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_BLINK_TXRX:
pLed->BlinkTimes--;
if (pLed->BlinkTimes == 0) {
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_NORMAL;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
pLed->bLedBlinkInProgress = false;
} else {
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /* WPS success */
if (pLed->BlinkingLedState != RTW_LED_ON) {
pLed->bLedLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_NORMAL;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
pLed->bLedWPSBlinkInProgress = false;
} else {
pLed->BlinkingLedState = RTW_LED_OFF;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA));
}
break;
default:
break;
}
}
/* ALPHA, added by chiyoko, 20090106 */
static void SwLedControlMode1(struct adapter *padapter, enum LED_CTL_MODE LedAction)
{
struct led_priv *ledpriv = &padapter->ledpriv;
struct LED_871x *pLed = &ledpriv->sw_led;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
switch (LedAction) {
case LED_CTL_POWER_ON:
case LED_CTL_START_TO_LINK:
case LED_CTL_NO_LINK:
if (pLed->bLedNoLinkBlinkInProgress)
break;
if (pLed->CurrLedState == LED_BLINK_SCAN ||
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_LINK:
if (pLed->bLedLinkBlinkInProgress)
break;
if (pLed->CurrLedState == LED_BLINK_SCAN ||
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_NORMAL;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_SITE_SURVEY:
if (pmlmepriv->LinkDetectInfo.bBusyTraffic &&
check_fwstate(pmlmepriv, _FW_LINKED))
break;
if (pLed->bLedScanBlinkInProgress)
break;
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SCAN;
pLed->BlinkTimes = 24;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_CTL_TX:
case LED_CTL_RX:
if (pLed->bLedBlinkInProgress)
break;
if (pLed->CurrLedState == LED_BLINK_SCAN ||
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
pLed->bLedBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_TXRX;
pLed->BlinkTimes = 2;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
break;
case LED_CTL_START_WPS: /* wait until xinpin finish */
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress)
break;
if (pLed->bLedNoLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_CTL_STOP_WPS:
if (pLed->bLedNoLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress)
del_timer_sync(&pLed->BlinkTimer);
else
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->led_on) {
pLed->BlinkingLedState = RTW_LED_OFF;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer,
jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
if (pLed->bLedWPSBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
if (pLed->led_on)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
mod_timer(&pLed->BlinkTimer, jiffies +
msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = RTW_LED_OFF;
pLed->BlinkingLedState = RTW_LED_OFF;
if (pLed->bLedNoLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
sw_led_off(padapter, pLed);
break;
default:
break;
}
}
void blink_handler(struct LED_871x *pLed)
{
struct adapter *padapter = pLed->padapter;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
SwLedBlink1(pLed);
}
void led_control_8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction)
{
if (padapter->bSurpriseRemoved || padapter->bDriverStopped ||
!padapter->hw_init_completed)
return;
if ((padapter->pwrctrlpriv.rf_pwrstate != rf_on &&
padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) &&
(LedAction == LED_CTL_TX || LedAction == LED_CTL_RX ||
LedAction == LED_CTL_SITE_SURVEY ||
LedAction == LED_CTL_LINK ||
LedAction == LED_CTL_NO_LINK ||
LedAction == LED_CTL_POWER_ON))
return;
SwLedControlMode1(padapter, LedAction);
}

1886
drivers/staging/rtl8188eu/core/rtw_mlme.c
View File

File diff suppressed because it is too large Load Diff

5171
drivers/staging/rtl8188eu/core/rtw_mlme_ext.c
View File

File diff suppressed because it is too large Load Diff

578
drivers/staging/rtl8188eu/core/rtw_pwrctrl.c
View File

@ -1,578 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTW_PWRCTRL_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <usb_ops_linux.h>
#include <linux/usb.h>
static int rtw_hw_suspend(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct net_device *pnetdev = padapter->pnetdev;
if ((!padapter->bup) || (padapter->bDriverStopped) ||
(padapter->bSurpriseRemoved))
goto error_exit;
/* system suspend */
LeaveAllPowerSaveMode(padapter);
mutex_lock(&pwrpriv->mutex_lock);
pwrpriv->bips_processing = true;
/* s1. */
if (pnetdev) {
netif_carrier_off(pnetdev);
netif_tx_stop_all_queues(pnetdev);
}
/* s2. */
rtw_disassoc_cmd(padapter, 500, false);
/* s2-2. indicate disconnect to os */
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
_clr_fwstate_(pmlmepriv, _FW_LINKED);
led_control_8188eu(padapter, LED_CTL_NO_LINK);
rtw_os_indicate_disconnect(padapter);
/* donnot enqueue cmd */
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0);
}
}
/* s2-3. */
rtw_free_assoc_resources(padapter);
/* s2-4. */
rtw_free_network_queue(padapter, true);
rtw_ips_dev_unload(padapter);
pwrpriv->rf_pwrstate = rf_off;
pwrpriv->bips_processing = false;
mutex_unlock(&pwrpriv->mutex_lock);
return 0;
error_exit:
return -1;
}
static int rtw_hw_resume(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct net_device *pnetdev = padapter->pnetdev;
/* system resume */
mutex_lock(&pwrpriv->mutex_lock);
pwrpriv->bips_processing = true;
rtw_reset_drv_sw(padapter);
if (ips_netdrv_open(netdev_priv(pnetdev)) != _SUCCESS) {
mutex_unlock(&pwrpriv->mutex_lock);
goto error_exit;
}
netif_device_attach(pnetdev);
netif_carrier_on(pnetdev);
if (!netif_queue_stopped(pnetdev))
netif_start_queue(pnetdev);
else
netif_wake_queue(pnetdev);
pwrpriv->bkeepfwalive = false;
pwrpriv->brfoffbyhw = false;
pwrpriv->rf_pwrstate = rf_on;
pwrpriv->bips_processing = false;
mutex_unlock(&pwrpriv->mutex_lock);
return 0;
error_exit:
return -1;
}
void ips_enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct xmit_priv *pxmit_priv = &padapter->xmitpriv;
if (padapter->registrypriv.mp_mode == 1)
return;
if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF ||
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF)
return;
mutex_lock(&pwrpriv->mutex_lock);
pwrpriv->bips_processing = true;
/* syn ips_mode with request */
pwrpriv->ips_mode = pwrpriv->ips_mode_req;
pwrpriv->ips_enter_cnts++;
if (rf_off == pwrpriv->change_rfpwrstate) {
pwrpriv->bpower_saving = true;
if (pwrpriv->ips_mode == IPS_LEVEL_2)
pwrpriv->bkeepfwalive = true;
rtw_ips_pwr_down(padapter);
pwrpriv->rf_pwrstate = rf_off;
}
pwrpriv->bips_processing = false;
mutex_unlock(&pwrpriv->mutex_lock);
}
int ips_leave(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
int result = _SUCCESS;
int keyid;
mutex_lock(&pwrpriv->mutex_lock);
if ((pwrpriv->rf_pwrstate == rf_off) && (!pwrpriv->bips_processing)) {
pwrpriv->bips_processing = true;
pwrpriv->change_rfpwrstate = rf_on;
pwrpriv->ips_leave_cnts++;
result = rtw_ips_pwr_up(padapter);
if (result == _SUCCESS)
pwrpriv->rf_pwrstate = rf_on;
if ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_)) {
set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
for (keyid = 0; keyid < 4; keyid++) {
if (pmlmepriv->key_mask & BIT(keyid)) {
if (keyid == psecuritypriv->dot11PrivacyKeyIndex)
result = rtw_set_key(padapter, psecuritypriv, keyid, 1);
else
result = rtw_set_key(padapter, psecuritypriv, keyid, 0);
}
}
}
pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false;
pwrpriv->bpower_saving = false;
}
mutex_unlock(&pwrpriv->mutex_lock);
return result;
}
static bool rtw_pwr_unassociated_idle(struct adapter *adapter)
{
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
if (time_after_eq(adapter->pwrctrlpriv.ips_deny_time, jiffies))
return false;
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_SITE_MONITOR) ||
check_fwstate(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS) ||
check_fwstate(pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE))
return false;
return true;
}
void rtw_ps_processor(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
enum rt_rf_power_state rfpwrstate;
pwrpriv->ps_processing = true;
if (pwrpriv->bips_processing)
goto exit;
if (padapter->pwrctrlpriv.bHWPwrPindetect) {
rfpwrstate = RfOnOffDetect(padapter);
if (rfpwrstate != pwrpriv->rf_pwrstate) {
if (rfpwrstate == rf_off) {
pwrpriv->change_rfpwrstate = rf_off;
pwrpriv->brfoffbyhw = true;
rtw_hw_suspend(padapter);
} else {
pwrpriv->change_rfpwrstate = rf_on;
rtw_hw_resume(padapter);
}
}
pwrpriv->pwr_state_check_cnts++;
}
if (pwrpriv->ips_mode_req == IPS_NONE)
goto exit;
if (!rtw_pwr_unassociated_idle(padapter))
goto exit;
if ((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts % 4) == 0)) {
pwrpriv->change_rfpwrstate = rf_off;
ips_enter(padapter);
}
exit:
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
pwrpriv->ps_processing = false;
}
static void pwr_state_check_handler(struct timer_list *t)
{
struct adapter *padapter =
from_timer(padapter, t,
pwrctrlpriv.pwr_state_check_timer);
rtw_ps_cmd(padapter);
}
/*
*
* Parameters
* padapter
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
*
*/
void rtw_set_rpwm(struct adapter *padapter, u8 pslv)
{
u8 rpwm;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
pslv = PS_STATE(pslv);
if (pwrpriv->btcoex_rfon) {
if (pslv < PS_STATE_S4)
pslv = PS_STATE_S3;
}
if (pwrpriv->rpwm == pslv)
return;
if ((padapter->bSurpriseRemoved) ||
(!padapter->hw_init_completed)) {
pwrpriv->cpwm = PS_STATE_S4;
return;
}
if (padapter->bDriverStopped) {
if (pslv < PS_STATE_S2)
return;
}
rpwm = pslv | pwrpriv->tog;
pwrpriv->rpwm = pslv;
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
pwrpriv->tog += 0x80;
pwrpriv->cpwm = pslv;
}
static u8 PS_RDY_CHECK(struct adapter *padapter)
{
unsigned long curr_time, delta_time;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
curr_time = jiffies;
delta_time = curr_time - pwrpriv->DelayLPSLastTimeStamp;
if (delta_time < LPS_DELAY_TIME)
return false;
if ((!check_fwstate(pmlmepriv, _FW_LINKED)) ||
(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ||
(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)))
return false;
if (pwrpriv->bInSuspend)
return false;
if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X &&
!padapter->securitypriv.binstallGrpkey)
return false;
return true;
}
void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
if (ps_mode > PM_Card_Disable)
return;
if (pwrpriv->pwr_mode == ps_mode) {
if (ps_mode == PS_MODE_ACTIVE)
return;
if ((pwrpriv->smart_ps == smart_ps) &&
(pwrpriv->bcn_ant_mode == bcn_ant_mode))
return;
}
/* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */
if (ps_mode == PS_MODE_ACTIVE) {
if (PS_RDY_CHECK(padapter)) {
pwrpriv->pwr_mode = ps_mode;
pwrpriv->smart_ps = smart_ps;
pwrpriv->bcn_ant_mode = bcn_ant_mode;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
rtw_set_rpwm(padapter, PS_STATE_S2);
}
}
}
/*
* Return:
* 0: Leave OK
* -1: Timeout
* -2: Other error
*/
s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms)
{
unsigned long start_time;
u8 bAwake = false;
s32 err = 0;
start_time = jiffies;
while (1) {
rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
if (bAwake)
break;
if (padapter->bSurpriseRemoved) {
err = -2;
break;
}
if (jiffies_to_msecs(jiffies - start_time) > delay_ms) {
err = -1;
break;
}
msleep(1);
}
return err;
}
/* */
/* Description: */
/* Enter the leisure power save mode. */
/* */
void LPS_Enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
if (!PS_RDY_CHECK(padapter))
return;
if (pwrpriv->bLeisurePs) {
/* Idle for a while if we connect to AP a while ago. */
if (pwrpriv->LpsIdleCount >= 2) { /* 4 Sec */
if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) {
pwrpriv->bpower_saving = true;
/* For Tenda W311R IOT issue */
rtw_set_ps_mode(padapter, pwrpriv->power_mgnt, pwrpriv->smart_ps, 0);
}
} else {
pwrpriv->LpsIdleCount++;
}
}
}
#define LPS_LEAVE_TIMEOUT_MS 100
/* Description: */
/* Leave the leisure power save mode. */
void LPS_Leave(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
if (pwrpriv->bLeisurePs) {
if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0);
if (pwrpriv->pwr_mode == PS_MODE_ACTIVE)
LPS_RF_ON_check(padapter, LPS_LEAVE_TIMEOUT_MS);
}
}
pwrpriv->bpower_saving = false;
}
/* */
/* Description: Leave all power save mode: LPS, FwLPS, IPS if needed. */
/* Move code to function by tynli. 2010.03.26. */
/* */
void LeaveAllPowerSaveMode(struct adapter *Adapter)
{
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_lps_ctrl_wk_cmd(Adapter, LPS_CTRL_LEAVE, 0);
}
void rtw_init_pwrctrl_priv(struct adapter *padapter)
{
struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
mutex_init(&pwrctrlpriv->mutex_lock);
pwrctrlpriv->rf_pwrstate = rf_on;
pwrctrlpriv->ips_enter_cnts = 0;
pwrctrlpriv->ips_leave_cnts = 0;
pwrctrlpriv->bips_processing = false;
pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode;
pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode;
pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL;
pwrctrlpriv->pwr_state_check_cnts = 0;
pwrctrlpriv->bInternalAutoSuspend = false;
pwrctrlpriv->bInSuspend = false;
pwrctrlpriv->bkeepfwalive = false;
pwrctrlpriv->LpsIdleCount = 0;
if (padapter->registrypriv.mp_mode == 1)
pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE;
else
pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt;/* PS_MODE_MIN; */
pwrctrlpriv->bLeisurePs = (pwrctrlpriv->power_mgnt != PS_MODE_ACTIVE);
pwrctrlpriv->rpwm = 0;
pwrctrlpriv->cpwm = PS_STATE_S4;
pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE;
pwrctrlpriv->smart_ps = padapter->registrypriv.smart_ps;
pwrctrlpriv->bcn_ant_mode = 0;
pwrctrlpriv->tog = 0x80;
pwrctrlpriv->btcoex_rfon = false;
timer_setup(&pwrctrlpriv->pwr_state_check_timer,
pwr_state_check_handler, 0);
}
/*
* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend
* @adapter: pointer to struct adapter structure
* @ips_deffer_ms: the ms will prevent from falling into IPS after wakeup
* Return _SUCCESS or _FAIL
*/
int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *caller)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
unsigned long expires;
unsigned long start;
int ret = _SUCCESS;
expires = jiffies + msecs_to_jiffies(ips_deffer_ms);
if (time_before(pwrpriv->ips_deny_time, expires))
pwrpriv->ips_deny_time = jiffies + msecs_to_jiffies(ips_deffer_ms);
start = jiffies;
if (pwrpriv->ps_processing) {
while (pwrpriv->ps_processing &&
jiffies_to_msecs(jiffies - start) <= 3000)
udelay(1500);
}
/* System suspend is not allowed to wakeup */
if ((!pwrpriv->bInternalAutoSuspend) && (pwrpriv->bInSuspend)) {
ret = _FAIL;
goto exit;
}
/* block??? */
if ((pwrpriv->bInternalAutoSuspend) && (padapter->net_closed)) {
ret = _FAIL;
goto exit;
}
/* I think this should be check in IPS, LPS, autosuspend functions... */
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
ret = _SUCCESS;
goto exit;
}
if (rf_off == pwrpriv->rf_pwrstate) {
if (ips_leave(padapter) == _FAIL) {
ret = _FAIL;
goto exit;
}
}
/* TODO: the following checking need to be merged... */
if (padapter->bDriverStopped || !padapter->bup ||
!padapter->hw_init_completed) {
ret = false;
goto exit;
}
exit:
expires = jiffies + msecs_to_jiffies(ips_deffer_ms);
if (time_before(pwrpriv->ips_deny_time, expires))
pwrpriv->ips_deny_time = jiffies + msecs_to_jiffies(ips_deffer_ms);
return ret;
}
int rtw_pm_set_lps(struct adapter *padapter, u8 mode)
{
int ret = 0;
struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
if (mode < PS_MODE_NUM) {
if (pwrctrlpriv->power_mgnt != mode) {
if (mode == PS_MODE_ACTIVE)
LeaveAllPowerSaveMode(padapter);
else
pwrctrlpriv->LpsIdleCount = 2;
pwrctrlpriv->power_mgnt = mode;
pwrctrlpriv->bLeisurePs = (pwrctrlpriv->power_mgnt != PS_MODE_ACTIVE);
}
} else {
ret = -EINVAL;
}
return ret;
}
int rtw_pm_set_ips(struct adapter *padapter, u8 mode)
{
struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
if (mode == IPS_NORMAL || mode == IPS_LEVEL_2) {
rtw_ips_mode_req(pwrctrlpriv, mode);
return 0;
} else if (mode == IPS_NONE) {
rtw_ips_mode_req(pwrctrlpriv, mode);
if ((padapter->bSurpriseRemoved == 0) && (rtw_pwr_wakeup(padapter) == _FAIL))
return -EFAULT;
} else {
return -EINVAL;
}
return 0;
}

1812
drivers/staging/rtl8188eu/core/rtw_recv.c
View File

File diff suppressed because it is too large Load Diff

58
drivers/staging/rtl8188eu/core/rtw_rf.c
View File

@ -1,58 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTW_RF_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
struct ch_freq {
u32 channel;
u32 frequency;
};
static struct ch_freq ch_freq_map[] = {
{1, 2412}, {2, 2417}, {3, 2422}, {4, 2427}, {5, 2432},
{6, 2437}, {7, 2442}, {8, 2447}, {9, 2452}, {10, 2457},
{11, 2462}, {12, 2467}, {13, 2472}, {14, 2484},
/* UNII */
{36, 5180}, {40, 5200}, {44, 5220}, {48, 5240}, {52, 5260},
{56, 5280}, {60, 5300}, {64, 5320}, {149, 5745}, {153, 5765},
{157, 5785}, {161, 5805}, {165, 5825}, {167, 5835}, {169, 5845},
{171, 5855}, {173, 5865},
/* HiperLAN2 */
{100, 5500}, {104, 5520}, {108, 5540}, {112, 5560}, {116, 5580},
{120, 5600}, {124, 5620}, {128, 5640}, {132, 5660}, {136, 5680},
{140, 5700},
/* Japan MMAC */
{34, 5170}, {38, 5190}, {42, 5210}, {46, 5230},
/* Japan */
{184, 4920}, {188, 4940}, {192, 4960}, {196, 4980},
{208, 5040},/* Japan, means J08 */
{212, 5060},/* Japan, means J12 */
{216, 5080},/* Japan, means J16 */
};
static int ch_freq_map_num = ARRAY_SIZE(ch_freq_map);
u32 rtw_ch2freq(u32 channel)
{
u8 i;
u32 freq = 0;
for (i = 0; i < ch_freq_map_num; i++) {
if (channel == ch_freq_map[i].channel) {
freq = ch_freq_map[i].frequency;
break;
}
}
if (i == ch_freq_map_num)
freq = 2412;
return freq;
}

826
drivers/staging/rtl8188eu/core/rtw_security.c
View File

@ -1,826 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTW_SECURITY_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <wifi.h>
#include <osdep_intf.h>
#include <net/lib80211.h>
#include <linux/types.h>
/* WEP related ===== */
#define CRC32_POLY 0x04c11db7
struct arc4context {
u32 x;
u32 y;
u8 state[256];
};
static void arcfour_init(struct arc4context *parc4ctx, u8 *key, u32 key_len)
{
u32 t, u;
u32 keyindex;
u32 stateindex;
u8 *state;
u32 counter;
state = parc4ctx->state;
parc4ctx->x = 0;
parc4ctx->y = 0;
for (counter = 0; counter < 256; counter++)
state[counter] = (u8)counter;
keyindex = 0;
stateindex = 0;
for (counter = 0; counter < 256; counter++) {
t = state[counter];
stateindex = (stateindex + key[keyindex] + t) & 0xff;
u = state[stateindex];
state[stateindex] = (u8)t;
state[counter] = (u8)u;
if (++keyindex >= key_len)
keyindex = 0;
}
}
static u32 arcfour_byte(struct arc4context *parc4ctx)
{
u32 x;
u32 y;
u32 sx, sy;
u8 *state;
state = parc4ctx->state;
x = (parc4ctx->x + 1) & 0xff;
sx = state[x];
y = (sx + parc4ctx->y) & 0xff;
sy = state[y];
parc4ctx->x = x;
parc4ctx->y = y;
state[y] = (u8)sx;
state[x] = (u8)sy;
return state[(sx + sy) & 0xff];
}
static void arcfour_encrypt(struct arc4context *parc4ctx, u8 *dest, u8 *src, u32 len)
{
u32 i;
for (i = 0; i < len; i++)
dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx);
}
/* Need to consider the fragment situation */
void rtw_wep_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
int curfragnum, length;
u8 *pframe;
u8 hw_hdr_offset = 0;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
const int keyindex = psecuritypriv->dot11PrivacyKeyIndex;
void *crypto_private;
struct sk_buff *skb;
struct lib80211_crypto_ops *crypto_ops;
if (!pxmitframe->buf_addr)
return;
if ((pattrib->encrypt != _WEP40_) && (pattrib->encrypt != _WEP104_))
return;
hw_hdr_offset = TXDESC_SIZE +
(pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
pframe = pxmitframe->buf_addr + hw_hdr_offset;
crypto_ops = lib80211_get_crypto_ops("WEP");
if (!crypto_ops)
return;
crypto_private = crypto_ops->init(keyindex);
if (!crypto_private)
return;
if (crypto_ops->set_key(psecuritypriv->dot11DefKey[keyindex].skey,
psecuritypriv->dot11DefKeylen[keyindex], NULL, crypto_private) < 0)
goto free_crypto_private;
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
if (curfragnum + 1 == pattrib->nr_frags)
length = pattrib->last_txcmdsz;
else
length = pxmitpriv->frag_len;
skb = dev_alloc_skb(length);
if (!skb)
goto free_crypto_private;
skb_put_data(skb, pframe, length);
memmove(skb->data + 4, skb->data, pattrib->hdrlen);
skb_pull(skb, 4);
skb_trim(skb, skb->len - 4);
if (crypto_ops->encrypt_mpdu(skb, pattrib->hdrlen, crypto_private)) {
kfree_skb(skb);
goto free_crypto_private;
}
memcpy(pframe, skb->data, skb->len);
pframe += skb->len;
pframe = (u8 *)round_up((size_t)(pframe), 4);
kfree_skb(skb);
}
free_crypto_private:
crypto_ops->deinit(crypto_private);
}
int rtw_wep_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
{
struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
if ((prxattrib->encrypt == _WEP40_) || (prxattrib->encrypt == _WEP104_)) {
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct sk_buff *skb = precvframe->pkt;
u8 *pframe = skb->data;
void *crypto_private = NULL;
int status = _SUCCESS;
const int keyindex = prxattrib->key_index;
struct lib80211_crypto_ops *crypto_ops = lib80211_get_crypto_ops("WEP");
char iv[4], icv[4];
if (!crypto_ops) {
status = _FAIL;
goto exit;
}
memcpy(iv, pframe + prxattrib->hdrlen, 4);
memcpy(icv, pframe + skb->len - 4, 4);
crypto_private = crypto_ops->init(keyindex);
if (!crypto_private) {
status = _FAIL;
goto exit;
}
if (crypto_ops->set_key(psecuritypriv->dot11DefKey[keyindex].skey,
psecuritypriv->dot11DefKeylen[keyindex], NULL, crypto_private) < 0) {
status = _FAIL;
goto exit;
}
if (crypto_ops->decrypt_mpdu(skb, prxattrib->hdrlen, crypto_private)) {
status = _FAIL;
goto exit;
}
memmove(pframe, pframe + 4, prxattrib->hdrlen);
skb_push(skb, 4);
skb_put(skb, 4);
memcpy(pframe + prxattrib->hdrlen, iv, 4);
memcpy(pframe + skb->len - 4, icv, 4);
exit:
if (crypto_ops && crypto_private)
crypto_ops->deinit(crypto_private);
return status;
}
return _FAIL;
}
/* 3 ===== TKIP related ===== */
static u32 secmicgetuint32(u8 *p)
/* Convert from Byte[] to Us3232 in a portable way */
{
s32 i;
u32 res = 0;
for (i = 0; i < 4; i++)
res |= ((u32)(*p++)) << (8 * i);
return res;
}
static void secmicputuint32(u8 *p, u32 val)
/* Convert from Us3232 to Byte[] in a portable way */
{
long i;
for (i = 0; i < 4; i++) {
*p++ = (u8)(val & 0xff);
val >>= 8;
}
}
static void secmicclear(struct mic_data *pmicdata)
{
/* Reset the state to the empty message. */
pmicdata->L = pmicdata->K0;
pmicdata->R = pmicdata->K1;
pmicdata->nBytesInM = 0;
pmicdata->M = 0;
}
void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key)
{
/* Set the key */
pmicdata->K0 = secmicgetuint32(key);
pmicdata->K1 = secmicgetuint32(key + 4);
/* and reset the message */
secmicclear(pmicdata);
}
void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b)
{
/* Append the byte to our word-sized buffer */
pmicdata->M |= ((unsigned long)b) << (8 * pmicdata->nBytesInM);
pmicdata->nBytesInM++;
/* Process the word if it is full. */
if (pmicdata->nBytesInM >= 4) {
pmicdata->L ^= pmicdata->M;
pmicdata->R ^= ROL32(pmicdata->L, 17);
pmicdata->L += pmicdata->R;
pmicdata->R ^= ((pmicdata->L & 0xff00ff00) >> 8) | ((pmicdata->L & 0x00ff00ff) << 8);
pmicdata->L += pmicdata->R;
pmicdata->R ^= ROL32(pmicdata->L, 3);
pmicdata->L += pmicdata->R;
pmicdata->R ^= ROR32(pmicdata->L, 2);
pmicdata->L += pmicdata->R;
/* Clear the buffer */
pmicdata->M = 0;
pmicdata->nBytesInM = 0;
}
}
void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nbytes)
{
/* This is simple */
while (nbytes > 0) {
rtw_secmicappendbyte(pmicdata, *src++);
nbytes--;
}
}
void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst)
{
/* Append the minimum padding */
rtw_secmicappendbyte(pmicdata, 0x5a);
rtw_secmicappendbyte(pmicdata, 0);
rtw_secmicappendbyte(pmicdata, 0);
rtw_secmicappendbyte(pmicdata, 0);
rtw_secmicappendbyte(pmicdata, 0);
/* and then zeroes until the length is a multiple of 4 */
while (pmicdata->nBytesInM != 0)
rtw_secmicappendbyte(pmicdata, 0);
/* The appendByte function has already computed the result. */
secmicputuint32(dst, pmicdata->L);
secmicputuint32(dst + 4, pmicdata->R);
/* Reset to the empty message. */
secmicclear(pmicdata);
}
void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len, u8 *mic_code, u8 pri)
{
struct mic_data micdata;
u8 priority[4] = {0x0, 0x0, 0x0, 0x0};
rtw_secmicsetkey(&micdata, key);
priority[0] = pri;
/* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */
if (header[1] & 1) { /* ToDS == 1 */
rtw_secmicappend(&micdata, &header[16], 6); /* DA */
if (header[1] & 2) /* From Ds == 1 */
rtw_secmicappend(&micdata, &header[24], 6);
else
rtw_secmicappend(&micdata, &header[10], 6);
} else { /* ToDS == 0 */
rtw_secmicappend(&micdata, &header[4], 6); /* DA */
if (header[1] & 2) /* From Ds == 1 */
rtw_secmicappend(&micdata, &header[16], 6);
else
rtw_secmicappend(&micdata, &header[10], 6);
}
rtw_secmicappend(&micdata, &priority[0], 4);
rtw_secmicappend(&micdata, data, data_len);
rtw_secgetmic(&micdata, mic_code);
}
/* macros for extraction/creation of unsigned char/unsigned short values */
#define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15))
#define Lo8(v16) ((u8)((v16) & 0x00FF))
#define Hi8(v16) ((u8)(((v16) >> 8) & 0x00FF))
#define Lo16(v32) ((u16)((v32) & 0xFFFF))
#define Hi16(v32) ((u16)(((v32) >> 16) & 0xFFFF))
#define Mk16(hi, lo) ((lo) ^ (((u16)(hi)) << 8))
/* select the Nth 16-bit word of the temporal key unsigned char array TK[] */
#define TK16(N) Mk16(tk[2 * (N) + 1], tk[2 * (N)])
/* S-box lookup: 16 bits --> 16 bits */
#define _S_(v16) (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)])
/* fixed algorithm "parameters" */
#define PHASE1_LOOP_CNT 8 /* this needs to be "big enough" */
#define TA_SIZE 6 /* 48-bit transmitter address */
#define TK_SIZE 16 /* 128-bit temporal key */
#define P1K_SIZE 10 /* 80-bit Phase1 key */
#define RC4_KEY_SIZE 16 /* 128-bit RC4KEY (104 bits unknown) */
/* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */
static const unsigned short Sbox1[2][256] = { /* Sbox for hash (can be in ROM) */
{
0xC6A5, 0xF884, 0xEE99, 0xF68D, 0xFF0D, 0xD6BD, 0xDEB1, 0x9154,
0x6050, 0x0203, 0xCEA9, 0x567D, 0xE719, 0xB562, 0x4DE6, 0xEC9A,
0x8F45, 0x1F9D, 0x8940, 0xFA87, 0xEF15, 0xB2EB, 0x8EC9, 0xFB0B,
0x41EC, 0xB367, 0x5FFD, 0x45EA, 0x23BF, 0x53F7, 0xE496, 0x9B5B,
0x75C2, 0xE11C, 0x3DAE, 0x4C6A, 0x6C5A, 0x7E41, 0xF502, 0x834F,
0x685C, 0x51F4, 0xD134, 0xF908, 0xE293, 0xAB73, 0x6253, 0x2A3F,
0x080C, 0x9552, 0x4665, 0x9D5E, 0x3028, 0x37A1, 0x0A0F, 0x2FB5,
0x0E09, 0x2436, 0x1B9B, 0xDF3D, 0xCD26, 0x4E69, 0x7FCD, 0xEA9F,
0x121B, 0x1D9E, 0x5874, 0x342E, 0x362D, 0xDCB2, 0xB4EE, 0x5BFB,
0xA4F6, 0x764D, 0xB761, 0x7DCE, 0x527B, 0xDD3E, 0x5E71, 0x1397,
0xA6F5, 0xB968, 0x0000, 0xC12C, 0x4060, 0xE31F, 0x79C8, 0xB6ED,
0xD4BE, 0x8D46, 0x67D9, 0x724B, 0x94DE, 0x98D4, 0xB0E8, 0x854A,
0xBB6B, 0xC52A, 0x4FE5, 0xED16, 0x86C5, 0x9AD7, 0x6655, 0x1194,
0x8ACF, 0xE910, 0x0406, 0xFE81, 0xA0F0, 0x7844, 0x25BA, 0x4BE3,
0xA2F3, 0x5DFE, 0x80C0, 0x058A, 0x3FAD, 0x21BC, 0x7048, 0xF104,
0x63DF, 0x77C1, 0xAF75, 0x4263, 0x2030, 0xE51A, 0xFD0E, 0xBF6D,
0x814C, 0x1814, 0x2635, 0xC32F, 0xBEE1, 0x35A2, 0x88CC, 0x2E39,
0x9357, 0x55F2, 0xFC82, 0x7A47, 0xC8AC, 0xBAE7, 0x322B, 0xE695,
0xC0A0, 0x1998, 0x9ED1, 0xA37F, 0x4466, 0x547E, 0x3BAB, 0x0B83,
0x8CCA, 0xC729, 0x6BD3, 0x283C, 0xA779, 0xBCE2, 0x161D, 0xAD76,
0xDB3B, 0x6456, 0x744E, 0x141E, 0x92DB, 0x0C0A, 0x486C, 0xB8E4,
0x9F5D, 0xBD6E, 0x43EF, 0xC4A6, 0x39A8, 0x31A4, 0xD337, 0xF28B,
0xD532, 0x8B43, 0x6E59, 0xDAB7, 0x018C, 0xB164, 0x9CD2, 0x49E0,
0xD8B4, 0xACFA, 0xF307, 0xCF25, 0xCAAF, 0xF48E, 0x47E9, 0x1018,
0x6FD5, 0xF088, 0x4A6F, 0x5C72, 0x3824, 0x57F1, 0x73C7, 0x9751,
0xCB23, 0xA17C, 0xE89C, 0x3E21, 0x96DD, 0x61DC, 0x0D86, 0x0F85,
0xE090, 0x7C42, 0x71C4, 0xCCAA, 0x90D8, 0x0605, 0xF701, 0x1C12,
0xC2A3, 0x6A5F, 0xAEF9, 0x69D0, 0x1791, 0x9958, 0x3A27, 0x27B9,
0xD938, 0xEB13, 0x2BB3, 0x2233, 0xD2BB, 0xA970, 0x0789, 0x33A7,
0x2DB6, 0x3C22, 0x1592, 0xC920, 0x8749, 0xAAFF, 0x5078, 0xA57A,
0x038F, 0x59F8, 0x0980, 0x1A17, 0x65DA, 0xD731, 0x84C6, 0xD0B8,
0x82C3, 0x29B0, 0x5A77, 0x1E11, 0x7BCB, 0xA8FC, 0x6DD6, 0x2C3A,
},
{ /* second half of table is unsigned char-reversed version of first! */
0xA5C6, 0x84F8, 0x99EE, 0x8DF6, 0x0DFF, 0xBDD6, 0xB1DE, 0x5491,
0x5060, 0x0302, 0xA9CE, 0x7D56, 0x19E7, 0x62B5, 0xE64D, 0x9AEC,
0x458F, 0x9D1F, 0x4089, 0x87FA, 0x15EF, 0xEBB2, 0xC98E, 0x0BFB,
0xEC41, 0x67B3, 0xFD5F, 0xEA45, 0xBF23, 0xF753, 0x96E4, 0x5B9B,
0xC275, 0x1CE1, 0xAE3D, 0x6A4C, 0x5A6C, 0x417E, 0x02F5, 0x4F83,
0x5C68, 0xF451, 0x34D1, 0x08F9, 0x93E2, 0x73AB, 0x5362, 0x3F2A,
0x0C08, 0x5295, 0x6546, 0x5E9D, 0x2830, 0xA137, 0x0F0A, 0xB52F,
0x090E, 0x3624, 0x9B1B, 0x3DDF, 0x26CD, 0x694E, 0xCD7F, 0x9FEA,
0x1B12, 0x9E1D, 0x7458, 0x2E34, 0x2D36, 0xB2DC, 0xEEB4, 0xFB5B,
0xF6A4, 0x4D76, 0x61B7, 0xCE7D, 0x7B52, 0x3EDD, 0x715E, 0x9713,
0xF5A6, 0x68B9, 0x0000, 0x2CC1, 0x6040, 0x1FE3, 0xC879, 0xEDB6,
0xBED4, 0x468D, 0xD967, 0x4B72, 0xDE94, 0xD498, 0xE8B0, 0x4A85,
0x6BBB, 0x2AC5, 0xE54F, 0x16ED, 0xC586, 0xD79A, 0x5566, 0x9411,
0xCF8A, 0x10E9, 0x0604, 0x81FE, 0xF0A0, 0x4478, 0xBA25, 0xE34B,
0xF3A2, 0xFE5D, 0xC080, 0x8A05, 0xAD3F, 0xBC21, 0x4870, 0x04F1,
0xDF63, 0xC177, 0x75AF, 0x6342, 0x3020, 0x1AE5, 0x0EFD, 0x6DBF,
0x4C81, 0x1418, 0x3526, 0x2FC3, 0xE1BE, 0xA235, 0xCC88, 0x392E,
0x5793, 0xF255, 0x82FC, 0x477A, 0xACC8, 0xE7BA, 0x2B32, 0x95E6,
0xA0C0, 0x9819, 0xD19E, 0x7FA3, 0x6644, 0x7E54, 0xAB3B, 0x830B,
0xCA8C, 0x29C7, 0xD36B, 0x3C28, 0x79A7, 0xE2BC, 0x1D16, 0x76AD,
0x3BDB, 0x5664, 0x4E74, 0x1E14, 0xDB92, 0x0A0C, 0x6C48, 0xE4B8,
0x5D9F, 0x6EBD, 0xEF43, 0xA6C4, 0xA839, 0xA431, 0x37D3, 0x8BF2,
0x32D5, 0x438B, 0x596E, 0xB7DA, 0x8C01, 0x64B1, 0xD29C, 0xE049,
0xB4D8, 0xFAAC, 0x07F3, 0x25CF, 0xAFCA, 0x8EF4, 0xE947, 0x1810,
0xD56F, 0x88F0, 0x6F4A, 0x725C, 0x2438, 0xF157, 0xC773, 0x5197,
0x23CB, 0x7CA1, 0x9CE8, 0x213E, 0xDD96, 0xDC61, 0x860D, 0x850F,
0x90E0, 0x427C, 0xC471, 0xAACC, 0xD890, 0x0506, 0x01F7, 0x121C,
0xA3C2, 0x5F6A, 0xF9AE, 0xD069, 0x9117, 0x5899, 0x273A, 0xB927,
0x38D9, 0x13EB, 0xB32B, 0x3322, 0xBBD2, 0x70A9, 0x8907, 0xA733,
0xB62D, 0x223C, 0x9215, 0x20C9, 0x4987, 0xFFAA, 0x7850, 0x7AA5,
0x8F03, 0xF859, 0x8009, 0x171A, 0xDA65, 0x31D7, 0xC684, 0xB8D0,
0xC382, 0xB029, 0x775A, 0x111E, 0xCB7B, 0xFCA8, 0xD66D, 0x3A2C,
}
};
/**
* phase1() - generate P1K, given TA, TK, IV32
* @p1k: placeholder for the returned phase 1 key
* @tk: temporal key [128 bits]
* @ta: transmitter's MAC address [ 48 bits]
* @iv32: upper 32 bits of IV [ 32 bits]
*
* This function only needs to be called every 2**16 packets,
* although in theory it could be called every packet.
*
* Return: p1k[] - Phase 1 key [ 80 bits]
*/
static void phase1(u16 *p1k, const u8 *tk, const u8 *ta, u32 iv32)
{
int i;
/* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */
p1k[0] = Lo16(iv32);
p1k[1] = Hi16(iv32);
p1k[2] = Mk16(ta[1], ta[0]); /* use TA[] as little-endian */
p1k[3] = Mk16(ta[3], ta[2]);
p1k[4] = Mk16(ta[5], ta[4]);
/* Now compute an unbalanced Feistel cipher with 80-bit block */
/* size on the 80-bit block P1K[], using the 128-bit key TK[] */
for (i = 0; i < PHASE1_LOOP_CNT; i++) { /* Each add operation here is mod 2**16 */
p1k[0] += _S_(p1k[4] ^ TK16((i & 1) + 0));
p1k[1] += _S_(p1k[0] ^ TK16((i & 1) + 2));
p1k[2] += _S_(p1k[1] ^ TK16((i & 1) + 4));
p1k[3] += _S_(p1k[2] ^ TK16((i & 1) + 6));
p1k[4] += _S_(p1k[3] ^ TK16((i & 1) + 0));
p1k[4] += (unsigned short)i; /* avoid "slide attacks" */
}
}
/**
* phase2() - generate RC4KEY, given TK, P1K, IV16
* @rc4key: Placeholder for the returned key
* @tk: Temporal key [128 bits]
* @p1k: Phase 1 output key [ 80 bits]
* @iv16: low 16 bits of IV counter [ 16 bits]
*
* The value {TA, IV32, IV16} for Phase1/Phase2 must be unique
* across all packets using the same key TK value. Then, for a
* given value of TK[], this TKIP48 construction guarantees that
* the final RC4KEY value is unique across all packets.
*
* Suggested implementation optimization: if PPK[] is "overlaid"
* appropriately on RC4KEY[], there is no need for the final
* for loop below that copies the PPK[] result into RC4KEY[].
*
* Return: rc4key[] - the key used to encrypt the packet [128 bits]
*/
static void phase2(u8 *rc4key, const u8 *tk, const u16 *p1k, u16 iv16)
{
int i;
u16 PPK[6]; /* temporary key for mixing */
/* Note: all adds in the PPK[] equations below are mod 2**16 */
for (i = 0; i < 5; i++)
PPK[i] = p1k[i]; /* first, copy P1K to PPK */
PPK[5] = p1k[4] + iv16; /* next, add in IV16 */
/* Bijective non-linear mixing of the 96 bits of PPK[0..5] */
PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */
PPK[1] += _S_(PPK[0] ^ TK16(1));
PPK[2] += _S_(PPK[1] ^ TK16(2));
PPK[3] += _S_(PPK[2] ^ TK16(3));
PPK[4] += _S_(PPK[3] ^ TK16(4));
PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */
/* Final sweep: bijective, "linear". Rotates kill LSB correlations */
PPK[0] += RotR1(PPK[5] ^ TK16(6));
PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */
PPK[2] += RotR1(PPK[1]);
PPK[3] += RotR1(PPK[2]);
PPK[4] += RotR1(PPK[3]);
PPK[5] += RotR1(PPK[4]);
/* Note: At this point, for a given key TK[0..15], the 96-bit output */
/* value PPK[0..5] is guaranteed to be unique, as a function */
/* of the 96-bit "input" value {TA, IV32, IV16}. That is, P1K */
/* is now a keyed permutation of {TA, IV32, IV16}. */
/* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key */
rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */
rc4key[1] = (Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */
rc4key[2] = Lo8(iv16);
rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1);
/* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */
for (i = 0; i < 6; i++) {
rc4key[4 + 2 * i] = Lo8(PPK[i]);
rc4key[5 + 2 * i] = Hi8(PPK[i]);
}
}
/* The hlen isn't include the IV */
u32 rtw_tkip_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
{ /* exclude ICV */
u16 pnl;
u32 pnh;
u8 rc4key[16];
u8 ttkey[16];
union {
__le32 f0;
u8 f1[4];
} crc;
u8 hw_hdr_offset = 0;
struct arc4context mycontext;
int curfragnum, length;
u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
struct sta_info *stainfo;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
u32 res = _SUCCESS;
if (!pxmitframe->buf_addr)
return _FAIL;
hw_hdr_offset = TXDESC_SIZE +
(pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
pframe = pxmitframe->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if (pattrib->encrypt == _TKIP_) {
if (pattrib->psta)
stainfo = pattrib->psta;
else
stainfo = rtw_get_stainfo(&padapter->stapriv, &pattrib->ra[0]);
if (stainfo) {
if (is_multicast_ether_addr(pattrib->ra))
prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey;
else
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
iv = pframe + pattrib->hdrlen;
payload = pframe + pattrib->iv_len + pattrib->hdrlen;
GET_TKIP_PN(iv, dot11txpn);
pnl = (u16)(dot11txpn.val);
pnh = (u32)(dot11txpn.val >> 16);
phase1((u16 *)&ttkey[0], prwskey, &pattrib->ta[0], pnh);
phase2(&rc4key[0], prwskey, (u16 *)&ttkey[0], pnl);
if ((curfragnum + 1) == pattrib->nr_frags) { /* 4 the last fragment */
length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload + length, crc.f1, 4);
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload + length, crc.f1, 4);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)round_up((size_t)(pframe), 4);
}
}
} else {
res = _FAIL;
}
}
return res;
}
/* The hlen isn't include the IV */
u32 rtw_tkip_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
{ /* exclude ICV */
u16 pnl;
u32 pnh;
u8 rc4key[16];
u8 ttkey[16];
union {
__le32 f0;
u8 f1[4];
} crc;
struct arc4context mycontext;
int length;
u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
struct sta_info *stainfo;
struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
u32 res = _SUCCESS;
pframe = (unsigned char *)precvframe->pkt->data;
/* 4 start to decrypt recvframe */
if (prxattrib->encrypt == _TKIP_) {
stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
if (stainfo) {
if (is_multicast_ether_addr(prxattrib->ra)) {
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
goto exit;
}
prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey;
} else {
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
}
iv = pframe + prxattrib->hdrlen;
payload = pframe + prxattrib->iv_len + prxattrib->hdrlen;
length = precvframe->pkt->len - prxattrib->hdrlen - prxattrib->iv_len;
GET_TKIP_PN(iv, dot11txpn);
pnl = (u16)(dot11txpn.val);
pnh = (u32)(dot11txpn.val >> 16);
phase1((u16 *)&ttkey[0], prwskey, &prxattrib->ta[0], pnh);
phase2(&rc4key[0], prwskey, (unsigned short *)&ttkey[0], pnl);
/* 4 decrypt payload include icv */
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length - 4));
if (crc.f1[3] != payload[length - 1] ||
crc.f1[2] != payload[length - 2] ||
crc.f1[1] != payload[length - 3] ||
crc.f1[0] != payload[length - 4])
res = _FAIL;
} else {
res = _FAIL;
}
}
exit:
return res;
}
u32 rtw_aes_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
int curfragnum, length;
u8 *pframe; /* *payload,*iv */
u8 hw_hdr_offset = 0;
struct sta_info *stainfo;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
u32 res = _SUCCESS;
void *crypto_private;
struct sk_buff *skb;
struct lib80211_crypto_ops *crypto_ops;
const int key_idx = is_multicast_ether_addr(pattrib->ra) ? psecuritypriv->dot118021XGrpKeyid : 0;
const int key_length = 16;
u8 *key;
if (!pxmitframe->buf_addr)
return _FAIL;
hw_hdr_offset = TXDESC_SIZE +
(pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
pframe = pxmitframe->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if (pattrib->encrypt != _AES_)
return res;
if (pattrib->psta)
stainfo = pattrib->psta;
else
stainfo = rtw_get_stainfo(&padapter->stapriv, &pattrib->ra[0]);
if (!stainfo)
return _FAIL;
crypto_ops = lib80211_get_crypto_ops("CCMP");
if (is_multicast_ether_addr(pattrib->ra))
key = psecuritypriv->dot118021XGrpKey[key_idx].skey;
else
key = stainfo->dot118021x_UncstKey.skey;
if (!crypto_ops) {
res = _FAIL;
goto exit;
}
crypto_private = crypto_ops->init(key_idx);
if (!crypto_private) {
res = _FAIL;
goto exit;
}
if (crypto_ops->set_key(key, key_length, NULL, crypto_private) < 0) {
res = _FAIL;
goto exit_crypto_ops_deinit;
}
for (curfragnum = 0; curfragnum < pattrib->nr_frags; curfragnum++) {
if (curfragnum + 1 == pattrib->nr_frags)
length = pattrib->last_txcmdsz;
else
length = pxmitpriv->frag_len;
skb = dev_alloc_skb(length);
if (!skb) {
res = _FAIL;
goto exit_crypto_ops_deinit;
}
skb_put_data(skb, pframe, length);
memmove(skb->data + pattrib->iv_len, skb->data, pattrib->hdrlen);
skb_pull(skb, pattrib->iv_len);
skb_trim(skb, skb->len - pattrib->icv_len);
if (crypto_ops->encrypt_mpdu(skb, pattrib->hdrlen, crypto_private)) {
kfree_skb(skb);
res = _FAIL;
goto exit_crypto_ops_deinit;
}
memcpy(pframe, skb->data, skb->len);
pframe += skb->len;
pframe = (u8 *)round_up((size_t)(pframe), 8);
kfree_skb(skb);
}
exit_crypto_ops_deinit:
crypto_ops->deinit(crypto_private);
exit:
return res;
}
u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
{
struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
u32 res = _SUCCESS;
/* 4 start to encrypt each fragment */
if (prxattrib->encrypt == _AES_) {
struct sta_info *stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
if (stainfo) {
int key_idx;
const int key_length = 16, iv_len = 8, icv_len = 8;
struct sk_buff *skb = precvframe->pkt;
void *crypto_private = NULL;
u8 *key, *pframe = skb->data;
struct lib80211_crypto_ops *crypto_ops = lib80211_get_crypto_ops("CCMP");
struct security_priv *psecuritypriv = &padapter->securitypriv;
char iv[8], icv[8];
if (is_multicast_ether_addr(prxattrib->ra)) {
/* in concurrent we should use sw descrypt in group key, so we remove this message */
if (!psecuritypriv->binstallGrpkey) {
res = _FAIL;
goto exit;
}
key_idx = psecuritypriv->dot118021XGrpKeyid;
key = psecuritypriv->dot118021XGrpKey[key_idx].skey;
} else {
key_idx = 0;
key = stainfo->dot118021x_UncstKey.skey;
}
if (!crypto_ops) {
res = _FAIL;
goto exit_lib80211_ccmp;
}
memcpy(iv, pframe + prxattrib->hdrlen, iv_len);
memcpy(icv, pframe + skb->len - icv_len, icv_len);
crypto_private = crypto_ops->init(key_idx);
if (!crypto_private) {
res = _FAIL;
goto exit_lib80211_ccmp;
}
if (crypto_ops->set_key(key, key_length, NULL, crypto_private) < 0) {
res = _FAIL;
goto exit_lib80211_ccmp;
}
if (crypto_ops->decrypt_mpdu(skb, prxattrib->hdrlen, crypto_private)) {
res = _FAIL;
goto exit_lib80211_ccmp;
}
memmove(pframe, pframe + iv_len, prxattrib->hdrlen);
skb_push(skb, iv_len);
skb_put(skb, icv_len);
memcpy(pframe + prxattrib->hdrlen, iv, iv_len);
memcpy(pframe + skb->len - icv_len, icv, icv_len);
exit_lib80211_ccmp:
if (crypto_ops && crypto_private)
crypto_ops->deinit(crypto_private);
} else {
res = _FAIL;
}
}
exit:
return res;
}

21
drivers/staging/rtl8188eu/core/rtw_sreset.c
View File

@ -1,21 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <rtw_sreset.h>
#include <usb_ops_linux.h>
void rtw_hal_sreset_init(struct adapter *padapter)
{
struct sreset_priv *psrtpriv = &padapter->HalData->srestpriv;
psrtpriv->wifi_error_status = WIFI_STATUS_SUCCESS;
}
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status)
{
padapter->HalData->srestpriv.wifi_error_status = status;
}

479
drivers/staging/rtl8188eu/core/rtw_sta_mgt.c
View File

@ -1,479 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTW_STA_MGT_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include <mlme_osdep.h>
#include <sta_info.h>
#include <linux/vmalloc.h>
static void _rtw_init_stainfo(struct sta_info *psta)
{
memset((u8 *)psta, 0, sizeof(struct sta_info));
spin_lock_init(&psta->lock);
INIT_LIST_HEAD(&psta->list);
INIT_LIST_HEAD(&psta->hash_list);
_rtw_init_queue(&psta->sleep_q);
psta->sleepq_len = 0;
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
#ifdef CONFIG_88EU_AP_MODE
INIT_LIST_HEAD(&psta->asoc_list);
INIT_LIST_HEAD(&psta->auth_list);
psta->expire_to = 0;
psta->flags = 0;
psta->capability = 0;
psta->bpairwise_key_installed = false;
psta->nonerp_set = 0;
psta->no_short_slot_time_set = 0;
psta->no_short_preamble_set = 0;
psta->no_ht_gf_set = 0;
psta->no_ht_set = 0;
psta->ht_20mhz_set = 0;
psta->under_exist_checking = 0;
psta->keep_alive_trycnt = 0;
#endif /* CONFIG_88EU_AP_MODE */
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
{
struct sta_info *psta;
s32 i;
pstapriv->pallocated_stainfo_buf = vzalloc(sizeof(struct sta_info) * NUM_STA + 4);
if (!pstapriv->pallocated_stainfo_buf)
return _FAIL;
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((size_t)(pstapriv->pallocated_stainfo_buf) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
spin_lock_init(&pstapriv->sta_hash_lock);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for (i = 0; i < NUM_STA; i++) {
_rtw_init_stainfo(psta);
INIT_LIST_HEAD(&pstapriv->sta_hash[i]);
list_add_tail(&psta->list,
get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_88EU_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
INIT_LIST_HEAD(&pstapriv->asoc_list);
INIT_LIST_HEAD(&pstapriv->auth_list);
spin_lock_init(&pstapriv->asoc_list_lock);
spin_lock_init(&pstapriv->auth_list_lock);
pstapriv->asoc_list_cnt = 0;
pstapriv->auth_list_cnt = 0;
pstapriv->auth_to = 3; /* 3*2 = 6 sec */
pstapriv->assoc_to = 3;
pstapriv->expire_to = 3; /* 3*2 = 6 sec */
pstapriv->max_num_sta = NUM_STA;
#endif
return _SUCCESS;
}
inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta)
{
int offset = (((u8 *)sta) - stapriv->pstainfo_buf) / sizeof(struct sta_info);
return offset;
}
inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset)
{
return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info));
}
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
{
struct list_head *phead, *plist;
struct sta_info *psta = NULL;
struct recv_reorder_ctrl *preorder_ctrl;
int index;
if (!pstapriv)
return _SUCCESS;
/* delete all reordering_ctrl_timer */
spin_lock_bh(&pstapriv->sta_hash_lock);
for (index = 0; index < NUM_STA; index++) {
phead = &pstapriv->sta_hash[index];
list_for_each(plist, phead) {
int i;
psta = list_entry(plist, struct sta_info, hash_list);
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
}
}
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
vfree(pstapriv->pallocated_stainfo_buf);
return _SUCCESS;
}
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
s32 index;
struct list_head *phash_list;
struct sta_info *psta;
struct __queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
pfree_sta_queue = &pstapriv->free_sta_queue;
spin_lock_bh(&pfree_sta_queue->lock);
psta = list_first_entry_or_null(&pfree_sta_queue->queue,
struct sta_info, list);
if (!psta) {
spin_unlock_bh(&pfree_sta_queue->lock);
return NULL;
}
list_del_init(&psta->list);
spin_unlock_bh(&pfree_sta_queue->lock);
_rtw_init_stainfo(psta);
memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
if (index >= NUM_STA)
return NULL;
phash_list = &pstapriv->sta_hash[index];
spin_lock_bh(&pstapriv->sta_hash_lock);
list_add_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count++;
spin_unlock_bh(&pstapriv->sta_hash_lock);
/* Commented by Albert 2009/08/13
* For the SMC router, the sequence number of first packet of
* WPS handshake will be 0. In this case, this packet will be
* dropped by recv_decache function if we use the 0x00 as the
* default value for tid_rxseq variable. So, we initialize the
* tid_rxseq variable as the 0xffff.
*/
for (i = 0; i < 16; i++)
memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i],
&wRxSeqInitialValue, 2);
init_addba_retry_timer(pstapriv->padapter, psta);
/* for A-MPDU Rx reordering buffer control */
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
preorder_ctrl->padapter = pstapriv->padapter;
preorder_ctrl->enable = false;
preorder_ctrl->indicate_seq = 0xffff;
preorder_ctrl->wend_b = 0xffff;
preorder_ctrl->wsize_b = 64;/* 64; */
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
/* init for DM */
psta->rssi_stat.UndecoratedSmoothedPWDB = -1;
psta->rssi_stat.UndecoratedSmoothedCCK = -1;
/* init for the sequence number of received management frame */
psta->RxMgmtFrameSeqNum = 0xffff;
return psta;
}
/* using pstapriv->sta_hash_lock to protect */
u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta)
{
int i;
struct __queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
struct sta_xmit_priv *pstaxmitpriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
if (!psta)
goto exit;
pfree_sta_queue = &pstapriv->free_sta_queue;
pstaxmitpriv = &psta->sta_xmitpriv;
spin_lock_bh(&pxmitpriv->lock);
rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
psta->sleepq_len = 0;
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
list_del_init(&pstaxmitpriv->vo_q.tx_pending);
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
list_del_init(&pstaxmitpriv->vi_q.tx_pending);
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
list_del_init(&pstaxmitpriv->bk_q.tx_pending);
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
list_del_init(&pstaxmitpriv->be_q.tx_pending);
spin_unlock_bh(&pxmitpriv->lock);
list_del_init(&psta->hash_list);
pstapriv->asoc_sta_count--;
/* re-init sta_info; 20061114 */
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
del_timer_sync(&psta->addba_retry_timer);
/* for A-MPDU Rx reordering buffer control, cancel
* reordering_ctrl_timer
*/
for (i = 0; i < 16; i++) {
struct list_head *phead, *plist;
struct recv_frame *prframe;
struct __queue *ppending_recvframe_queue;
struct __queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
preorder_ctrl = &psta->recvreorder_ctrl[i];
del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
spin_lock_bh(&ppending_recvframe_queue->lock);
phead = get_list_head(ppending_recvframe_queue);
plist = phead->next;
while (!list_empty(phead)) {
prframe = container_of(plist, struct recv_frame, list);
plist = plist->next;
list_del_init(&prframe->list);
rtw_free_recvframe(prframe, pfree_recv_queue);
}
spin_unlock_bh(&ppending_recvframe_queue->lock);
}
if (!(psta->state & WIFI_AP_STATE))
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, false);
#ifdef CONFIG_88EU_AP_MODE
spin_lock_bh(&pstapriv->auth_list_lock);
if (!list_empty(&psta->auth_list)) {
list_del_init(&psta->auth_list);
pstapriv->auth_list_cnt--;
}
spin_unlock_bh(&pstapriv->auth_list_lock);
psta->expire_to = 0;
psta->sleepq_ac_len = 0;
psta->qos_info = 0;
psta->max_sp_len = 0;
psta->uapsd_bk = 0;
psta->uapsd_be = 0;
psta->uapsd_vi = 0;
psta->uapsd_vo = 0;
psta->has_legacy_ac = 0;
pstapriv->sta_dz_bitmap &= ~BIT(psta->aid);
pstapriv->tim_bitmap &= ~BIT(psta->aid);
if ((psta->aid > 0) && (pstapriv->sta_aid[psta->aid - 1] == psta)) {
pstapriv->sta_aid[psta->aid - 1] = NULL;
psta->aid = 0;
}
psta->under_exist_checking = 0;
#endif /* CONFIG_88EU_AP_MODE */
spin_lock_bh(&pfree_sta_queue->lock);
list_add_tail(&psta->list, get_list_head(pfree_sta_queue));
spin_unlock_bh(&pfree_sta_queue->lock);
exit:
return _SUCCESS;
}
/* free all stainfo which in sta_hash[all] */
void rtw_free_all_stainfo(struct adapter *padapter)
{
struct list_head *phead;
s32 index;
struct sta_info *psta, *temp;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info *pbcmc_stainfo = rtw_get_bcmc_stainfo(padapter);
if (pstapriv->asoc_sta_count == 1)
return;
spin_lock_bh(&pstapriv->sta_hash_lock);
for (index = 0; index < NUM_STA; index++) {
phead = &pstapriv->sta_hash[index];
list_for_each_entry_safe(psta, temp, phead, hash_list) {
if (pbcmc_stainfo != psta)
rtw_free_stainfo(padapter, psta);
}
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
}
/* any station allocated can be searched by hash list */
struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
struct list_head *plist, *phead;
struct sta_info *psta = NULL;
u32 index;
u8 *addr;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
if (!hwaddr)
return NULL;
if (is_multicast_ether_addr(hwaddr))
addr = bc_addr;
else
addr = hwaddr;
index = wifi_mac_hash(addr);
spin_lock_bh(&pstapriv->sta_hash_lock);
phead = &pstapriv->sta_hash[index];
list_for_each(plist, phead) {
psta = list_entry(plist, struct sta_info, hash_list);
if (!memcmp(psta->hwaddr, addr, ETH_ALEN)) {
/* if found the matched address */
break;
}
psta = NULL;
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
return psta;
}
u32 rtw_init_bcmc_stainfo(struct adapter *padapter)
{
struct sta_info *psta;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
struct sta_priv *pstapriv = &padapter->stapriv;
psta = rtw_alloc_stainfo(pstapriv, bc_addr);
if (!psta)
return _FAIL;
/* default broadcast & multicast use macid 1 */
psta->mac_id = 1;
return _SUCCESS;
}
struct sta_info *rtw_get_bcmc_stainfo(struct adapter *padapter)
{
struct sta_priv *pstapriv = &padapter->stapriv;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
return rtw_get_stainfo(pstapriv, bc_addr);
}
bool rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
{
bool res = true;
#ifdef CONFIG_88EU_AP_MODE
struct list_head *plist, *phead;
struct rtw_wlan_acl_node *paclnode;
bool match = false;
struct sta_priv *pstapriv = &padapter->stapriv;
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
struct __queue *pacl_node_q = &pacl_list->acl_node_q;
spin_lock_bh(&pacl_node_q->lock);
phead = get_list_head(pacl_node_q);
list_for_each(plist, phead) {
paclnode = list_entry(plist, struct rtw_wlan_acl_node, list);
if (!memcmp(paclnode->addr, mac_addr, ETH_ALEN)) {
if (paclnode->valid) {
match = true;
break;
}
}
}
spin_unlock_bh(&pacl_node_q->lock);
if (pacl_list->mode == 1)/* accept unless in deny list */
res = !match;
else if (pacl_list->mode == 2)/* deny unless in accept list */
res = match;
else
res = true;
#endif
return res;
}

1373
drivers/staging/rtl8188eu/core/rtw_wlan_util.c
View File

File diff suppressed because it is too large Load Diff

1927
drivers/staging/rtl8188eu/core/rtw_xmit.c
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File diff suppressed because it is too large Load Diff

681
drivers/staging/rtl8188eu/hal/bb_cfg.c
View File

@ -1,681 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include "odm_precomp.h"
#include <phy.h>
/* AGC_TAB_1T.TXT */
static u32 array_agc_tab_1t_8188e[] = {
0xC78, 0xFB000001,
0xC78, 0xFB010001,
0xC78, 0xFB020001,
0xC78, 0xFB030001,
0xC78, 0xFB040001,
0xC78, 0xFB050001,
0xC78, 0xFA060001,
0xC78, 0xF9070001,
0xC78, 0xF8080001,
0xC78, 0xF7090001,
0xC78, 0xF60A0001,
0xC78, 0xF50B0001,
0xC78, 0xF40C0001,
0xC78, 0xF30D0001,
0xC78, 0xF20E0001,
0xC78, 0xF10F0001,
0xC78, 0xF0100001,
0xC78, 0xEF110001,
0xC78, 0xEE120001,
0xC78, 0xED130001,
0xC78, 0xEC140001,
0xC78, 0xEB150001,
0xC78, 0xEA160001,
0xC78, 0xE9170001,
0xC78, 0xE8180001,
0xC78, 0xE7190001,
0xC78, 0xE61A0001,
0xC78, 0xE51B0001,
0xC78, 0xE41C0001,
0xC78, 0xE31D0001,
0xC78, 0xE21E0001,
0xC78, 0xE11F0001,
0xC78, 0x8A200001,
0xC78, 0x89210001,
0xC78, 0x88220001,
0xC78, 0x87230001,
0xC78, 0x86240001,
0xC78, 0x85250001,
0xC78, 0x84260001,
0xC78, 0x83270001,
0xC78, 0x82280001,
0xC78, 0x6B290001,
0xC78, 0x6A2A0001,
0xC78, 0x692B0001,
0xC78, 0x682C0001,
0xC78, 0x672D0001,
0xC78, 0x662E0001,
0xC78, 0x652F0001,
0xC78, 0x64300001,
0xC78, 0x63310001,
0xC78, 0x62320001,
0xC78, 0x61330001,
0xC78, 0x46340001,
0xC78, 0x45350001,
0xC78, 0x44360001,
0xC78, 0x43370001,
0xC78, 0x42380001,
0xC78, 0x41390001,
0xC78, 0x403A0001,
0xC78, 0x403B0001,
0xC78, 0x403C0001,
0xC78, 0x403D0001,
0xC78, 0x403E0001,
0xC78, 0x403F0001,
0xC78, 0xFB400001,
0xC78, 0xFB410001,
0xC78, 0xFB420001,
0xC78, 0xFB430001,
0xC78, 0xFB440001,
0xC78, 0xFB450001,
0xC78, 0xFB460001,
0xC78, 0xFB470001,
0xC78, 0xFB480001,
0xC78, 0xFA490001,
0xC78, 0xF94A0001,
0xC78, 0xF84B0001,
0xC78, 0xF74C0001,
0xC78, 0xF64D0001,
0xC78, 0xF54E0001,
0xC78, 0xF44F0001,
0xC78, 0xF3500001,
0xC78, 0xF2510001,
0xC78, 0xF1520001,
0xC78, 0xF0530001,
0xC78, 0xEF540001,
0xC78, 0xEE550001,
0xC78, 0xED560001,
0xC78, 0xEC570001,
0xC78, 0xEB580001,
0xC78, 0xEA590001,
0xC78, 0xE95A0001,
0xC78, 0xE85B0001,
0xC78, 0xE75C0001,
0xC78, 0xE65D0001,
0xC78, 0xE55E0001,
0xC78, 0xE45F0001,
0xC78, 0xE3600001,
0xC78, 0xE2610001,
0xC78, 0xC3620001,
0xC78, 0xC2630001,
0xC78, 0xC1640001,
0xC78, 0x8B650001,
0xC78, 0x8A660001,
0xC78, 0x89670001,
0xC78, 0x88680001,
0xC78, 0x87690001,
0xC78, 0x866A0001,
0xC78, 0x856B0001,
0xC78, 0x846C0001,
0xC78, 0x676D0001,
0xC78, 0x666E0001,
0xC78, 0x656F0001,
0xC78, 0x64700001,
0xC78, 0x63710001,
0xC78, 0x62720001,
0xC78, 0x61730001,
0xC78, 0x60740001,
0xC78, 0x46750001,
0xC78, 0x45760001,
0xC78, 0x44770001,
0xC78, 0x43780001,
0xC78, 0x42790001,
0xC78, 0x417A0001,
0xC78, 0x407B0001,
0xC78, 0x407C0001,
0xC78, 0x407D0001,
0xC78, 0x407E0001,
0xC78, 0x407F0001,
};
static bool set_baseband_agc_config(struct adapter *adapt)
{
u32 i;
const u32 arraylen = ARRAY_SIZE(array_agc_tab_1t_8188e);
u32 *array = array_agc_tab_1t_8188e;
for (i = 0; i < arraylen; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i + 1];
if (v1 < 0xCDCDCDCD) {
phy_set_bb_reg(adapt, v1, bMaskDWord, v2);
udelay(1);
}
}
return true;
}
/* PHY_REG_1T.TXT */
static u32 array_phy_reg_1t_8188e[] = {
0x800, 0x80040000,
0x804, 0x00000003,
0x808, 0x0000FC00,
0x80C, 0x0000000A,
0x810, 0x10001331,
0x814, 0x020C3D10,
0x818, 0x02200385,
0x81C, 0x00000000,
0x820, 0x01000100,
0x824, 0x00390204,
0x828, 0x00000000,
0x82C, 0x00000000,
0x830, 0x00000000,
0x834, 0x00000000,
0x838, 0x00000000,
0x83C, 0x00000000,
0x840, 0x00010000,
0x844, 0x00000000,
0x848, 0x00000000,
0x84C, 0x00000000,
0x850, 0x00000000,
0x854, 0x00000000,
0x858, 0x569A11A9,
0x85C, 0x01000014,
0x860, 0x66F60110,
0x864, 0x061F0649,
0x868, 0x00000000,
0x86C, 0x27272700,
0x870, 0x07000760,
0x874, 0x25004000,
0x878, 0x00000808,
0x87C, 0x00000000,
0x880, 0xB0000C1C,
0x884, 0x00000001,
0x888, 0x00000000,
0x88C, 0xCCC000C0,
0x890, 0x00000800,
0x894, 0xFFFFFFFE,
0x898, 0x40302010,
0x89C, 0x00706050,
0x900, 0x00000000,
0x904, 0x00000023,
0x908, 0x00000000,
0x90C, 0x81121111,
0x910, 0x00000002,
0x914, 0x00000201,
0xA00, 0x00D047C8,
0xA04, 0x80FF000C,
0xA08, 0x8C838300,
0xA0C, 0x2E7F120F,
0xA10, 0x9500BB78,
0xA14, 0x1114D028,
0xA18, 0x00881117,
0xA1C, 0x89140F00,
0xA20, 0x1A1B0000,
0xA24, 0x090E1317,
0xA28, 0x00000204,
0xA2C, 0x00D30000,
0xA70, 0x101FBF00,
0xA74, 0x00000007,
0xA78, 0x00000900,
0xA7C, 0x225B0606,
0xA80, 0x218075B1,
0xB2C, 0x80000000,
0xC00, 0x48071D40,
0xC04, 0x03A05611,
0xC08, 0x000000E4,
0xC0C, 0x6C6C6C6C,
0xC10, 0x08800000,
0xC14, 0x40000100,
0xC18, 0x08800000,
0xC1C, 0x40000100,
0xC20, 0x00000000,
0xC24, 0x00000000,
0xC28, 0x00000000,
0xC2C, 0x00000000,
0xC30, 0x69E9AC47,
0xC34, 0x469652AF,
0xC38, 0x49795994,
0xC3C, 0x0A97971C,
0xC40, 0x1F7C403F,
0xC44, 0x000100B7,
0xC48, 0xEC020107,
0xC4C, 0x007F037F,
0xC50, 0x69553420,
0xC54, 0x43BC0094,
0xC58, 0x00013169,
0xC5C, 0x00250492,
0xC60, 0x00000000,
0xC64, 0x7112848B,
0xC68, 0x47C00BFF,
0xC6C, 0x00000036,
0xC70, 0x2C7F000D,
0xC74, 0x020610DB,
0xC78, 0x0000001F,
0xC7C, 0x00B91612,
0xC80, 0x390000E4,
0xC84, 0x20F60000,
0xC88, 0x40000100,
0xC8C, 0x20200000,
0xC90, 0x00091521,
0xC94, 0x00000000,
0xC98, 0x00121820,
0xC9C, 0x00007F7F,
0xCA0, 0x00000000,
0xCA4, 0x000300A0,
0xCA8, 0x00000000,
0xCAC, 0x00000000,
0xCB0, 0x00000000,
0xCB4, 0x00000000,
0xCB8, 0x00000000,
0xCBC, 0x28000000,
0xCC0, 0x00000000,
0xCC4, 0x00000000,
0xCC8, 0x00000000,
0xCCC, 0x00000000,
0xCD0, 0x00000000,
0xCD4, 0x00000000,
0xCD8, 0x64B22427,
0xCDC, 0x00766932,
0xCE0, 0x00222222,
0xCE4, 0x00000000,
0xCE8, 0x37644302,
0xCEC, 0x2F97D40C,
0xD00, 0x00000740,
0xD04, 0x00020401,
0xD08, 0x0000907F,
0xD0C, 0x20010201,
0xD10, 0xA0633333,
0xD14, 0x3333BC43,
0xD18, 0x7A8F5B6F,
0xD2C, 0xCC979975,
0xD30, 0x00000000,
0xD34, 0x80608000,
0xD38, 0x00000000,
0xD3C, 0x00127353,
0xD40, 0x00000000,
0xD44, 0x00000000,
0xD48, 0x00000000,
0xD4C, 0x00000000,
0xD50, 0x6437140A,
0xD54, 0x00000000,
0xD58, 0x00000282,
0xD5C, 0x30032064,
0xD60, 0x4653DE68,
0xD64, 0x04518A3C,
0xD68, 0x00002101,
0xD6C, 0x2A201C16,
0xD70, 0x1812362E,
0xD74, 0x322C2220,
0xD78, 0x000E3C24,
0xE00, 0x2D2D2D2D,
0xE04, 0x2D2D2D2D,
0xE08, 0x0390272D,
0xE10, 0x2D2D2D2D,
0xE14, 0x2D2D2D2D,
0xE18, 0x2D2D2D2D,
0xE1C, 0x2D2D2D2D,
0xE28, 0x00000000,
0xE30, 0x1000DC1F,
0xE34, 0x10008C1F,
0xE38, 0x02140102,
0xE3C, 0x681604C2,
0xE40, 0x01007C00,
0xE44, 0x01004800,
0xE48, 0xFB000000,
0xE4C, 0x000028D1,
0xE50, 0x1000DC1F,
0xE54, 0x10008C1F,
0xE58, 0x02140102,
0xE5C, 0x28160D05,
0xE60, 0x00000008,
0xE68, 0x001B25A4,
0xE6C, 0x00C00014,
0xE70, 0x00C00014,
0xE74, 0x01000014,
0xE78, 0x01000014,
0xE7C, 0x01000014,
0xE80, 0x01000014,
0xE84, 0x00C00014,
0xE88, 0x01000014,
0xE8C, 0x00C00014,
0xED0, 0x00C00014,
0xED4, 0x00C00014,
0xED8, 0x00C00014,
0xEDC, 0x00000014,
0xEE0, 0x00000014,
0xEEC, 0x01C00014,
0xF14, 0x00000003,
0xF4C, 0x00000000,
0xF00, 0x00000300,
};
static void rtl_bb_delay(struct adapter *adapt, u32 addr, u32 data)
{
if (addr == 0xfe) {
msleep(50);
} else if (addr == 0xfd) {
mdelay(5);
} else if (addr == 0xfc) {
mdelay(1);
} else if (addr == 0xfb) {
udelay(50);
} else if (addr == 0xfa) {
udelay(5);
} else if (addr == 0xf9) {
udelay(1);
} else {
phy_set_bb_reg(adapt, addr, bMaskDWord, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
}
}
static bool set_baseband_phy_config(struct adapter *adapt)
{
u32 i;
const u32 arraylen = ARRAY_SIZE(array_phy_reg_1t_8188e);
u32 *array = array_phy_reg_1t_8188e;
for (i = 0; i < arraylen; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i + 1];
if (v1 < 0xCDCDCDCD)
rtl_bb_delay(adapt, v1, v2);
}
return true;
}
/* PHY_REG_PG.TXT */
static u32 array_phy_reg_pg_8188e[] = {
0xE00, 0xFFFFFFFF, 0x06070809,
0xE04, 0xFFFFFFFF, 0x02020405,
0xE08, 0x0000FF00, 0x00000006,
0x86C, 0xFFFFFF00, 0x00020400,
0xE10, 0xFFFFFFFF, 0x08090A0B,
0xE14, 0xFFFFFFFF, 0x01030607,
0xE18, 0xFFFFFFFF, 0x08090A0B,
0xE1C, 0xFFFFFFFF, 0x01030607,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x02020202,
0xE04, 0xFFFFFFFF, 0x00020202,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x04040404,
0xE14, 0xFFFFFFFF, 0x00020404,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x02020202,
0xE04, 0xFFFFFFFF, 0x00020202,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x04040404,
0xE14, 0xFFFFFFFF, 0x00020404,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x02020202,
0xE04, 0xFFFFFFFF, 0x00020202,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x04040404,
0xE14, 0xFFFFFFFF, 0x00020404,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
0xE00, 0xFFFFFFFF, 0x00000000,
0xE04, 0xFFFFFFFF, 0x00000000,
0xE08, 0x0000FF00, 0x00000000,
0x86C, 0xFFFFFF00, 0x00000000,
0xE10, 0xFFFFFFFF, 0x00000000,
0xE14, 0xFFFFFFFF, 0x00000000,
0xE18, 0xFFFFFFFF, 0x00000000,
0xE1C, 0xFFFFFFFF, 0x00000000,
};
static void store_pwrindex_offset(struct adapter *adapter,
u32 regaddr, u32 bitmask, u32 data)
{
struct hal_data_8188e *hal_data = adapter->HalData;
u32 * const power_level_offset =
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt];
if (regaddr == rTxAGC_A_Rate18_06)
power_level_offset[0] = data;
if (regaddr == rTxAGC_A_Rate54_24)
power_level_offset[1] = data;
if (regaddr == rTxAGC_A_CCK1_Mcs32)
power_level_offset[6] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00)
power_level_offset[7] = data;
if (regaddr == rTxAGC_A_Mcs03_Mcs00)
power_level_offset[2] = data;
if (regaddr == rTxAGC_A_Mcs07_Mcs04)
power_level_offset[3] = data;
if (regaddr == rTxAGC_A_Mcs11_Mcs08)
power_level_offset[4] = data;
if (regaddr == rTxAGC_A_Mcs15_Mcs12) {
power_level_offset[5] = data;
hal_data->pwrGroupCnt++;
}
if (regaddr == rTxAGC_B_Rate18_06)
power_level_offset[8] = data;
if (regaddr == rTxAGC_B_Rate54_24)
power_level_offset[9] = data;
if (regaddr == rTxAGC_B_CCK1_55_Mcs32)
power_level_offset[14] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff)
power_level_offset[15] = data;
if (regaddr == rTxAGC_B_Mcs03_Mcs00)
power_level_offset[10] = data;
if (regaddr == rTxAGC_B_Mcs07_Mcs04)
power_level_offset[11] = data;
if (regaddr == rTxAGC_B_Mcs11_Mcs08)
power_level_offset[12] = data;
if (regaddr == rTxAGC_B_Mcs15_Mcs12)
power_level_offset[13] = data;
}
static void rtl_addr_delay(struct adapter *adapt,
u32 addr, u32 bit_mask, u32 data)
{
switch (addr) {
case 0xfe:
msleep(50);
break;
case 0xfd:
mdelay(5);
break;
case 0xfc:
mdelay(1);
break;
case 0xfb:
udelay(50);
break;
case 0xfa:
udelay(5);
break;
case 0xf9:
udelay(1);
break;
default:
store_pwrindex_offset(adapt, addr, bit_mask, data);
}
}
static bool config_bb_with_pgheader(struct adapter *adapt)
{
u32 i;
const u32 arraylen = ARRAY_SIZE(array_phy_reg_pg_8188e);
u32 *array = array_phy_reg_pg_8188e;
for (i = 0; i < arraylen; i += 3) {
u32 v1 = array[i];
u32 v2 = array[i + 1];
u32 v3 = array[i + 2];
if (v1 < 0xCDCDCDCD)
rtl_addr_delay(adapt, v1, v2, v3);
}
return true;
}
static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *adapter)
{
struct bb_reg_def *reg[4];
reg[RF_PATH_A] = &adapter->HalData->PHYRegDef[RF_PATH_A];
reg[RF_PATH_B] = &adapter->HalData->PHYRegDef[RF_PATH_B];
reg[RF_PATH_A]->rfintfs = rFPGA0_XAB_RFInterfaceSW;
reg[RF_PATH_B]->rfintfs = rFPGA0_XAB_RFInterfaceSW;
reg[RF_PATH_A]->rfintfi = rFPGA0_XAB_RFInterfaceRB;
reg[RF_PATH_B]->rfintfi = rFPGA0_XAB_RFInterfaceRB;
reg[RF_PATH_A]->rfintfo = rFPGA0_XA_RFInterfaceOE;
reg[RF_PATH_B]->rfintfo = rFPGA0_XB_RFInterfaceOE;
reg[RF_PATH_A]->rfintfe = rFPGA0_XA_RFInterfaceOE;
reg[RF_PATH_B]->rfintfe = rFPGA0_XB_RFInterfaceOE;
reg[RF_PATH_A]->rf3wireOffset = rFPGA0_XA_LSSIParameter;
reg[RF_PATH_B]->rf3wireOffset = rFPGA0_XB_LSSIParameter;
reg[RF_PATH_A]->rfLSSI_Select = rFPGA0_XAB_RFParameter;
reg[RF_PATH_B]->rfLSSI_Select = rFPGA0_XAB_RFParameter;
reg[RF_PATH_A]->rfTxGainStage = rFPGA0_TxGainStage;
reg[RF_PATH_B]->rfTxGainStage = rFPGA0_TxGainStage;
reg[RF_PATH_A]->rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;
reg[RF_PATH_B]->rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;
reg[RF_PATH_A]->rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;
reg[RF_PATH_B]->rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;
reg[RF_PATH_A]->rfSwitchControl = rFPGA0_XAB_SwitchControl;
reg[RF_PATH_B]->rfSwitchControl = rFPGA0_XAB_SwitchControl;
reg[RF_PATH_A]->rfAGCControl1 = rOFDM0_XAAGCCore1;
reg[RF_PATH_B]->rfAGCControl1 = rOFDM0_XBAGCCore1;
reg[RF_PATH_A]->rfAGCControl2 = rOFDM0_XAAGCCore2;
reg[RF_PATH_B]->rfAGCControl2 = rOFDM0_XBAGCCore2;
reg[RF_PATH_A]->rfRxIQImbalance = rOFDM0_XARxIQImbalance;
reg[RF_PATH_B]->rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
reg[RF_PATH_A]->rfRxAFE = rOFDM0_XARxAFE;
reg[RF_PATH_B]->rfRxAFE = rOFDM0_XBRxAFE;
reg[RF_PATH_A]->rfTxIQImbalance = rOFDM0_XATxIQImbalance;
reg[RF_PATH_B]->rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
reg[RF_PATH_A]->rfTxAFE = rOFDM0_XATxAFE;
reg[RF_PATH_B]->rfTxAFE = rOFDM0_XBTxAFE;
reg[RF_PATH_A]->rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
reg[RF_PATH_B]->rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
reg[RF_PATH_A]->rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
reg[RF_PATH_B]->rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
}
static bool config_parafile(struct adapter *adapt)
{
struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
set_baseband_phy_config(adapt);
/* If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */
if (!eeprom->bautoload_fail_flag) {
adapt->HalData->pwrGroupCnt = 0;
config_bb_with_pgheader(adapt);
}
set_baseband_agc_config(adapt);
return true;
}
bool rtl88eu_phy_bb_config(struct adapter *adapt)
{
bool rtstatus;
u32 regval;
u8 crystal_cap;
rtl88e_phy_init_bb_rf_register_definition(adapt);
/* Enable BB and RF */
regval = usb_read16(adapt, REG_SYS_FUNC_EN);
usb_write16(adapt, REG_SYS_FUNC_EN,
(u16)(regval | BIT(13) | BIT(0) | BIT(1)));
usb_write8(adapt, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
usb_write8(adapt, REG_SYS_FUNC_EN, FEN_USBA |
FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
/* Config BB and AGC */
rtstatus = config_parafile(adapt);
/* write 0x24[16:11] = 0x24[22:17] = crystal_cap */
crystal_cap = adapt->HalData->CrystalCap & 0x3F;
phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800,
(crystal_cap | (crystal_cap << 6)));
return rtstatus;
}

202
drivers/staging/rtl8188eu/hal/fw.c
View File

@ -1,202 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2009-2013 Realtek Corporation.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "fw.h"
#include "drv_types.h"
#include "usb_ops_linux.h"
#include "rtl8188e_spec.h"
#include "rtl8188e_hal.h"
#include <linux/firmware.h>
#include <linux/slab.h>
static void _rtl88e_enable_fw_download(struct adapter *adapt, bool enable)
{
u8 tmp;
if (enable) {
tmp = usb_read8(adapt, REG_MCUFWDL);
usb_write8(adapt, REG_MCUFWDL, tmp | 0x01);
tmp = usb_read8(adapt, REG_MCUFWDL + 2);
usb_write8(adapt, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
tmp = usb_read8(adapt, REG_MCUFWDL);
usb_write8(adapt, REG_MCUFWDL, tmp & 0xfe);
usb_write8(adapt, REG_MCUFWDL + 1, 0x00);
}
}
static void _rtl88e_fw_block_write(struct adapter *adapt,
const u8 *buffer, u32 size)
{
u32 blk_sz = sizeof(u32);
const u8 *byte_buffer;
const u32 *dword_buffer = (u32 *)buffer;
u32 i, write_address, blk_cnt, remain;
blk_cnt = size / blk_sz;
remain = size % blk_sz;
write_address = FW_8192C_START_ADDRESS;
for (i = 0; i < blk_cnt; i++, write_address += blk_sz)
usb_write32(adapt, write_address, dword_buffer[i]);
byte_buffer = buffer + blk_cnt * blk_sz;
for (i = 0; i < remain; i++, write_address++)
usb_write8(adapt, write_address, byte_buffer[i]);
}
static void _rtl88e_fw_page_write(struct adapter *adapt,
u32 page, const u8 *buffer, u32 size)
{
u8 value8;
u8 u8page = (u8)(page & 0x07);
value8 = (usb_read8(adapt, REG_MCUFWDL + 2) & 0xF8) | u8page;
usb_write8(adapt, (REG_MCUFWDL + 2), value8);
_rtl88e_fw_block_write(adapt, buffer, size);
}
static void _rtl88e_write_fw(struct adapter *adapt, u8 *buffer, u32 size)
{
u8 *buf_ptr = buffer;
u32 page_no, remain;
u32 page, offset;
page_no = size / FW_8192C_PAGE_SIZE;
remain = size % FW_8192C_PAGE_SIZE;
for (page = 0; page < page_no; page++) {
offset = page * FW_8192C_PAGE_SIZE;
_rtl88e_fw_page_write(adapt, page, (buf_ptr + offset),
FW_8192C_PAGE_SIZE);
}
if (remain) {
offset = page_no * FW_8192C_PAGE_SIZE;
page = page_no;
_rtl88e_fw_page_write(adapt, page, (buf_ptr + offset), remain);
}
}
static void rtl88e_firmware_selfreset(struct adapter *adapt)
{
u8 u1b_tmp;
u1b_tmp = usb_read8(adapt, REG_SYS_FUNC_EN + 1);
usb_write8(adapt, REG_SYS_FUNC_EN + 1, (u1b_tmp & (~BIT(2))));
usb_write8(adapt, REG_SYS_FUNC_EN + 1, (u1b_tmp | BIT(2)));
}
static int _rtl88e_fw_free_to_go(struct adapter *adapt)
{
int err = -EIO;
u32 counter = 0;
u32 value32;
do {
value32 = usb_read32(adapt, REG_MCUFWDL);
if (value32 & FWDL_CHKSUM_RPT)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
if (counter >= POLLING_READY_TIMEOUT_COUNT)
goto exit;
value32 = usb_read32(adapt, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
usb_write32(adapt, REG_MCUFWDL, value32);
rtl88e_firmware_selfreset(adapt);
counter = 0;
do {
value32 = usb_read32(adapt, REG_MCUFWDL);
if (value32 & WINTINI_RDY) {
err = 0;
goto exit;
}
udelay(FW_8192C_POLLING_DELAY);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
exit:
return err;
}
int rtl88eu_download_fw(struct adapter *adapt)
{
struct dvobj_priv *dvobj = adapter_to_dvobj(adapt);
struct device *device = dvobj_to_dev(dvobj);
const struct firmware *fw;
static const char fw_name[] = "rtlwifi/rtl8188eufw.bin";
struct rtl92c_firmware_header *pfwheader = NULL;
u8 *download_data, *fw_data;
size_t download_size;
unsigned int trailing_zeros_length;
if (request_firmware(&fw, fw_name, device)) {
dev_err(device, "Firmware %s not available\n", fw_name);
return -ENOENT;
}
if (fw->size > FW_8188E_SIZE) {
dev_err(device, "Firmware size exceed 0x%X. Check it.\n",
FW_8188E_SIZE);
release_firmware(fw);
return -1;
}
trailing_zeros_length = (4 - fw->size % 4) % 4;
fw_data = kmalloc(fw->size + trailing_zeros_length, GFP_KERNEL);
if (!fw_data) {
release_firmware(fw);
return -ENOMEM;
}
memcpy(fw_data, fw->data, fw->size);
memset(fw_data + fw->size, 0, trailing_zeros_length);
pfwheader = (struct rtl92c_firmware_header *)fw_data;
if (IS_FW_HEADER_EXIST(pfwheader)) {
download_data = fw_data + 32;
download_size = fw->size + trailing_zeros_length - 32;
} else {
download_data = fw_data;
download_size = fw->size + trailing_zeros_length;
}
release_firmware(fw);
if (usb_read8(adapt, REG_MCUFWDL) & RAM_DL_SEL) {
usb_write8(adapt, REG_MCUFWDL, 0);
rtl88e_firmware_selfreset(adapt);
}
_rtl88e_enable_fw_download(adapt, true);
usb_write8(adapt, REG_MCUFWDL,
usb_read8(adapt, REG_MCUFWDL) | FWDL_CHKSUM_RPT);
_rtl88e_write_fw(adapt, download_data, download_size);
_rtl88e_enable_fw_download(adapt, false);
kfree(fw_data);
return _rtl88e_fw_free_to_go(adapt);
}

646
drivers/staging/rtl8188eu/hal/hal8188e_rate_adaptive.c
View File

@ -1,646 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) Realtek Semiconductor Corp. All rights reserved.
*/
#include "odm_precomp.h"
/* Rate adaptive parameters */
static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = {
{5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */
{6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */
{6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */
{8, 7, 6, 4, 0, 6}, /* 75 , idx = 3 */
{10, 9, 8, 6, 0, 8}, /* 71 , idx = 4 */
{10, 9, 8, 4, 0, 8}, /* 66 , idx = 5 */
{10, 9, 8, 2, 0, 8}, /* 62 , idx = 6 */
{10, 9, 8, 0, 0, 8}, /* 59 , idx = 7 */
{18, 17, 16, 8, 0, 16}, /* 53 , idx = 8 */
{26, 25, 24, 16, 0, 24}, /* 50 , idx = 9 */
{34, 33, 32, 24, 0, 32}, /* 47 , idx = 0x0a */
{34, 31, 28, 20, 0, 32}, /* 43 , idx = 0x0b */
{34, 31, 27, 18, 0, 32}, /* 40 , idx = 0x0c */
{34, 31, 26, 16, 0, 32}, /* 37 , idx = 0x0d */
{34, 30, 22, 16, 0, 32}, /* 32 , idx = 0x0e */
{34, 30, 24, 16, 0, 32}, /* 26 , idx = 0x0f */
{49, 46, 40, 16, 0, 48}, /* 20 , idx = 0x10 */
{49, 45, 32, 0, 0, 48}, /* 17 , idx = 0x11 */
{49, 45, 22, 18, 0, 48}, /* 15 , idx = 0x12 */
{49, 40, 24, 16, 0, 48}, /* 12 , idx = 0x13 */
{49, 32, 18, 12, 0, 48}, /* 9 , idx = 0x14 */
{49, 22, 18, 14, 0, 48}, /* 6 , idx = 0x15 */
{49, 16, 16, 0, 0, 48}
}; /* 3, idx = 0x16 */
static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32};
/* wilson modify */
static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {
{4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f}, /* 0329 R01 */
{0x0a, 0x0a, 0x0b, 0x0c, 0x0a,
0x0a, 0x0b, 0x0c, 0x0d, 0x10, 0x13, 0x14, /* SS<TH */
0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x11, 0x13, 0x15,
9, 9, 9, 9, 0x0c, 0x0e, 0x11, 0x13}
};
static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {
0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e,
0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */
0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15,
0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15};
static u8 RSSI_THRESHOLD[RATESIZE] = {
0, 0, 0, 0,
0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a,
0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c};
static u16 N_THRESHOLD_HIGH[RATESIZE] = {
4, 4, 8, 16,
24, 36, 48, 72, 96, 144, 192, 216,
60, 80, 100, 160, 240, 400, 560, 640,
300, 320, 480, 720, 1000, 1200, 1600, 2000};
static u16 N_THRESHOLD_LOW[RATESIZE] = {
2, 2, 4, 8,
12, 18, 24, 36, 48, 72, 96, 108,
30, 40, 50, 80, 120, 200, 280, 320,
150, 160, 240, 360, 500, 600, 800, 1000};
static u8 DROPING_NECESSARY[RATESIZE] = {
1, 1, 1, 1,
1, 2, 3, 4, 5, 6, 7, 8,
1, 2, 3, 4, 5, 6, 7, 8,
5, 6, 7, 8, 9, 10, 11, 12};
static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60};
static u16 DynamicTxRPTTiming[6] = {
0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0x927c}; /* 200ms-1200ms */
/* End Rate adaptive parameters */
static void odm_SetTxRPTTiming_8188E(struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo, u8 extend)
{
u8 idx = 0;
for (idx = 0; idx < 5; idx++)
if (DynamicTxRPTTiming[idx] == pRaInfo->RptTime)
break;
if (extend == 0) { /* back to default timing */
idx = 0; /* 200ms */
} else if (extend == 1) {/* increase the timing */
idx += 1;
if (idx > 5)
idx = 5;
} else if (extend == 2) {/* decrease the timing */
if (idx != 0)
idx -= 1;
}
pRaInfo->RptTime = DynamicTxRPTTiming[idx];
}
static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo)
{
u8 RateID, LowestRate, HighestRate;
u8 i;
if (!pRaInfo)
return -1;
RateID = pRaInfo->PreRate;
LowestRate = pRaInfo->LowestRate;
HighestRate = pRaInfo->HighestRate;
if (RateID > HighestRate) {
RateID = HighestRate;
} else if (pRaInfo->RateSGI) {
pRaInfo->RateSGI = 0;
} else if (RateID > LowestRate) {
if (RateID > 0) {
for (i = RateID - 1; i > LowestRate; i--) {
if (pRaInfo->RAUseRate & BIT(i)) {
RateID = i;
goto RateDownFinish;
}
}
}
} else if (RateID <= LowestRate) {
RateID = LowestRate;
}
RateDownFinish:
if (pRaInfo->RAWaitingCounter == 1) {
pRaInfo->RAWaitingCounter += 1;
pRaInfo->RAPendingCounter += 1;
} else if (pRaInfo->RAWaitingCounter == 0) {
;
} else {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
}
if (pRaInfo->RAPendingCounter >= 4)
pRaInfo->RAPendingCounter = 4;
pRaInfo->DecisionRate = RateID;
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2);
return 0;
}
static int odm_RateUp_8188E(struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo)
{
u8 RateID, HighestRate;
u8 i;
if (!pRaInfo)
return -1;
RateID = pRaInfo->PreRate;
HighestRate = pRaInfo->HighestRate;
if (pRaInfo->RAWaitingCounter == 1) {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
} else if (pRaInfo->RAWaitingCounter > 1) {
pRaInfo->PreRssiStaRA = pRaInfo->RssiStaRA;
goto RateUpfinish;
}
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0);
if (RateID < HighestRate) {
for (i = RateID + 1; i <= HighestRate; i++) {
if (pRaInfo->RAUseRate & BIT(i)) {
RateID = i;
goto RateUpfinish;
}
}
} else if (RateID == HighestRate) {
if (pRaInfo->SGIEnable && (pRaInfo->RateSGI != 1))
pRaInfo->RateSGI = 1;
else if ((pRaInfo->SGIEnable) != 1)
pRaInfo->RateSGI = 0;
} else {
RateID = HighestRate;
}
RateUpfinish:
if (pRaInfo->RAWaitingCounter ==
(4 + PendingForRateUpFail[pRaInfo->RAPendingCounter]))
pRaInfo->RAWaitingCounter = 0;
else
pRaInfo->RAWaitingCounter++;
pRaInfo->DecisionRate = RateID;
return 0;
}
static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo)
{
u8 RateID;
RateID = pRaInfo->DecisionRate;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID] +
N_THRESHOLD_LOW[RateID]) >> 1;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID] +
N_THRESHOLD_LOW[RateID]) >> 1;
}
static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
struct odm_ra_info *pRaInfo)
{
u8 RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0, i = 0;
/* u32 pool_retry; */
static u8 DynamicTxRPTTimingCounter;
if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */
if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) ||
(pRaInfo->RssiStaRA > (pRaInfo->PreRssiStaRA + 3))) {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
}
/* Start RA decision */
if (pRaInfo->PreRate > pRaInfo->HighestRate)
RateID = pRaInfo->HighestRate;
else
RateID = pRaInfo->PreRate;
if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID])
RtyPtID = 0;
else
RtyPtID = 1;
PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; /* TODO by page */
for (i = 0 ; i <= 4 ; i++)
pRaInfo->NscDown += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID1][i];
if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
else
pRaInfo->NscDown = 0;
/* rate up */
PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
for (i = 0 ; i <= 4 ; i++)
pRaInfo->NscUp += pRaInfo->RTY[i] * RETRY_PENALTY[PenaltyID2][i];
if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
else
pRaInfo->NscUp = 0;
if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||
(pRaInfo->DROP > DROPING_NECESSARY[RateID]))
odm_RateDown_8188E(dm_odm, pRaInfo);
else if (pRaInfo->NscUp > N_THRESHOLD_HIGH[RateID])
odm_RateUp_8188E(dm_odm, pRaInfo);
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
if ((pRaInfo->DecisionRate) == (pRaInfo->PreRate))
DynamicTxRPTTimingCounter += 1;
else
DynamicTxRPTTimingCounter = 0;
if (DynamicTxRPTTimingCounter >= 4) {
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 1);
DynamicTxRPTTimingCounter = 0;
}
pRaInfo->PreRate = pRaInfo->DecisionRate; /* YJ, add, 120120 */
odm_ResetRaCounter_8188E(pRaInfo);
}
}
static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
{ /* Wilson 2011/10/26 */
struct adapter *adapt = dm_odm->Adapter;
u32 MaskFromReg;
s8 i;
switch (pRaInfo->RateID) {
case RATR_INX_WIRELESS_NGB:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff015;
break;
case RATR_INX_WIRELESS_NG:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff010;
break;
case RATR_INX_WIRELESS_NB:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff005;
break;
case RATR_INX_WIRELESS_N:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0f8ff000;
break;
case RATR_INX_WIRELESS_GB:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x00000ff5;
break;
case RATR_INX_WIRELESS_G:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x00000ff0;
break;
case RATR_INX_WIRELESS_B:
pRaInfo->RAUseRate = pRaInfo->RateMask & 0x0000000d;
break;
case 12:
MaskFromReg = usb_read32(adapt, REG_ARFR0);
pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg;
break;
case 13:
MaskFromReg = usb_read32(adapt, REG_ARFR1);
pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg;
break;
case 14:
MaskFromReg = usb_read32(adapt, REG_ARFR2);
pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg;
break;
case 15:
MaskFromReg = usb_read32(adapt, REG_ARFR3);
pRaInfo->RAUseRate = pRaInfo->RateMask & MaskFromReg;
break;
default:
pRaInfo->RAUseRate = (pRaInfo->RateMask);
break;
}
/* Highest rate */
if (pRaInfo->RAUseRate) {
for (i = RATESIZE; i >= 0; i--) {
if (pRaInfo->RAUseRate & BIT(i)) {
pRaInfo->HighestRate = i;
break;
}
}
} else {
pRaInfo->HighestRate = 0;
}
/* Lowest rate */
if (pRaInfo->RAUseRate) {
for (i = 0; i < RATESIZE; i++) {
if ((pRaInfo->RAUseRate) & BIT(i)) {
pRaInfo->LowestRate = i;
break;
}
}
} else {
pRaInfo->LowestRate = 0;
}
if (pRaInfo->HighestRate > 0x13)
pRaInfo->PTModeSS = 3;
else if (pRaInfo->HighestRate > 0x0b)
pRaInfo->PTModeSS = 2;
else if (pRaInfo->HighestRate > 0x03)
pRaInfo->PTModeSS = 1;
else
pRaInfo->PTModeSS = 0;
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
return 0;
}
static void odm_PTTryState_8188E(struct odm_ra_info *pRaInfo)
{
pRaInfo->PTTryState = 0;
switch (pRaInfo->PTModeSS) {
case 3:
if (pRaInfo->DecisionRate >= 0x19)
pRaInfo->PTTryState = 1;
break;
case 2:
if (pRaInfo->DecisionRate >= 0x11)
pRaInfo->PTTryState = 1;
break;
case 1:
if (pRaInfo->DecisionRate >= 0x0a)
pRaInfo->PTTryState = 1;
break;
case 0:
if (pRaInfo->DecisionRate >= 0x03)
pRaInfo->PTTryState = 1;
break;
default:
pRaInfo->PTTryState = 0;
break;
}
if (pRaInfo->RssiStaRA < 48) {
pRaInfo->PTStage = 0;
} else if (pRaInfo->PTTryState == 1) {
if ((pRaInfo->PTStopCount >= 10) ||
(pRaInfo->PTPreRssi > pRaInfo->RssiStaRA + 5) ||
(pRaInfo->PTPreRssi < pRaInfo->RssiStaRA - 5) ||
(pRaInfo->DecisionRate != pRaInfo->PTPreRate)) {
if (pRaInfo->PTStage == 0)
pRaInfo->PTStage = 1;
else if (pRaInfo->PTStage == 1)
pRaInfo->PTStage = 3;
else
pRaInfo->PTStage = 5;
pRaInfo->PTPreRssi = pRaInfo->RssiStaRA;
pRaInfo->PTStopCount = 0;
} else {
pRaInfo->RAstage = 0;
pRaInfo->PTStopCount++;
}
} else {
pRaInfo->PTStage = 0;
pRaInfo->RAstage = 0;
}
pRaInfo->PTPreRate = pRaInfo->DecisionRate;
}
static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo)
{
u8 j;
u8 temp_stage;
u32 numsc;
u32 num_total;
u8 stage_id;
numsc = 0;
num_total = pRaInfo->TOTAL * PT_PENALTY[5];
for (j = 0; j <= 4; j++) {
numsc += pRaInfo->RTY[j] * PT_PENALTY[j];
if (numsc > num_total)
break;
}
j >>= 1;
temp_stage = (pRaInfo->PTStage + 1) >> 1;
if (temp_stage > j)
stage_id = temp_stage - j;
else
stage_id = 0;
pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor >> 1) +
(pRaInfo->PTSmoothFactor >> 2) +
stage_id * 16 + 2;
if (pRaInfo->PTSmoothFactor > 192)
pRaInfo->PTSmoothFactor = 192;
stage_id = pRaInfo->PTSmoothFactor >> 6;
temp_stage = stage_id * 2;
if (temp_stage != 0)
temp_stage -= 1;
if (pRaInfo->DROP > 3)
temp_stage = 0;
pRaInfo->PTStage = temp_stage;
}
static void odm_RATxRPTTimerSetting(struct odm_dm_struct *dm_odm,
u16 minRptTime)
{
if (dm_odm->CurrminRptTime != minRptTime) {
rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime);
dm_odm->CurrminRptTime = minRptTime;
}
}
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
{
struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
u8 WirelessMode = 0xFF; /* invalid value */
u8 max_rate_idx = 0x13; /* MCS7 */
if (dm_odm->pWirelessMode)
WirelessMode = *dm_odm->pWirelessMode;
if (WirelessMode != 0xFF) {
if (WirelessMode & ODM_WM_N24G)
max_rate_idx = 0x13;
else if (WirelessMode & ODM_WM_G)
max_rate_idx = 0x0b;
else if (WirelessMode & ODM_WM_B)
max_rate_idx = 0x03;
}
pRaInfo->DecisionRate = max_rate_idx;
pRaInfo->PreRate = max_rate_idx;
pRaInfo->HighestRate = max_rate_idx;
pRaInfo->LowestRate = 0;
pRaInfo->RateID = 0;
pRaInfo->RateMask = 0xffffffff;
pRaInfo->RssiStaRA = 0;
pRaInfo->PreRssiStaRA = 0;
pRaInfo->SGIEnable = 0;
pRaInfo->RAUseRate = 0xffffffff;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2;
pRaInfo->RateSGI = 0;
pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */
pRaInfo->RptTime = 0x927c;
pRaInfo->DROP = 0;
pRaInfo->RTY[0] = 0;
pRaInfo->RTY[1] = 0;
pRaInfo->RTY[2] = 0;
pRaInfo->RTY[3] = 0;
pRaInfo->RTY[4] = 0;
pRaInfo->TOTAL = 0;
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
pRaInfo->PTActive = 1; /* Active when this STA is use */
pRaInfo->PTTryState = 0;
pRaInfo->PTStage = 5; /* Need to fill into HW_PWR_STATUS */
pRaInfo->PTSmoothFactor = 192;
pRaInfo->PTStopCount = 0;
pRaInfo->PTPreRate = 0;
pRaInfo->PTPreRssi = 0;
pRaInfo->PTModeSS = 0;
pRaInfo->RAstage = 0;
return 0;
}
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm)
{
u8 macid = 0;
dm_odm->CurrminRptTime = 0;
for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++)
ODM_RAInfo_Init(dm_odm, macid);
return 0;
}
u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
return dm_odm->RAInfo[macid].RateSGI;
}
u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 DecisionRate = 0;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
DecisionRate = dm_odm->RAInfo[macid].DecisionRate;
return DecisionRate;
}
u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 PTStage = 5;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
PTStage = dm_odm->RAInfo[macid].PTStage;
return PTStage;
}
void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 RateID, u32 RateMask, u8 SGIEnable)
{
struct odm_ra_info *pRaInfo = NULL;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &dm_odm->RAInfo[macid];
pRaInfo->RateID = RateID;
pRaInfo->RateMask = RateMask;
pRaInfo->SGIEnable = SGIEnable;
odm_ARFBRefresh_8188E(dm_odm, pRaInfo);
}
void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi)
{
struct odm_ra_info *pRaInfo = NULL;
if ((!dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &dm_odm->RAInfo[macid];
pRaInfo->RssiStaRA = Rssi;
}
void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime)
{
struct adapter *adapt = dm_odm->Adapter;
usb_write16(adapt, REG_TX_RPT_TIME, minRptTime);
}
void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1)
{
struct odm_ra_info *pRAInfo = NULL;
u8 MacId = 0;
u8 *pBuffer = NULL;
u32 valid = 0, ItemNum = 0;
u16 minRptTime = 0x927c;
ItemNum = TxRPT_Len >> 3;
pBuffer = TxRPT_Buf;
do {
if (MacId >= ASSOCIATE_ENTRY_NUM)
valid = 0;
else if (MacId >= 32)
valid = (1 << (MacId - 32)) & macid_entry1;
else
valid = (1 << MacId) & macid_entry0;
pRAInfo = &dm_odm->RAInfo[MacId];
if (valid) {
pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
pRAInfo->TOTAL = pRAInfo->RTY[0] + pRAInfo->RTY[1] +
pRAInfo->RTY[2] + pRAInfo->RTY[3] +
pRAInfo->RTY[4] + pRAInfo->DROP;
if (pRAInfo->TOTAL != 0) {
if (pRAInfo->PTActive) {
if (pRAInfo->RAstage < 5)
odm_RateDecision_8188E(dm_odm, pRAInfo);
else if (pRAInfo->RAstage == 5) /* Power training try state */
odm_PTTryState_8188E(pRAInfo);
else /* RAstage == 6 */
odm_PTDecision_8188E(pRAInfo);
/* Stage_RA counter */
if (pRAInfo->RAstage <= 5)
pRAInfo->RAstage++;
else
pRAInfo->RAstage = 0;
} else {
odm_RateDecision_8188E(dm_odm, pRAInfo);
}
}
}
if (minRptTime > pRAInfo->RptTime)
minRptTime = pRAInfo->RptTime;
pBuffer += TX_RPT2_ITEM_SIZE;
MacId++;
} while (MacId < ItemNum);
odm_RATxRPTTimerSetting(dm_odm, minRptTime);
}

285
drivers/staging/rtl8188eu/hal/hal_com.c
View File

@ -1,285 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
#include <hal_com.h>
#include <rtl8188e_hal.h>
#define _HAL_INIT_C_
void dump_chip_info(struct HAL_VERSION chip_vers)
{
uint cnt = 0;
char buf[128];
cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
cnt += sprintf((buf + cnt), "%s_", chip_vers.ChipType == NORMAL_CHIP ?
"Normal_Chip" : "Test_Chip");
cnt += sprintf((buf + cnt), "%s_", chip_vers.VendorType == CHIP_VENDOR_TSMC ?
"TSMC" : "UMC");
if (chip_vers.CUTVersion == A_CUT_VERSION)
cnt += sprintf((buf + cnt), "A_CUT_");
else if (chip_vers.CUTVersion == B_CUT_VERSION)
cnt += sprintf((buf + cnt), "B_CUT_");
else if (chip_vers.CUTVersion == C_CUT_VERSION)
cnt += sprintf((buf + cnt), "C_CUT_");
else if (chip_vers.CUTVersion == D_CUT_VERSION)
cnt += sprintf((buf + cnt), "D_CUT_");
else if (chip_vers.CUTVersion == E_CUT_VERSION)
cnt += sprintf((buf + cnt), "E_CUT_");
else
cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_",
chip_vers.CUTVersion);
cnt += sprintf((buf + cnt), "1T1R_");
cnt += sprintf((buf + cnt), "RomVer(0)\n");
pr_info("%s", buf);
}
#define CHAN_PLAN_HW 0x80
/* return the final channel plan decision */
u8 hal_com_get_channel_plan(u8 hw_channel_plan, u8 sw_channel_plan,
u8 def_channel_plan, bool load_fail)
{
u8 sw_cfg;
u8 chnlplan;
sw_cfg = true;
if (!load_fail) {
if (!rtw_is_channel_plan_valid(sw_channel_plan))
sw_cfg = false;
if (hw_channel_plan & CHAN_PLAN_HW)
sw_cfg = false;
}
if (sw_cfg)
chnlplan = sw_channel_plan;
else
chnlplan = hw_channel_plan & (~CHAN_PLAN_HW);
if (!rtw_is_channel_plan_valid(chnlplan))
chnlplan = def_channel_plan;
return chnlplan;
}
u8 MRateToHwRate(u8 rate)
{
u8 ret = DESC_RATE1M;
switch (rate) {
/* CCK and OFDM non-HT rates */
case IEEE80211_CCK_RATE_1MB:
ret = DESC_RATE1M;
break;
case IEEE80211_CCK_RATE_2MB:
ret = DESC_RATE2M;
break;
case IEEE80211_CCK_RATE_5MB:
ret = DESC_RATE5_5M;
break;
case IEEE80211_CCK_RATE_11MB:
ret = DESC_RATE11M;
break;
case IEEE80211_OFDM_RATE_6MB:
ret = DESC_RATE6M;
break;
case IEEE80211_OFDM_RATE_9MB:
ret = DESC_RATE9M;
break;
case IEEE80211_OFDM_RATE_12MB:
ret = DESC_RATE12M;
break;
case IEEE80211_OFDM_RATE_18MB:
ret = DESC_RATE18M;
break;
case IEEE80211_OFDM_RATE_24MB:
ret = DESC_RATE24M;
break;
case IEEE80211_OFDM_RATE_36MB:
ret = DESC_RATE36M;
break;
case IEEE80211_OFDM_RATE_48MB:
ret = DESC_RATE48M;
break;
case IEEE80211_OFDM_RATE_54MB:
ret = DESC_RATE54M;
break;
default:
break;
}
return ret;
}
void hal_set_brate_cfg(u8 *brates, u16 *rate_cfg)
{
u8 i, is_brate, brate;
for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
is_brate = brates[i] & IEEE80211_BASIC_RATE_MASK;
brate = brates[i] & 0x7f;
if (is_brate) {
switch (brate) {
case IEEE80211_CCK_RATE_1MB:
*rate_cfg |= RATE_1M;
break;
case IEEE80211_CCK_RATE_2MB:
*rate_cfg |= RATE_2M;
break;
case IEEE80211_CCK_RATE_5MB:
*rate_cfg |= RATE_5_5M;
break;
case IEEE80211_CCK_RATE_11MB:
*rate_cfg |= RATE_11M;
break;
case IEEE80211_OFDM_RATE_6MB:
*rate_cfg |= RATE_6M;
break;
case IEEE80211_OFDM_RATE_9MB:
*rate_cfg |= RATE_9M;
break;
case IEEE80211_OFDM_RATE_12MB:
*rate_cfg |= RATE_12M;
break;
case IEEE80211_OFDM_RATE_18MB:
*rate_cfg |= RATE_18M;
break;
case IEEE80211_OFDM_RATE_24MB:
*rate_cfg |= RATE_24M;
break;
case IEEE80211_OFDM_RATE_36MB:
*rate_cfg |= RATE_36M;
break;
case IEEE80211_OFDM_RATE_48MB:
*rate_cfg |= RATE_48M;
break;
case IEEE80211_OFDM_RATE_54MB:
*rate_cfg |= RATE_54M;
break;
}
}
}
}
static void one_out_pipe(struct adapter *adapter)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter);
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
}
static void two_out_pipe(struct adapter *adapter, bool wifi_cfg)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter);
if (wifi_cfg) {
/*
* WMM
* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA
* 0, 1, 0, 1, 0, 0, 0, 0, 0
* 0:H, 1:L
*/
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
} else {
/*
* typical setting
* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA
* 1, 1, 0, 0, 0, 0, 0, 0, 0
* 0:H, 1:L
*/
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
}
}
static void three_out_pipe(struct adapter *adapter, bool wifi_cfg)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter);
if (wifi_cfg) {
/*
* for WMM
* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA
* 1, 2, 1, 0, 0, 0, 0, 0, 0
* 0:H, 1:N, 2:L
*/
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
} else {
/*
* typical setting
* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA
* 2, 2, 1, 0, 0, 0, 0, 0, 0
* 0:H, 1:N, 2:L
*/
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
}
}
bool hal_mapping_out_pipe(struct adapter *adapter, u8 numoutpipe)
{
struct registry_priv *pregistrypriv = &adapter->registrypriv;
bool wifi_cfg = (pregistrypriv->wifi_spec) ? true : false;
bool result = true;
switch (numoutpipe) {
case 1:
one_out_pipe(adapter);
break;
case 2:
two_out_pipe(adapter, wifi_cfg);
break;
case 3:
three_out_pipe(adapter, wifi_cfg);
break;
default:
result = false;
}
return result;
}

59
drivers/staging/rtl8188eu/hal/hal_intf.c
View File

@ -1,59 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <hal_intf.h>
uint rtw_hal_init(struct adapter *adapt)
{
uint status = _SUCCESS;
adapt->hw_init_completed = false;
status = rtl8188eu_hal_init(adapt);
if (status == _SUCCESS) {
adapt->hw_init_completed = true;
if (adapt->registrypriv.notch_filter == 1)
rtw_hal_notch_filter(adapt, 1);
} else {
adapt->hw_init_completed = false;
}
return status;
}
uint rtw_hal_deinit(struct adapter *adapt)
{
uint status = _SUCCESS;
status = rtl8188eu_hal_deinit(adapt);
if (status == _SUCCESS)
adapt->hw_init_completed = false;
return status;
}
void rtw_hal_update_ra_mask(struct adapter *adapt, u32 mac_id, u8 rssi_level)
{
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
#ifdef CONFIG_88EU_AP_MODE
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &adapt->stapriv;
if (mac_id - 1 > 0)
psta = pstapriv->sta_aid[mac_id - 2];
if (psta)
add_RATid(adapt, psta, 0);/* todo: based on rssi_level*/
#endif
} else {
UpdateHalRAMask8188EUsb(adapt, mac_id, rssi_level);
}
}

966
drivers/staging/rtl8188eu/hal/odm.c
View File

@ -1,966 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <linux/etherdevice.h>
#include "odm_precomp.h"
#include "phy.h"
/* avoid to warn in FreeBSD ==> To DO modify */
static u32 EDCAParam[HT_IOT_PEER_MAX][3] = {
/* UL DL */
{0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */
{0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */
{0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */
{0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */
{0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */
{0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */
{0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */
{0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */
{0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */
{0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */
};
/* Global var */
u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = {
0x7f8001fe, /* 0, +6.0dB */
0x788001e2, /* 1, +5.5dB */
0x71c001c7, /* 2, +5.0dB */
0x6b8001ae, /* 3, +4.5dB */
0x65400195, /* 4, +4.0dB */
0x5fc0017f, /* 5, +3.5dB */
0x5a400169, /* 6, +3.0dB */
0x55400155, /* 7, +2.5dB */
0x50800142, /* 8, +2.0dB */
0x4c000130, /* 9, +1.5dB */
0x47c0011f, /* 10, +1.0dB */
0x43c0010f, /* 11, +0.5dB */
0x40000100, /* 12, +0dB */
0x3c8000f2, /* 13, -0.5dB */
0x390000e4, /* 14, -1.0dB */
0x35c000d7, /* 15, -1.5dB */
0x32c000cb, /* 16, -2.0dB */
0x300000c0, /* 17, -2.5dB */
0x2d4000b5, /* 18, -3.0dB */
0x2ac000ab, /* 19, -3.5dB */
0x288000a2, /* 20, -4.0dB */
0x26000098, /* 21, -4.5dB */
0x24000090, /* 22, -5.0dB */
0x22000088, /* 23, -5.5dB */
0x20000080, /* 24, -6.0dB */
0x1e400079, /* 25, -6.5dB */
0x1c800072, /* 26, -7.0dB */
0x1b00006c, /* 27. -7.5dB */
0x19800066, /* 28, -8.0dB */
0x18000060, /* 29, -8.5dB */
0x16c0005b, /* 30, -9.0dB */
0x15800056, /* 31, -9.5dB */
0x14400051, /* 32, -10.0dB */
0x1300004c, /* 33, -10.5dB */
0x12000048, /* 34, -11.0dB */
0x11000044, /* 35, -11.5dB */
0x10000040, /* 36, -12.0dB */
0x0f00003c,/* 37, -12.5dB */
0x0e400039,/* 38, -13.0dB */
0x0d800036,/* 39, -13.5dB */
0x0cc00033,/* 40, -14.0dB */
0x0c000030,/* 41, -14.5dB */
0x0b40002d,/* 42, -15.0dB */
};
u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
};
u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
};
#define RxDefaultAnt1 0x65a9
#define RxDefaultAnt2 0x569a
/* 3 Export Interface */
/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */
void ODM_DMInit(struct odm_dm_struct *pDM_Odm)
{
/* 2012.05.03 Luke: For all IC series */
odm_CommonInfoSelfInit(pDM_Odm);
odm_DIGInit(pDM_Odm);
odm_RateAdaptiveMaskInit(pDM_Odm);
odm_DynamicTxPowerInit(pDM_Odm);
odm_TXPowerTrackingInit(pDM_Odm);
ODM_EdcaTurboInit(pDM_Odm);
ODM_RAInfo_Init_all(pDM_Odm);
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
odm_InitHybridAntDiv(pDM_Odm);
}
/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */
/* You can not add any dummy function here, be care, you can only use DM structure */
/* to perform any new ODM_DM. */
void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm)
{
/* 2012.05.03 Luke: For all IC series */
odm_CommonInfoSelfUpdate(pDM_Odm);
odm_FalseAlarmCounterStatistics(pDM_Odm);
odm_RSSIMonitorCheck(pDM_Odm);
/* Fix Leave LPS issue */
odm_DIG(pDM_Odm);
odm_CCKPacketDetectionThresh(pDM_Odm);
if (*pDM_Odm->pbPowerSaving)
return;
odm_RefreshRateAdaptiveMask(pDM_Odm);
if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) ||
(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||
(pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV))
odm_HwAntDiv(pDM_Odm);
ODM_TXPowerTrackingCheck(pDM_Odm);
odm_EdcaTurboCheck(pDM_Odm);
}
void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue)
{
if (CmnInfo == ODM_CMNINFO_STA_STATUS)
pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue;
}
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm)
{
struct adapter *adapter = pDM_Odm->Adapter;
pDM_Odm->bCckHighPower = (bool)phy_query_bb_reg(adapter, 0x824, BIT(9));
pDM_Odm->RFPathRxEnable = (u8)phy_query_bb_reg(adapter, 0xc04, 0x0F);
}
void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm)
{
u8 EntryCnt = 0;
u8 i;
struct sta_info *pEntry;
if (*pDM_Odm->pBandWidth == ODM_BW40M) {
if (*pDM_Odm->pSecChOffset == 1)
pDM_Odm->ControlChannel = *pDM_Odm->pChannel - 2;
else if (*pDM_Odm->pSecChOffset == 2)
pDM_Odm->ControlChannel = *pDM_Odm->pChannel + 2;
} else {
pDM_Odm->ControlChannel = *pDM_Odm->pChannel;
}
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
pEntry = pDM_Odm->pODM_StaInfo[i];
if (IS_STA_VALID(pEntry))
EntryCnt++;
}
if (EntryCnt == 1)
pDM_Odm->bOneEntryOnly = true;
else
pDM_Odm->bOneEntryOnly = false;
}
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI)
{
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
struct adapter *adapter = pDM_Odm->Adapter;
if (pDM_DigTable->CurIGValue != CurrentIGI) {
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI);
pDM_DigTable->CurIGValue = CurrentIGI;
}
}
void odm_DIGInit(struct odm_dm_struct *pDM_Odm)
{
struct adapter *adapter = pDM_Odm->Adapter;
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
pDM_DigTable->CurIGValue = (u8)phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N);
pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW;
pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH;
pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW;
pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH;
pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC;
pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC;
pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT;
pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
pDM_DigTable->PreCCK_CCAThres = 0xFF;
pDM_DigTable->CurCCK_CCAThres = 0x83;
pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC;
pDM_DigTable->LargeFAHit = 0;
pDM_DigTable->Recover_cnt = 0;
pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC;
pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC;
pDM_DigTable->bMediaConnect_0 = false;
pDM_DigTable->bMediaConnect_1 = false;
/* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */
pDM_Odm->bDMInitialGainEnable = true;
}
void odm_DIG(struct odm_dm_struct *pDM_Odm)
{
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt;
u8 DIG_Dynamic_MIN;
u8 DIG_MaxOfMin;
bool FirstConnect, FirstDisConnect;
u8 dm_dig_max, dm_dig_min;
u8 CurrentIGI = pDM_DigTable->CurIGValue;
if ((!(pDM_Odm->SupportAbility & ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)))
return;
if (*pDM_Odm->pbScanInProcess)
return;
/* add by Neil Chen to avoid PSD is processing */
if (!pDM_Odm->bDMInitialGainEnable)
return;
DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0);
FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
/* 1 Boundary Decision */
dm_dig_max = DM_DIG_MAX_NIC;
dm_dig_min = DM_DIG_MIN_NIC;
DIG_MaxOfMin = DM_DIG_MAX_AP;
if (pDM_Odm->bLinked) {
/* 2 Modify DIG upper bound */
if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max)
pDM_DigTable->rx_gain_range_max = dm_dig_max;
else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min)
pDM_DigTable->rx_gain_range_max = dm_dig_min;
else
pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20;
/* 2 Modify DIG lower bound */
if (pDM_Odm->bOneEntryOnly) {
if (pDM_Odm->RSSI_Min < dm_dig_min)
DIG_Dynamic_MIN = dm_dig_min;
else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin)
DIG_Dynamic_MIN = DIG_MaxOfMin;
else
DIG_Dynamic_MIN = pDM_Odm->RSSI_Min;
} else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) {
/* 1 Lower Bound for 88E AntDiv */
if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)
DIG_Dynamic_MIN = (u8)pDM_DigTable->AntDiv_RSSI_max;
} else {
DIG_Dynamic_MIN = dm_dig_min;
}
} else {
pDM_DigTable->rx_gain_range_max = dm_dig_max;
DIG_Dynamic_MIN = dm_dig_min;
}
/* 1 Modify DIG lower bound, deal with abnormally large false alarm */
if (pFalseAlmCnt->Cnt_all > 10000) {
if (pDM_DigTable->LargeFAHit != 3)
pDM_DigTable->LargeFAHit++;
if (pDM_DigTable->ForbiddenIGI < CurrentIGI) {
pDM_DigTable->ForbiddenIGI = CurrentIGI;
pDM_DigTable->LargeFAHit = 1;
}
if (pDM_DigTable->LargeFAHit >= 3) {
if ((pDM_DigTable->ForbiddenIGI + 1) > pDM_DigTable->rx_gain_range_max)
pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max;
else
pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */
}
} else {
/* Recovery mechanism for IGI lower bound */
if (pDM_DigTable->Recover_cnt != 0) {
pDM_DigTable->Recover_cnt--;
} else {
if (pDM_DigTable->LargeFAHit < 3) {
if ((pDM_DigTable->ForbiddenIGI - 1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */
pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */
pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */
} else {
pDM_DigTable->ForbiddenIGI--;
pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1);
}
} else {
pDM_DigTable->LargeFAHit = 0;
}
}
}
/* 1 Adjust initial gain by false alarm */
if (pDM_Odm->bLinked) {
if (FirstConnect) {
CurrentIGI = pDM_Odm->RSSI_Min;
} else {
if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2)
CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */
else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1)
CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */
else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0)
CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
}
} else {
if (FirstDisConnect) {
CurrentIGI = pDM_DigTable->rx_gain_range_min;
} else {
/* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */
if (pFalseAlmCnt->Cnt_all > 10000)
CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */
else if (pFalseAlmCnt->Cnt_all > 8000)
CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */
else if (pFalseAlmCnt->Cnt_all < 500)
CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */
}
}
/* 1 Check initial gain by upper/lower bound */
if (CurrentIGI > pDM_DigTable->rx_gain_range_max)
CurrentIGI = pDM_DigTable->rx_gain_range_max;
if (CurrentIGI < pDM_DigTable->rx_gain_range_min)
CurrentIGI = pDM_DigTable->rx_gain_range_min;
/* 2 High power RSSI threshold */
ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */
pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked;
pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN;
}
/* 3============================================================ */
/* 3 FASLE ALARM CHECK */
/* 3============================================================ */
void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm)
{
struct adapter *adapter = pDM_Odm->Adapter;
u32 ret_value;
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
return;
/* hold ofdm counter */
phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1); /* hold page C counter */
phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1); /* hold page D counter */
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
FalseAlmCnt->Cnt_Fast_Fsync = (ret_value & 0xffff);
FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000) >> 16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff);
FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000) >> 16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
FalseAlmCnt->Cnt_Rate_Illegal = (ret_value & 0xffff);
FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000) >> 16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
FalseAlmCnt->Cnt_Mcs_fail = (ret_value & 0xffff);
FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal +
FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail +
FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail;
ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord);
FalseAlmCnt->Cnt_BW_LSC = (ret_value & 0xffff);
FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000) >> 16;
/* hold cck counter */
phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
FalseAlmCnt->Cnt_Cck_fail = ret_value;
ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8;
ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
FalseAlmCnt->Cnt_CCK_CCA = ((ret_value & 0xFF) << 8) | ((ret_value & 0xFF00) >> 8);
FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync +
FalseAlmCnt->Cnt_SB_Search_fail +
FalseAlmCnt->Cnt_Parity_Fail +
FalseAlmCnt->Cnt_Rate_Illegal +
FalseAlmCnt->Cnt_Crc8_fail +
FalseAlmCnt->Cnt_Mcs_fail +
FalseAlmCnt->Cnt_Cck_fail);
FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA;
}
/* 3============================================================ */
/* 3 CCK Packet Detect Threshold */
/* 3============================================================ */
void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm)
{
u8 CurCCK_CCAThres;
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD | ODM_BB_FA_CNT)))
return;
if (pDM_Odm->ExtLNA)
return;
if (pDM_Odm->bLinked) {
if (pDM_Odm->RSSI_Min > 25) {
CurCCK_CCAThres = 0xcd;
} else if (pDM_Odm->RSSI_Min > 10) {
CurCCK_CCAThres = 0x83;
} else {
if (FalseAlmCnt->Cnt_Cck_fail > 1000)
CurCCK_CCAThres = 0x83;
else
CurCCK_CCAThres = 0x40;
}
} else {
if (FalseAlmCnt->Cnt_Cck_fail > 1000)
CurCCK_CCAThres = 0x83;
else
CurCCK_CCAThres = 0x40;
}
ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres);
}
void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres)
{
struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable;
struct adapter *adapt = pDM_Odm->Adapter;
if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */
usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres);
pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
}
void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal)
{
struct adapter *adapter = pDM_Odm->Adapter;
struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable;
u8 Rssi_Up_bound = 30;
u8 Rssi_Low_bound = 25;
if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */
Rssi_Up_bound = 50;
Rssi_Low_bound = 45;
}
if (pDM_PSTable->initialize == 0) {
pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord) & 0x1CC000) >> 14;
pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord) & BIT(3)) >> 3;
pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord) & 0xFF000000) >> 24;
pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord) & 0xF000) >> 12;
pDM_PSTable->initialize = 1;
}
if (!bForceInNormal) {
if (pDM_Odm->RSSI_Min != 0xFF) {
if (pDM_PSTable->PreRFState == RF_Normal) {
if (pDM_Odm->RSSI_Min >= Rssi_Up_bound)
pDM_PSTable->CurRFState = RF_Save;
else
pDM_PSTable->CurRFState = RF_Normal;
} else {
if (pDM_Odm->RSSI_Min <= Rssi_Low_bound)
pDM_PSTable->CurRFState = RF_Normal;
else
pDM_PSTable->CurRFState = RF_Save;
}
} else {
pDM_PSTable->CurRFState = RF_MAX;
}
} else {
pDM_PSTable->CurRFState = RF_Normal;
}
if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
if (pDM_PSTable->CurRFState == RF_Save) {
phy_set_bb_reg(adapter, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */
phy_set_bb_reg(adapter, 0xc70, BIT(3), 0); /* RegC70[3]=1'b0 */
phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */
phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */
phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */
phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0); /* Reg818[28]=1'b0 */
phy_set_bb_reg(adapter, 0x818, BIT(28), 0x1); /* Reg818[28]=1'b1 */
} else {
phy_set_bb_reg(adapter, 0x874, 0x1CC000, pDM_PSTable->Reg874);
phy_set_bb_reg(adapter, 0xc70, BIT(3), pDM_PSTable->RegC70);
phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74);
phy_set_bb_reg(adapter, 0x818, BIT(28), 0x0);
}
pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
}
}
/* 3============================================================ */
/* 3 RATR MASK */
/* 3============================================================ */
/* 3============================================================ */
/* 3 Rate Adaptive */
/* 3============================================================ */
void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm)
{
struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive;
pOdmRA->Type = DM_Type_ByDriver;
if (pOdmRA->Type == DM_Type_ByDriver)
pDM_Odm->bUseRAMask = true;
else
pDM_Odm->bUseRAMask = false;
pOdmRA->RATRState = DM_RATR_STA_INIT;
pOdmRA->HighRSSIThresh = 50;
pOdmRA->LowRSSIThresh = 20;
}
u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level)
{
struct sta_info *pEntry;
u32 rate_bitmap = 0x0fffffff;
u8 WirelessMode;
pEntry = pDM_Odm->pODM_StaInfo[macid];
if (!IS_STA_VALID(pEntry))
return ra_mask;
WirelessMode = pEntry->wireless_mode;
switch (WirelessMode) {
case ODM_WM_B:
if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */
rate_bitmap = 0x0000000d;
else
rate_bitmap = 0x0000000f;
break;
case (ODM_WM_A | ODM_WM_G):
if (rssi_level == DM_RATR_STA_HIGH)
rate_bitmap = 0x00000f00;
else
rate_bitmap = 0x00000ff0;
break;
case (ODM_WM_B | ODM_WM_G):
if (rssi_level == DM_RATR_STA_HIGH)
rate_bitmap = 0x00000f00;
else if (rssi_level == DM_RATR_STA_MIDDLE)
rate_bitmap = 0x00000ff0;
else
rate_bitmap = 0x00000ff5;
break;
case (ODM_WM_B | ODM_WM_G | ODM_WM_N24G):
case (ODM_WM_A | ODM_WM_B | ODM_WM_G | ODM_WM_N24G):
if (rssi_level == DM_RATR_STA_HIGH) {
rate_bitmap = 0x000f0000;
} else if (rssi_level == DM_RATR_STA_MIDDLE) {
rate_bitmap = 0x000ff000;
} else {
if (*pDM_Odm->pBandWidth == ODM_BW40M)
rate_bitmap = 0x000ff015;
else
rate_bitmap = 0x000ff005;
}
break;
default:
/* case WIRELESS_11_24N: */
/* case WIRELESS_11_5N: */
rate_bitmap = 0x0fffffff;
break;
}
return rate_bitmap;
}
/* Update rate table mask according to rssi */
void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK))
return;
/* */
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
/* HW dynamic mechanism. */
/* */
odm_RefreshRateAdaptiveMaskCE(pDM_Odm);
}
void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm)
{
u8 i;
struct adapter *pAdapter = pDM_Odm->Adapter;
if (pAdapter->bDriverStopped)
return;
if (!pDM_Odm->bUseRAMask)
return;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i];
if (IS_STA_VALID(pstat)) {
if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level))
rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level);
}
}
}
/* Return Value: bool */
/* - true: RATRState is changed. */
bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState)
{
struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive;
const u8 GoUpGap = 5;
u8 HighRSSIThreshForRA = pRA->HighRSSIThresh;
u8 LowRSSIThreshForRA = pRA->LowRSSIThresh;
u8 RATRState;
struct device *dev = dvobj_to_dev(adapter_to_dvobj(pDM_Odm->Adapter));
/* Threshold Adjustment: */
/* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */
/* Here GoUpGap is added to solve the boundary's level alternation issue. */
switch (*pRATRState) {
case DM_RATR_STA_INIT:
case DM_RATR_STA_HIGH:
break;
case DM_RATR_STA_MIDDLE:
HighRSSIThreshForRA += GoUpGap;
break;
case DM_RATR_STA_LOW:
HighRSSIThreshForRA += GoUpGap;
LowRSSIThreshForRA += GoUpGap;
break;
default:
dev_err(dev, "%s(): wrong rssi level setting %d!\n", __func__, *pRATRState);
break;
}
/* Decide RATRState by RSSI. */
if (HighRSSIThreshForRA < RSSI)
RATRState = DM_RATR_STA_HIGH;
else if (LowRSSIThreshForRA < RSSI)
RATRState = DM_RATR_STA_MIDDLE;
else
RATRState = DM_RATR_STA_LOW;
if (*pRATRState != RATRState || bForceUpdate) {
*pRATRState = RATRState;
return true;
}
return false;
}
/* 3============================================================ */
/* 3 Dynamic Tx Power */
/* 3============================================================ */
void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm)
{
struct adapter *Adapter = pDM_Odm->Adapter;
struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv;
pdmpriv->bDynamicTxPowerEnable = false;
pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
}
/* 3============================================================ */
/* 3 RSSI Monitor */
/* 3============================================================ */
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
return;
/* */
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
/* HW dynamic mechanism. */
/* */
odm_RSSIMonitorCheckCE(pDM_Odm);
} /* odm_RSSIMonitorCheck */
static void FindMinimumRSSI(struct adapter *pAdapter)
{
struct dm_priv *pdmpriv = &pAdapter->HalData->dmpriv;
/* 1 1.Unconditionally set RSSI */
pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
}
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm)
{
struct adapter *Adapter = pDM_Odm->Adapter;
struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv;
int i;
int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
u8 sta_cnt = 0;
u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */
struct sta_info *psta;
if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED))
return;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
psta = pDM_Odm->pODM_StaInfo[i];
if (IS_STA_VALID(psta) &&
(psta->state & WIFI_ASOC_STATE) &&
!is_broadcast_ether_addr(psta->hwaddr) &&
memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) {
if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1))
PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB << 16));
}
}
for (i = 0; i < sta_cnt; i++) {
if (PWDB_rssi[i] != 0) {
ODM_RA_SetRSSI_8188E(&Adapter->HalData->odmpriv,
PWDB_rssi[i] & 0xFF,
(PWDB_rssi[i] >> 16) & 0xFF);
}
}
if (tmpEntryMaxPWDB != 0) /* If associated entry is found */
pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
else
pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */
pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
else
pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
FindMinimumRSSI(Adapter);
Adapter->HalData->odmpriv.RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM;
}
/* 3============================================================ */
/* 3 Tx Power Tracking */
/* 3============================================================ */
void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm)
{
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
if (*pDM_Odm->mp_mode != 1)
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
}
void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm)
{
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
/* HW dynamic mechanism. */
struct adapter *Adapter = pDM_Odm->Adapter;
if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
return;
if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */
phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
return;
}
rtl88eu_dm_txpower_tracking_callback_thermalmeter(Adapter);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 0;
}
/* 3============================================================ */
/* 3 SW Antenna Diversity */
/* 3============================================================ */
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
return;
rtl88eu_dm_antenna_div_init(pDM_Odm);
}
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm)
{
if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
return;
rtl88eu_dm_antenna_diversity(pDM_Odm);
}
/* EDCA Turbo */
void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm)
{
struct adapter *Adapter = pDM_Odm->Adapter;
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
Adapter->recvpriv.bIsAnyNonBEPkts = false;
} /* ODM_InitEdcaTurbo */
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm)
{
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
/* HW dynamic mechanism. */
if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
return;
odm_EdcaTurboCheckCE(pDM_Odm);
} /* odm_CheckEdcaTurbo */
void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm)
{
struct adapter *Adapter = pDM_Odm->Adapter;
u32 trafficIndex;
u32 edca_param;
u64 cur_tx_bytes = 0;
u64 cur_rx_bytes = 0;
u8 bbtchange = false;
struct xmit_priv *pxmitpriv = &Adapter->xmitpriv;
struct recv_priv *precvpriv = &Adapter->recvpriv;
struct registry_priv *pregpriv = &Adapter->registrypriv;
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (pregpriv->wifi_spec == 1) /* (pmlmeinfo->HT_enable == 0)) */
goto dm_CheckEdcaTurbo_EXIT;
if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX)
goto dm_CheckEdcaTurbo_EXIT;
/* Check if the status needs to be changed. */
if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
/* traffic, TX or RX */
if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) ||
(pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) {
if (cur_tx_bytes > (cur_rx_bytes << 2)) {
/* Uplink TP is present. */
trafficIndex = UP_LINK;
} else {
/* Balance TP is present. */
trafficIndex = DOWN_LINK;
}
} else {
if (cur_rx_bytes > (cur_tx_bytes << 2)) {
/* Downlink TP is present. */
trafficIndex = DOWN_LINK;
} else {
/* Balance TP is present. */
trafficIndex = UP_LINK;
}
}
if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) {
if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N))
edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex];
else
edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex];
usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
}
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true;
} else {
/* Turn Off EDCA turbo here. */
/* Restore original EDCA according to the declaration of AP. */
if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) {
usb_write32(Adapter, REG_EDCA_BE_PARAM,
Adapter->HalData->AcParam_BE);
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
}
}
dm_CheckEdcaTurbo_EXIT:
/* Set variables for next time. */
precvpriv->bIsAnyNonBEPkts = false;
pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes;
precvpriv->last_rx_bytes = precvpriv->rx_bytes;
}

397
drivers/staging/rtl8188eu/hal/odm_hwconfig.c
View File

@ -1,397 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include "odm_precomp.h"
#define READ_AND_CONFIG READ_AND_CONFIG_MP
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
static u8 odm_query_rxpwrpercentage(s8 antpower)
{
if ((antpower <= -100) || (antpower >= 20))
return 0;
else if (antpower >= 0)
return 100;
else
return 100 + antpower;
}
/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
/* IF other SW team do not support the feature, remove this section.?? */
static s32 odm_signal_scale_mapping(struct odm_dm_struct *dm_odm, s32 currsig)
{
s32 retsig = 0;
if (currsig >= 51 && currsig <= 100)
retsig = 100;
else if (currsig >= 41 && currsig <= 50)
retsig = 80 + ((currsig - 40) * 2);
else if (currsig >= 31 && currsig <= 40)
retsig = 66 + (currsig - 30);
else if (currsig >= 21 && currsig <= 30)
retsig = 54 + (currsig - 20);
else if (currsig >= 10 && currsig <= 20)
retsig = 42 + (((currsig - 10) * 2) / 3);
else if (currsig >= 5 && currsig <= 9)
retsig = 22 + (((currsig - 5) * 3) / 2);
else if (currsig >= 1 && currsig <= 4)
retsig = 6 + (((currsig - 1) * 3) / 2);
else
retsig = currsig;
return retsig;
}
static u8 odm_evm_db_to_percentage(s8 value)
{
/* -33dB~0dB to 0%~99% */
s8 ret_val = clamp(-value, 0, 33) * 3;
if (ret_val == 99)
ret_val = 100;
return ret_val;
}
static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo)
{
struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
u8 i, max_spatial_stream;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
u8 RSSI, total_rssi = 0;
bool is_cck_rate;
u8 rf_rx_num = 0;
u8 cck_highpwr = 0;
u8 LNA_idx, VGA_idx;
struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M &&
pPktinfo->Rate <= DESC92C_RATE11M;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
if (is_cck_rate) {
u8 cck_agc_rpt;
dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
/* (1)Hardware does not provide RSSI for CCK */
/* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
cck_highpwr = dm_odm->bCckHighPower;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
/* The RSSI formula should be modified according to the gain table */
/* In 88E, cck_highpwr is always set to 1 */
LNA_idx = (cck_agc_rpt & 0xE0) >> 5;
VGA_idx = cck_agc_rpt & 0x1F;
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2 * (5 - VGA_idx);
break;
case 1:
rx_pwr_all = 8 - 2 * VGA_idx;
break;
case 0:
rx_pwr_all = 14 - 2 * VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
pPhyInfo->RxPWDBAll = PWDB_ALL;
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
pPhyInfo->RecvSignalPower = rx_pwr_all;
/* (3) Get Signal Quality (EVM) */
if (pPktinfo->bPacketMatchBSSID) {
u8 SQ, SQ_rpt;
if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
SQ = 100;
} else {
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
if (SQ_rpt > 64)
SQ = 0;
else if (SQ_rpt < 20)
SQ = 100;
else
SQ = ((64 - SQ_rpt) * 100) / 44;
}
pPhyInfo->SignalQuality = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
}
} else { /* is OFDM rate */
dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
/* (1)Get RSSI for HT rate */
for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
/* 2008/01/30 MH we will judge RF RX path now. */
if (dm_odm->RFPathRxEnable & BIT(i))
rf_rx_num++;
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F) * 2) - 110;
pPhyInfo->RxPwr[i] = rx_pwr[i];
/* Translate DBM to percentage. */
RSSI = odm_query_rxpwrpercentage(rx_pwr[i]);
total_rssi += RSSI;
/* Modification for ext-LNA board */
if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
if ((pPhyStaRpt->path_agc[i].trsw) == 1)
RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
else
RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
if ((RSSI <= 34) && (RSSI >= 4))
RSSI -= 4;
}
pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
/* Get Rx snr value in DB */
pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
}
/* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
PWDB_ALL = odm_query_rxpwrpercentage(rx_pwr_all);
PWDB_ALL_BT = PWDB_ALL;
pPhyInfo->RxPWDBAll = PWDB_ALL;
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
pPhyInfo->RxPower = rx_pwr_all;
pPhyInfo->RecvSignalPower = rx_pwr_all;
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
max_spatial_stream = 2; /* both spatial stream make sense */
else
max_spatial_stream = 1; /* only spatial stream 1 makes sense */
for (i = 0; i < max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
}
}
/* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
/* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
if (is_cck_rate) {
pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
} else {
if (rf_rx_num != 0)
pPhyInfo->SignalStrength = (u8)(odm_signal_scale_mapping(dm_odm, total_rssi /= rf_rx_num));
}
/* For 92C/92D HW (Hybrid) Antenna Diversity */
pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
/* For 88E HW Antenna Diversity */
dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
}
static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
struct odm_per_pkt_info *pPktinfo)
{
s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
s32 UndecoratedSmoothedOFDM, RSSI_Ave;
bool is_cck_rate;
u8 RSSI_max, RSSI_min, i;
u32 OFDM_pkt = 0;
u32 Weighting = 0;
struct sta_info *pEntry;
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (pPktinfo->StationID == 0xFF)
return;
pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
if (!IS_STA_VALID(pEntry))
return;
if ((!pPktinfo->bPacketMatchBSSID))
return;
is_cck_rate = pPktinfo->Rate >= DESC92C_RATE1M &&
pPktinfo->Rate <= DESC92C_RATE11M;
/* Smart Antenna Debug Message------------------ */
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
if (pPktinfo->bPacketToSelf) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
(pDM_FatTable->antsel_rx_keep_1 << 1) |
pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
}
}
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
(pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0;
rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
}
}
/* Smart Antenna Debug Message------------------ */
UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
if (!is_cck_rate) { /* ofdm rate */
if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
} else {
if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
} else {
RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
}
if ((RSSI_max - RSSI_min) < 3)
RSSI_Ave = RSSI_max;
else if ((RSSI_max - RSSI_min) < 6)
RSSI_Ave = RSSI_max - 1;
else if ((RSSI_max - RSSI_min) < 10)
RSSI_Ave = RSSI_max - 2;
else
RSSI_Ave = RSSI_max - 3;
}
/* 1 Process OFDM RSSI */
if (UndecoratedSmoothedOFDM <= 0) { /* initialize */
UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
} else {
if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
UndecoratedSmoothedOFDM =
(((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) +
(RSSI_Ave)) / (Rx_Smooth_Factor);
UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
} else {
UndecoratedSmoothedOFDM =
(((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) +
(RSSI_Ave)) / (Rx_Smooth_Factor);
}
}
pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap << 1) | BIT(0);
} else {
RSSI_Ave = pPhyInfo->RxPWDBAll;
/* 1 Process CCK RSSI */
if (UndecoratedSmoothedCCK <= 0) { /* initialize */
UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
} else {
if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
UndecoratedSmoothedCCK =
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) +
pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
} else {
UndecoratedSmoothedCCK =
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) +
pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
}
}
pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap << 1;
}
/* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
if (pEntry->rssi_stat.ValidBit >= 64)
pEntry->rssi_stat.ValidBit = 64;
else
pEntry->rssi_stat.ValidBit++;
for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap >> i) & BIT(0);
if (pEntry->rssi_stat.ValidBit == 64) {
Weighting = min_t(u32, OFDM_pkt << 4, 64);
UndecoratedSmoothedPWDB = (Weighting * UndecoratedSmoothedOFDM + (64 - Weighting) * UndecoratedSmoothedCCK) >> 6;
} else {
if (pEntry->rssi_stat.ValidBit != 0)
UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
(pEntry->rssi_stat.ValidBit - OFDM_pkt) *
UndecoratedSmoothedCCK) / pEntry->rssi_stat.ValidBit;
else
UndecoratedSmoothedPWDB = 0;
}
pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
}
}
/* Endianness before calling this API */
void odm_phy_status_query(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *phy_info,
u8 *phy_status, struct odm_per_pkt_info *pkt_info)
{
odm_RxPhyStatus92CSeries_Parsing(dm_odm, phy_info, phy_status, pkt_info);
if (dm_odm->RSSI_test)
;/* Select the packets to do RSSI checking for antenna switching. */
else
odm_Process_RSSIForDM(dm_odm, phy_info, pkt_info);
}

335
drivers/staging/rtl8188eu/hal/odm_rtl8188e.c
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@ -1,335 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include "odm_precomp.h"
#include "phy.h"
static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm)
{
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
if (*dm_odm->mp_mode == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);
return;
}
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
value32 | (BIT(23) | BIT(25)));
/* Pin Settings */
phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 1);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);
/* OFDM Settings */
phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
0x000000a0);
/* CCK Settings */
phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1);
rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201);
}
static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm)
{
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
if (*dm_odm->mp_mode == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT(5) | BIT(4) | BIT(3), 0);
return;
}
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
value32 | (BIT(23) | BIT(25)));
/* Pin Settings */
phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1);
/* OFDM Settings */
phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
0x000000a0);
/* CCK Settings */
phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1);
/* Tx Settings */
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0);
rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
/* antenna mapping table */
if (!dm_odm->bIsMPChip) { /* testchip */
phy_set_bb_reg(adapter, ODM_REG_RX_DEFAULT_A_11N,
BIT(10) | BIT(9) | BIT(8), 1);
phy_set_bb_reg(adapter, ODM_REG_RX_DEFAULT_A_11N,
BIT(13) | BIT(12) | BIT(11), 2);
} else { /* MPchip */
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord,
0x0201);
}
}
static void dm_fast_training_init(struct odm_dm_struct *dm_odm)
{
struct adapter *adapter = dm_odm->Adapter;
u32 value32, i;
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if (*dm_odm->mp_mode == 1)
return;
for (i = 0; i < 6; i++) {
dm_fat_tbl->Bssid[i] = 0;
dm_fat_tbl->antSumRSSI[i] = 0;
dm_fat_tbl->antRSSIcnt[i] = 0;
dm_fat_tbl->antAveRSSI[i] = 0;
}
dm_fat_tbl->TrainIdx = 0;
dm_fat_tbl->FAT_State = FAT_NORMAL_STATE;
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord);
phy_set_bb_reg(adapter, 0x4c, bMaskDWord,
value32 | (BIT(23) | BIT(25)));
value32 = phy_query_bb_reg(adapter, 0x7B4, bMaskDWord);
phy_set_bb_reg(adapter, 0x7b4, bMaskDWord,
value32 | (BIT(16) | BIT(17)));
/* Match MAC ADDR */
phy_set_bb_reg(adapter, 0x7b4, 0xFFFF, 0);
phy_set_bb_reg(adapter, 0x7b0, bMaskDWord, 0);
phy_set_bb_reg(adapter, 0x870, BIT(9) | BIT(8), 0);
phy_set_bb_reg(adapter, 0x864, BIT(10), 0);
phy_set_bb_reg(adapter, 0xb2c, BIT(22), 0);
phy_set_bb_reg(adapter, 0xb2c, BIT(31), 1);
phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x000000a0);
/* antenna mapping table */
if (!dm_odm->bIsMPChip) { /* testchip */
phy_set_bb_reg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1);
phy_set_bb_reg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2);
} else { /* MPchip */
phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1);
phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2);
}
/* Default Ant Setting when no fast training */
phy_set_bb_reg(adapter, 0x80c, BIT(21), 1);
phy_set_bb_reg(adapter, 0x864, BIT(5) | BIT(4) | BIT(3), 0);
phy_set_bb_reg(adapter, 0x864, BIT(8) | BIT(7) | BIT(6), 1);
/* Enter Traing state */
phy_set_bb_reg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), 1);
phy_set_bb_reg(adapter, 0xc50, BIT(7), 1);
}
void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm)
{
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
dm_trx_hw_antenna_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)
dm_fast_training_init(dm_odm);
}
void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
struct adapter *adapter = dm_odm->Adapter;
u32 default_ant, optional_ant;
if (dm_fat_tbl->RxIdleAnt == ant)
return;
if (ant == MAIN_ANT) {
default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
} else {
default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
}
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT(5) | BIT(4) | BIT(3), default_ant);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT(8) | BIT(7) | BIT(6), optional_ant);
phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N,
BIT(14) | BIT(13) | BIT(12), default_ant);
phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N,
BIT(6) | BIT(7), default_ant);
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT(5) | BIT(4) | BIT(3), default_ant);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT(8) | BIT(7) | BIT(6), optional_ant);
}
dm_fat_tbl->RxIdleAnt = ant;
}
static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 mac_id)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u8 target_ant;
if (ant == MAIN_ANT)
target_ant = MAIN_ANT_CG_TRX;
else
target_ant = AUX_ANT_CG_TRX;
dm_fat_tbl->antsel_a[mac_id] = target_ant & BIT(0);
dm_fat_tbl->antsel_b[mac_id] = (target_ant & BIT(1)) >> 1;
dm_fat_tbl->antsel_c[mac_id] = (target_ant & BIT(2)) >> 2;
}
void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm,
u8 *desc, u8 mac_id)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
(dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) {
SET_TX_DESC_ANTSEL_A_88E(desc, dm_fat_tbl->antsel_a[mac_id]);
SET_TX_DESC_ANTSEL_B_88E(desc, dm_fat_tbl->antsel_b[mac_id]);
SET_TX_DESC_ANTSEL_C_88E(desc, dm_fat_tbl->antsel_c[mac_id]);
}
}
void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm,
u8 antsel_tr_mux, u32 mac_id, u8 rx_pwdb_all)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CG_TRX) {
dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->MainAnt_Cnt[mac_id]++;
} else {
dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
}
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CGCS_RX) {
dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->MainAnt_Cnt[mac_id]++;
} else {
dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
}
}
}
static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
struct rtw_dig *dig_table = &dm_odm->DM_DigTable;
struct sta_info *entry;
u32 i, min_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0;
u32 local_min_rssi, local_max_rssi;
u32 main_rssi, aux_rssi;
u8 RxIdleAnt = 0, target_ant = 7;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
entry = dm_odm->pODM_StaInfo[i];
if (IS_STA_VALID(entry)) {
/* 2 Calculate RSSI per Antenna */
main_rssi = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ?
(dm_fat_tbl->MainAnt_Sum[i] /
dm_fat_tbl->MainAnt_Cnt[i]) : 0;
aux_rssi = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ?
(dm_fat_tbl->AuxAnt_Sum[i] /
dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
target_ant = (main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT;
/* 2 Select max_rssi for DIG */
local_max_rssi = max(main_rssi, aux_rssi);
if ((local_max_rssi > ant_div_max_rssi) &&
(local_max_rssi < 40))
ant_div_max_rssi = local_max_rssi;
if (local_max_rssi > max_rssi)
max_rssi = local_max_rssi;
/* 2 Select RX Idle Antenna */
if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) &&
(main_rssi == 0))
main_rssi = aux_rssi;
else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) &&
(aux_rssi == 0))
aux_rssi = main_rssi;
local_min_rssi = min(main_rssi, aux_rssi);
if (local_min_rssi < min_rssi) {
min_rssi = local_min_rssi;
RxIdleAnt = target_ant;
}
/* 2 Select TRX Antenna */
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
update_tx_ant_88eu(dm_odm, target_ant, i);
}
dm_fat_tbl->MainAnt_Sum[i] = 0;
dm_fat_tbl->AuxAnt_Sum[i] = 0;
dm_fat_tbl->MainAnt_Cnt[i] = 0;
dm_fat_tbl->AuxAnt_Cnt[i] = 0;
}
/* 2 Set RX Idle Antenna */
rtl88eu_dm_update_rx_idle_ant(dm_odm, RxIdleAnt);
dig_table->AntDiv_RSSI_max = ant_div_max_rssi;
dig_table->RSSI_max = max_rssi;
}
void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
struct adapter *adapter = dm_odm->Adapter;
if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
return;
if (!dm_odm->bLinked) {
if (dm_fat_tbl->bBecomeLinked) {
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
BIT(15), 0);
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
BIT(21), 0);
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
return;
}
if (!dm_fat_tbl->bBecomeLinked) {
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
BIT(15), 1);
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
BIT(21), 1);
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
(dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
rtl88eu_dm_hw_ant_div(dm_odm);
}

1112
drivers/staging/rtl8188eu/hal/phy.c
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File diff suppressed because it is too large Load Diff

36
drivers/staging/rtl8188eu/hal/pwrseq.c
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@ -1,36 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include "pwrseq.h"
#include <rtl8188e_hal.h>
/* drivers should parse below arrays and do the corresponding actions */
/* 3 Power on Array */
struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3Card Disable Array */
struct wl_pwr_cfg rtl8188E_card_disable_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
};
/* 3 Enter LPS */
struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
};

72
drivers/staging/rtl8188eu/hal/pwrseqcmd.c
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@ -1,72 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <pwrseqcmd.h>
#include <usb_ops_linux.h>
/* This routine deals with the Power Configuration CMDs parsing
* for RTL8723/RTL8188E Series IC.
*/
u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, struct wl_pwr_cfg pwrseqcmd[])
{
struct wl_pwr_cfg pwrcfgcmd;
u8 poll_bit = false;
u32 aryidx = 0;
u8 value = 0;
u32 offset = 0;
u32 poll_count = 0; /* polling autoload done. */
u32 max_poll_count = 5000;
do {
pwrcfgcmd = pwrseqcmd[aryidx];
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_WRITE:
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
/* Read the value from system register */
value = usb_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
/* Write the value back to system register */
usb_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
poll_bit = false;
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
do {
value = usb_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(pwrcfgcmd);
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
poll_bit = true;
else
udelay(10);
if (poll_count++ > max_poll_count)
return false;
} while (!poll_bit);
break;
case PWR_CMD_DELAY:
if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
else
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000);
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
return true;
default:
break;
}
aryidx++;/* Add Array Index */
} while (1);
return true;
}

289
drivers/staging/rtl8188eu/hal/rf.c
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@ -1,289 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <osdep_service.h>
#include <drv_types.h>
#include <phy.h>
#include <rf.h>
#include <rtl8188e_hal.h>
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth)
{
struct hal_data_8188e *hal_data = adapt->HalData;
switch (bandwidth) {
case HT_CHANNEL_WIDTH_20:
hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
0xfffff3ff) | BIT(10) | BIT(11));
phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
hal_data->RfRegChnlVal[0]);
break;
case HT_CHANNEL_WIDTH_40:
hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
0xfffff3ff) | BIT(10));
phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
hal_data->RfRegChnlVal[0]);
break;
default:
break;
}
}
void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
{
struct hal_data_8188e *hal_data = adapt->HalData;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
tx_agc[RF_PATH_A] = 0x3f3f3f3f;
tx_agc[RF_PATH_B] = 0x3f3f3f3f;
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
tx_agc[idx1] = powerlevel[idx1] |
(powerlevel[idx1] << 8) |
(powerlevel[idx1] << 16) |
(powerlevel[idx1] << 24);
}
} else {
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
tx_agc[RF_PATH_A] = 0x10101010;
tx_agc[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
tx_agc[RF_PATH_A] = 0x00000000;
tx_agc[RF_PATH_B] = 0x00000000;
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
tx_agc[idx1] = powerlevel[idx1] |
(powerlevel[idx1] << 8) |
(powerlevel[idx1] << 16) |
(powerlevel[idx1] << 24);
}
if (hal_data->EEPROMRegulatory == 0) {
tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] +
(hal_data->MCSTxPowerLevelOriginalOffset[0][7] << 8);
tx_agc[RF_PATH_A] += tmpval;
tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] +
(hal_data->MCSTxPowerLevelOriginalOffset[0][15] << 24);
tx_agc[RF_PATH_B] += tmpval;
}
}
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
ptr = (u8 *)(&tx_agc[idx1]);
for (idx2 = 0; idx2 < 4; idx2++) {
if (*ptr > RF6052_MAX_TX_PWR)
*ptr = RF6052_MAX_TX_PWR;
ptr++;
}
}
rtl88eu_dm_txpower_track_adjust(&hal_data->odmpriv, 1, &direction,
&pwrtrac_value);
if (direction == 1) {
/* Increase TX power */
tx_agc[0] += pwrtrac_value;
tx_agc[1] += pwrtrac_value;
} else if (direction == 2) {
/* Decrease TX power */
tx_agc[0] -= pwrtrac_value;
tx_agc[1] -= pwrtrac_value;
}
/* rf-A cck tx power */
tmpval = tx_agc[RF_PATH_A] & 0xff;
phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
tmpval = tx_agc[RF_PATH_A] >> 8;
phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
tmpval = tx_agc[RF_PATH_B] >> 24;
phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
tmpval = tx_agc[RF_PATH_B] & 0x00ffffff;
phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
}
/* powerbase0 for OFDM rates */
/* powerbase1 for HT MCS rates */
static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
u8 *pwr_level_bw20, u8 *pwr_level_bw40,
u8 channel, u32 *ofdmbase, u32 *mcs_base)
{
u32 powerbase0, powerbase1;
u8 i, powerlevel[2];
for (i = 0; i < 2; i++) {
powerbase0 = pwr_level_ofdm[i];
powerbase0 = (powerbase0 << 24) | (powerbase0 << 16) |
(powerbase0 << 8) | powerbase0;
*(ofdmbase + i) = powerbase0;
}
/* Check HT20 to HT40 diff */
if (adapt->HalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerlevel[0] = pwr_level_bw20[0];
else
powerlevel[0] = pwr_level_bw40[0];
powerbase1 = powerlevel[0];
powerbase1 = (powerbase1 << 24) | (powerbase1 << 16) |
(powerbase1 << 8) | powerbase1;
*mcs_base = powerbase1;
}
static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
u8 index, u32 *powerbase0, u32 *powerbase1,
u32 *out_val)
{
struct hal_data_8188e *hal_data = adapt->HalData;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
s8 pwr_diff = 0;
u32 write_val, customer_limit, rf;
u8 regulatory = hal_data->EEPROMRegulatory;
/* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
for (rf = 0; rf < 2; rf++) {
u8 j = index + (rf ? 8 : 0);
switch (regulatory) {
case 0:
chnlGroup = 0;
write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] +
((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 1: /* Realtek regulatory */
/* increase power diff defined by Realtek for regulatory */
if (hal_data->pwrGroupCnt == 1)
chnlGroup = 0;
if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup)
Hal_GetChnlGroup88E(channel, &chnlGroup);
write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] +
((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
write_val = (index < 2) ? powerbase0[rf] : powerbase1[rf];
break;
case 3: /* Customer defined power diff. */
/* increase power diff defined by customer. */
chnlGroup = 0;
if (index < 2)
pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel - 1];
else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
pwr_diff = hal_data->TxPwrHt20Diff[rf][channel - 1];
if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel - 1];
else
customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel - 1];
if (pwr_diff >= customer_pwr_limit)
pwr_diff = 0;
else
pwr_diff = customer_pwr_limit - pwr_diff;
for (i = 0; i < 4; i++) {
pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] &
(0x7f << (i * 8))) >> (i * 8));
if (pwr_diff_limit[i] > pwr_diff)
pwr_diff_limit[i] = pwr_diff;
}
customer_limit = (pwr_diff_limit[3] << 24) |
(pwr_diff_limit[2] << 16) |
(pwr_diff_limit[1] << 8) |
(pwr_diff_limit[0]);
write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
default:
chnlGroup = 0;
write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] +
((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
}
/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
/* 92d do not need this */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
write_val = 0x14141414;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
write_val = 0x00000000;
*(out_val + rf) = write_val;
}
}
static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
{
u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
u8 i, rf, pwr_val[4];
u32 write_val;
u16 regoffset;
for (rf = 0; rf < 2; rf++) {
write_val = pvalue[rf];
for (i = 0; i < 4; i++) {
pwr_val[i] = (u8)((write_val & (0x7f << (i * 8))) >> (i * 8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
write_val = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
(pwr_val[1] << 8) | pwr_val[0];
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
}
}
void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
u8 *pwr_level_ofdm,
u8 *pwr_level_bw20,
u8 *pwr_level_bw40, u8 channel)
{
u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
channel, &powerbase0[0], &powerbase1[0]);
rtl88eu_dm_txpower_track_adjust(&adapt->HalData->odmpriv, 0,
&direction, &pwrtrac_value);
for (index = 0; index < 6; index++) {
get_rx_power_val_by_reg(adapt, channel, index,
&powerbase0[0], &powerbase1[0],
&write_val[0]);
if (direction == 1) {
write_val[0] += pwrtrac_value;
write_val[1] += pwrtrac_value;
} else if (direction == 2) {
write_val[0] -= pwrtrac_value;
write_val[1] -= pwrtrac_value;
}
write_ofdm_pwr_reg(adapt, index, &write_val[0]);
}
}

247
drivers/staging/rtl8188eu/hal/rf_cfg.c
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@ -1,247 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include "odm_precomp.h"
#include <phy.h>
static bool check_condition(struct adapter *adapt, const u32 condition)
{
struct odm_dm_struct *odm = &adapt->HalData->odmpriv;
u32 _board = odm->BoardType;
u32 _platform = odm->SupportPlatform;
u32 _interface = odm->SupportInterface;
u32 cond;
if (condition == 0xCDCDCDCD)
return true;
cond = condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = condition & 0x0000FF00;
cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = condition & 0x00FF0000;
cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
}
/* RadioA_1T.TXT */
static u32 Array_RadioA_1T_8188E[] = {
0x000, 0x00030000,
0x008, 0x00084000,
0x018, 0x00000407,
0x019, 0x00000012,
0x01E, 0x00080009,
0x01F, 0x00000880,
0x02F, 0x0001A060,
0x03F, 0x00000000,
0x042, 0x000060C0,
0x057, 0x000D0000,
0x058, 0x000BE180,
0x067, 0x00001552,
0x083, 0x00000000,
0x0B0, 0x000FF8FC,
0x0B1, 0x00054400,
0x0B2, 0x000CCC19,
0x0B4, 0x00043003,
0x0B6, 0x0004953E,
0x0B7, 0x0001C718,
0x0B8, 0x000060FF,
0x0B9, 0x00080001,
0x0BA, 0x00040000,
0x0BB, 0x00000400,
0x0BF, 0x000C0000,
0x0C2, 0x00002400,
0x0C3, 0x00000009,
0x0C4, 0x00040C91,
0x0C5, 0x00099999,
0x0C6, 0x000000A3,
0x0C7, 0x00088820,
0x0C8, 0x00076C06,
0x0C9, 0x00000000,
0x0CA, 0x00080000,
0x0DF, 0x00000180,
0x0EF, 0x000001A0,
0x051, 0x0006B27D,
0xFF0F041F, 0xABCD,
0x052, 0x0007E4DD,
0xCDCDCDCD, 0xCDCD,
0x052, 0x0007E49D,
0xFF0F041F, 0xDEAD,
0x053, 0x00000073,
0x056, 0x00051FF3,
0x035, 0x00000086,
0x035, 0x00000186,
0x035, 0x00000286,
0x036, 0x00001C25,
0x036, 0x00009C25,
0x036, 0x00011C25,
0x036, 0x00019C25,
0x0B6, 0x00048538,
0x018, 0x00000C07,
0x05A, 0x0004BD00,
0x019, 0x000739D0,
0x034, 0x0000ADF3,
0x034, 0x00009DF0,
0x034, 0x00008DED,
0x034, 0x00007DEA,
0x034, 0x00006DE7,
0x034, 0x000054EE,
0x034, 0x000044EB,
0x034, 0x000034E8,
0x034, 0x0000246B,
0x034, 0x00001468,
0x034, 0x0000006D,
0x000, 0x00030159,
0x084, 0x00068200,
0x086, 0x000000CE,
0x087, 0x00048A00,
0x08E, 0x00065540,
0x08F, 0x00088000,
0x0EF, 0x000020A0,
0x03B, 0x000F02B0,
0x03B, 0x000EF7B0,
0x03B, 0x000D4FB0,
0x03B, 0x000CF060,
0x03B, 0x000B0090,
0x03B, 0x000A0080,
0x03B, 0x00090080,
0x03B, 0x0008F780,
0x03B, 0x000722B0,
0x03B, 0x0006F7B0,
0x03B, 0x00054FB0,
0x03B, 0x0004F060,
0x03B, 0x00030090,
0x03B, 0x00020080,
0x03B, 0x00010080,
0x03B, 0x0000F780,
0x0EF, 0x000000A0,
0x000, 0x00010159,
0x018, 0x0000F407,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01F, 0x00080003,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01E, 0x00000001,
0x01F, 0x00080000,
0x000, 0x00033E60,
};
#define READ_NEXT_PAIR(v1, v2, i) \
do { \
i += 2; v1 = array[i]; \
v2 = array[i + 1]; \
} while (0)
#define RFREG_OFFSET_MASK 0xfffff
#define B3WIREADDREAALENGTH 0x400
#define B3WIREDATALENGTH 0x800
#define BRFSI_RFENV 0x10
static void rtl_rfreg_delay(struct adapter *adapt, enum rf_radio_path rfpath, u32 addr, u32 mask, u32 data)
{
if (addr == 0xfe) {
mdelay(50);
} else if (addr == 0xfd) {
mdelay(5);
} else if (addr == 0xfc) {
mdelay(1);
} else if (addr == 0xfb) {
udelay(50);
} else if (addr == 0xfa) {
udelay(5);
} else if (addr == 0xf9) {
udelay(1);
} else {
phy_set_rf_reg(adapt, rfpath, addr, mask, data);
udelay(1);
}
}
static void rtl8188e_config_rf_reg(struct adapter *adapt, u32 addr, u32 data)
{
u32 content = 0x1000; /*RF Content: radio_a_txt*/
u32 maskforphyset = content & 0xE000;
rtl_rfreg_delay(adapt, RF_PATH_A, addr | maskforphyset,
RFREG_OFFSET_MASK,
data);
}
static bool rtl88e_phy_config_rf_with_headerfile(struct adapter *adapt)
{
u32 i;
u32 array_len = ARRAY_SIZE(Array_RadioA_1T_8188E);
u32 *array = Array_RadioA_1T_8188E;
for (i = 0; i < array_len; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i + 1];
if (v1 < 0xCDCDCDCD) {
rtl8188e_config_rf_reg(adapt, v1, v2);
continue;
} else {
if (!check_condition(adapt, array[i])) {
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD && v2 != 0xCDEF &&
v2 != 0xCDCD && i < array_len - 2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2;
} else {
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD && v2 != 0xCDEF &&
v2 != 0xCDCD && i < array_len - 2) {
rtl8188e_config_rf_reg(adapt, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < array_len - 2)
READ_NEXT_PAIR(v1, v2, i);
}
}
}
return true;
}
bool rtl88eu_phy_rf_config(struct adapter *adapt)
{
struct hal_data_8188e *hal_data = adapt->HalData;
u32 u4val = 0;
bool rtstatus;
struct bb_reg_def *pphyreg;
pphyreg = &hal_data->PHYRegDef[RF90_PATH_A];
u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs, BRFSI_RFENV);
phy_set_bb_reg(adapt, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
udelay(1);
phy_set_bb_reg(adapt, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
udelay(1);
phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2, B3WIREADDREAALENGTH, 0x0);
udelay(1);
phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2, B3WIREDATALENGTH, 0x0);
udelay(1);
rtstatus = rtl88e_phy_config_rf_with_headerfile(adapt);
phy_set_bb_reg(adapt, pphyreg->rfintfs, BRFSI_RFENV, u4val);
return rtstatus;
}

591
drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c
View File

@ -1,591 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTL8188E_CMD_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
#include <rtw_ioctl_set.h>
#include <rtl8188e_hal.h>
#define RTL88E_MAX_H2C_BOX_NUMS 4
#define RTL88E_MAX_CMD_LEN 7
#define RTL88E_MESSAGE_BOX_SIZE 4
#define RTL88E_EX_MESSAGE_BOX_SIZE 4
static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num)
{
u8 read_down = false;
int retry_cnts = 100;
u8 valid;
do {
valid = usb_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
if (valid == 0)
read_down = true;
} while ((!read_down) && (retry_cnts--));
return read_down;
}
/*****************************************
* H2C Msg format :
* 0x1DF - 0x1D0
*| 31 - 8 | 7-5 4 - 0 |
*| h2c_msg |Class_ID CMD_ID |
*
* Extend 0x1FF - 0x1F0
*|31 - 0 |
*|ext_msg|
******************************************/
static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
{
u8 h2c_box_num;
u32 msgbox_addr;
u32 msgbox_ex_addr;
u8 cmd_idx, ext_cmd_len;
u32 h2c_cmd = 0;
u32 h2c_cmd_ex = 0;
s32 ret = _FAIL;
if (!adapt->bFWReady)
return ret;
if (!pCmdBuffer)
goto exit;
if (CmdLen > RTL88E_MAX_CMD_LEN)
goto exit;
if (adapt->bSurpriseRemoved)
goto exit;
/* pay attention to if race condition happened in H2C cmd setting. */
h2c_box_num = adapt->HalData->LastHMEBoxNum;
if (!_is_fw_read_cmd_down(adapt, h2c_box_num))
goto exit;
*(u8 *)(&h2c_cmd) = ElementID;
if (CmdLen <= 3) {
memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, CmdLen);
} else {
memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, 3);
ext_cmd_len = CmdLen - 3;
memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer + 3, ext_cmd_len);
/* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++)
usb_write8(adapt, msgbox_ex_addr + cmd_idx, *((u8 *)(&h2c_cmd_ex) + cmd_idx));
}
/* Write command */
msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++)
usb_write8(adapt, msgbox_addr + cmd_idx, *((u8 *)(&h2c_cmd) + cmd_idx));
adapt->HalData->LastHMEBoxNum =
(h2c_box_num + 1) % RTL88E_MAX_H2C_BOX_NUMS;
ret = _SUCCESS;
exit:
return ret;
}
/* bitmap[0:27] = tx_rate_bitmap */
/* bitmap[28:31]= Rate Adaptive id */
/* arg[0:4] = macid */
/* arg[5] = Short GI */
void rtw_hal_add_ra_tid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
{
struct odm_dm_struct *odmpriv = &pAdapter->HalData->odmpriv;
u8 macid, init_rate, raid, shortGIrate = false;
macid = arg & 0x1f;
raid = (bitmap >> 28) & 0x0f;
bitmap &= 0x0fffffff;
if (rssi_level != DM_RATR_STA_INIT)
bitmap = ODM_Get_Rate_Bitmap(odmpriv, macid, bitmap, rssi_level);
bitmap |= ((raid << 28) & 0xf0000000);
init_rate = get_highest_rate_idx(bitmap & 0x0fffffff) & 0x3f;
shortGIrate = (arg & BIT(5)) ? true : false;
if (shortGIrate)
init_rate |= BIT(6);
raid = (bitmap >> 28) & 0x0f;
bitmap &= 0x0fffffff;
ODM_RA_UpdateRateInfo_8188E(odmpriv, macid, raid, bitmap, shortGIrate);
}
void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
{
struct setpwrmode_parm H2CSetPwrMode;
struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */
switch (Mode) {
case PS_MODE_ACTIVE:
H2CSetPwrMode.Mode = 0;
break;
case PS_MODE_MIN:
H2CSetPwrMode.Mode = 1;
break;
case PS_MODE_MAX:
RLBM = 1;
H2CSetPwrMode.Mode = 1;
break;
case PS_MODE_DTIM:
RLBM = 2;
H2CSetPwrMode.Mode = 1;
break;
case PS_MODE_UAPSD_WMM:
H2CSetPwrMode.Mode = 2;
break;
default:
H2CSetPwrMode.Mode = 0;
break;
}
H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps << 4) & 0xf0) | (RLBM & 0x0f));
H2CSetPwrMode.AwakeInterval = 1;
H2CSetPwrMode.bAllQueueUAPSD = adapt->registrypriv.uapsd_enable;
if (Mode > 0)
H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
else
H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
FillH2CCmd_88E(adapt, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
}
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt)
{
u16 mst_rpt = le16_to_cpu(mstatus_rpt);
FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt);
}
static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
{
struct ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
u32 rate_len, pktlen;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
pwlanhdr = (struct ieee80211_hdr *)pframe;
fctrl = &pwlanhdr->frame_control;
*(fctrl) = 0;
ether_addr_copy(pwlanhdr->addr1, bc_addr);
ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv));
ether_addr_copy(pwlanhdr->addr3, cur_network->MacAddress);
SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
SetFrameSubType(pframe, IEEE80211_STYPE_BEACON);
pframe += sizeof(struct ieee80211_hdr_3addr);
pktlen = sizeof(struct ieee80211_hdr_3addr);
/* timestamp will be inserted by hardware */
pframe += 8;
pktlen += 8;
/* beacon interval: 2 bytes */
memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->ies)), 2);
pframe += 2;
pktlen += 2;
/* capability info: 2 bytes */
memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->ies)), 2);
pframe += 2;
pktlen += 2;
if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
pktlen += cur_network->ie_length - sizeof(struct ndis_802_11_fixed_ie);
memcpy(pframe, cur_network->ies + sizeof(struct ndis_802_11_fixed_ie), pktlen);
goto _ConstructBeacon;
}
/* below for ad-hoc mode */
/* SSID */
pframe = rtw_set_ie(pframe, WLAN_EID_SSID, cur_network->ssid.ssid_length, cur_network->ssid.ssid, &pktlen);
/* supported rates... */
rate_len = rtw_get_rateset_len(cur_network->SupportedRates);
pframe = rtw_set_ie(pframe, WLAN_EID_SUPP_RATES, min_t(u32, rate_len, 8), cur_network->SupportedRates, &pktlen);
/* DS parameter set */
pframe = rtw_set_ie(pframe, WLAN_EID_DS_PARAMS, 1, (unsigned char *)&cur_network->Configuration.DSConfig, &pktlen);
if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) {
u32 ATIMWindow;
/* IBSS Parameter Set... */
ATIMWindow = 0;
pframe = rtw_set_ie(pframe, WLAN_EID_IBSS_PARAMS, 2, (unsigned char *)(&ATIMWindow), &pktlen);
}
/* todo: ERP IE */
/* EXTERNDED SUPPORTED RATE */
if (rate_len > 8)
pframe = rtw_set_ie(pframe, WLAN_EID_EXT_SUPP_RATES, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen);
/* todo:HT for adhoc */
_ConstructBeacon:
if ((pktlen + TXDESC_SIZE) > 512)
return;
*pLength = pktlen;
}
static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength)
{
struct ieee80211_hdr *pwlanhdr;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
__le16 *fctrl;
struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
pwlanhdr = (struct ieee80211_hdr *)pframe;
/* Frame control. */
fctrl = &pwlanhdr->frame_control;
*(fctrl) = 0;
SetPwrMgt(fctrl);
SetFrameSubType(pframe, IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL);
/* AID. */
SetDuration(pframe, (pmlmeinfo->aid | 0xc000));
/* BSSID. */
ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress);
/* TA. */
ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv));
*pLength = 16;
}
static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
u32 *pLength,
u8 *StaAddr,
u8 bQoS,
u8 AC,
u8 bEosp,
u8 bForcePowerSave)
{
struct ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
u32 pktlen;
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
pwlanhdr = (struct ieee80211_hdr *)pframe;
fctrl = &pwlanhdr->frame_control;
*(fctrl) = 0;
if (bForcePowerSave)
SetPwrMgt(fctrl);
switch (cur_network->network.InfrastructureMode) {
case Ndis802_11Infrastructure:
SetToDs(fctrl);
ether_addr_copy(pwlanhdr->addr1, pnetwork->MacAddress);
ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv));
ether_addr_copy(pwlanhdr->addr3, StaAddr);
break;
case Ndis802_11APMode:
SetFrDs(fctrl);
ether_addr_copy(pwlanhdr->addr1, StaAddr);
ether_addr_copy(pwlanhdr->addr2, pnetwork->MacAddress);
ether_addr_copy(pwlanhdr->addr3, myid(&adapt->eeprompriv));
break;
case Ndis802_11IBSS:
default:
ether_addr_copy(pwlanhdr->addr1, StaAddr);
ether_addr_copy(pwlanhdr->addr2, myid(&adapt->eeprompriv));
ether_addr_copy(pwlanhdr->addr3, pnetwork->MacAddress);
break;
}
SetSeqNum(pwlanhdr, 0);
if (bQoS) {
struct ieee80211_qos_hdr *pwlanqoshdr;
SetFrameSubType(pframe, IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_NULLFUNC);
pwlanqoshdr = (struct ieee80211_qos_hdr *)pframe;
SetPriority(&pwlanqoshdr->qos_ctrl, AC);
SetEOSP(&pwlanqoshdr->qos_ctrl, bEosp);
pktlen = sizeof(struct ieee80211_qos_hdr);
} else {
SetFrameSubType(pframe, IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC);
pktlen = sizeof(struct ieee80211_hdr_3addr);
}
*pLength = pktlen;
}
static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u8 *StaAddr, bool bHideSSID)
{
struct ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
u8 *mac, *bssid;
u32 pktlen;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
pwlanhdr = (struct ieee80211_hdr *)pframe;
mac = myid(&adapt->eeprompriv);
bssid = cur_network->MacAddress;
fctrl = &pwlanhdr->frame_control;
*(fctrl) = 0;
ether_addr_copy(pwlanhdr->addr1, StaAddr);
ether_addr_copy(pwlanhdr->addr2, mac);
ether_addr_copy(pwlanhdr->addr3, bssid);
SetSeqNum(pwlanhdr, 0);
SetFrameSubType(fctrl, IEEE80211_STYPE_PROBE_RESP);
pktlen = sizeof(struct ieee80211_hdr_3addr);
pframe += pktlen;
if (cur_network->ie_length > MAX_IE_SZ)
return;
memcpy(pframe, cur_network->ies, cur_network->ie_length);
pframe += cur_network->ie_length;
pktlen += cur_network->ie_length;
*pLength = pktlen;
}
/* */
/* Description: Fill the reserved packets that FW will use to RSVD page. */
/* Now we just send 4 types packet to rsvd page. */
/* (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. */
/* Input: */
/* bDLFinished - false: At the first time we will send all the packets as a large packet to Hw, */
/* so we need to set the packet length to total length. */
/* true: At the second time, we should send the first packet (default:beacon) */
/* to Hw again and set the length in descriptor to the real beacon length. */
/* 2009.10.15 by tynli. */
static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
{
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv;
struct mlme_ext_priv *pmlmeext;
struct mlme_ext_info *pmlmeinfo;
u32 BeaconLength = 0, ProbeRspLength = 0, PSPollLength;
u32 NullDataLength, QosNullLength;
u8 *ReservedPagePacket;
u8 PageNum, PageNeed, TxDescLen;
u16 BufIndex;
u32 TotalPacketLen;
struct rsvdpage_loc RsvdPageLoc;
struct wlan_bssid_ex *pnetwork;
ReservedPagePacket = kzalloc(1000, GFP_KERNEL);
if (!ReservedPagePacket)
return;
pxmitpriv = &adapt->xmitpriv;
pmlmeext = &adapt->mlmeextpriv;
pmlmeinfo = &pmlmeext->mlmext_info;
pnetwork = &pmlmeinfo->network;
TxDescLen = TXDESC_SIZE;
PageNum = 0;
/* 3 (1) beacon * 2 pages */
BufIndex = TXDESC_OFFSET;
ConstructBeacon(adapt, &ReservedPagePacket[BufIndex], &BeaconLength);
/* When we count the first page size, we need to reserve description size for the RSVD */
/* packet, it will be filled in front of the packet in TXPKTBUF. */
PageNeed = (u8)PageNum_128(TxDescLen + BeaconLength);
/* To reserved 2 pages for beacon buffer. 2010.06.24. */
if (PageNeed == 1)
PageNeed += 1;
PageNum += PageNeed;
BufIndex += PageNeed * 128;
/* 3 (2) ps-poll *1 page */
RsvdPageLoc.LocPsPoll = PageNum;
ConstructPSPoll(adapt, &ReservedPagePacket[BufIndex], &PSPollLength);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], PSPollLength, true, false);
PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength);
PageNum += PageNeed;
BufIndex += PageNeed * 128;
/* 3 (3) null data * 1 page */
RsvdPageLoc.LocNullData = PageNum;
ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], &NullDataLength, pnetwork->MacAddress, false, 0, 0, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], NullDataLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength);
PageNum += PageNeed;
BufIndex += PageNeed * 128;
/* 3 (4) probe response * 1page */
RsvdPageLoc.LocProbeRsp = PageNum;
ConstructProbeRsp(adapt, &ReservedPagePacket[BufIndex], &ProbeRspLength, pnetwork->MacAddress, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], ProbeRspLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength);
PageNum += PageNeed;
BufIndex += PageNeed * 128;
/* 3 (5) Qos null data */
RsvdPageLoc.LocQosNull = PageNum;
ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex],
&QosNullLength, pnetwork->MacAddress, true, 0, 0, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], QosNullLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength);
PageNum += PageNeed;
TotalPacketLen = BufIndex + QosNullLength;
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (!pmgntframe)
goto exit;
/* update attribute */
pattrib = &pmgntframe->attrib;
update_mgntframe_attrib(adapt, pattrib);
pattrib->qsel = 0x10;
pattrib->last_txcmdsz = TotalPacketLen - TXDESC_OFFSET;
pattrib->pktlen = pattrib->last_txcmdsz;
memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
rtw_hal_mgnt_xmit(adapt, pmgntframe);
FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
exit:
kfree(ReservedPagePacket);
}
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
{
struct hal_data_8188e *haldata = adapt->HalData;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
bool bSendBeacon = false;
bool bcn_valid = false;
u8 DLBcnCount = 0;
u32 poll = 0;
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */
usb_write16(adapt, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid));
/* Do not set TSF again here or vWiFi beacon DMA INT will not work. */
/* Set REG_CR bit 8. DMA beacon by SW. */
haldata->RegCR_1 |= BIT(0);
usb_write8(adapt, REG_CR + 1, haldata->RegCR_1);
/* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) & (~BIT(3)));
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) | BIT(4));
if (haldata->RegFwHwTxQCtrl & BIT(6))
bSendBeacon = true;
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl & (~BIT(6))));
haldata->RegFwHwTxQCtrl &= (~BIT(6));
/* Clear beacon valid check bit. */
rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
poll = 0;
do {
/* download rsvd page. */
SetFwRsvdPagePkt(adapt, false);
DLBcnCount++;
do {
yield();
/* mdelay(10); */
/* check rsvd page download OK. */
rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
poll++;
} while (!bcn_valid && (poll % 10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
} while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
/* */
/* We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) */
/* because we need to free the Tx BCN Desc which is used by the first reserved page packet. */
/* At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return */
/* the beacon TCB in the following code. 2011.11.23. by tynli. */
/* */
/* Enable Bcn */
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) | BIT(3));
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL) & (~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
/* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/* the beacon cannot be sent by HW. */
/* 2010.06.23. Added by tynli. */
if (bSendBeacon) {
usb_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl | BIT(6)));
haldata->RegFwHwTxQCtrl |= BIT(6);
}
/* Update RSVD page location H2C to Fw. */
if (bcn_valid)
rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
haldata->RegCR_1 &= (~BIT(0));
usb_write8(adapt, REG_CR + 1, haldata->RegCR_1);
}
}

217
drivers/staging/rtl8188eu/hal/rtl8188e_dm.c
View File

@ -1,217 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
/* */
/* Description: */
/* */
/* This file is for 92CE/92CU dynamic mechanism only */
/* */
/* */
/* */
#define _RTL8188E_DM_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
/* Initialize GPIO setting registers */
static void dm_InitGPIOSetting(struct adapter *Adapter)
{
u8 tmp1byte;
tmp1byte = usb_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
usb_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = Adapter->HalData;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
/* Init Value */
memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
dm_odm->SupportPlatform = ODM_CE;
dm_odm->SupportICType = ODM_RTL8188E;
dm_odm->CutVersion = ODM_CUT_A;
dm_odm->bIsMPChip = hal_data->VersionID.ChipType == NORMAL_CHIP;
dm_odm->PatchID = hal_data->CustomerID;
dm_odm->bWIFITest = Adapter->registrypriv.wifi_spec;
dm_odm->AntDivType = hal_data->TRxAntDivType;
/* Tx power tracking BB swing table.
* The base index =
* 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB
*/
dm_odm->BbSwingIdxOfdm = 12; /* Set default value as index 12. */
dm_odm->BbSwingIdxOfdmCurrent = 12;
dm_odm->BbSwingFlagOfdm = false;
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
dm_odm->SupportAbility = pdmpriv->InitODMFlag;
}
static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
struct hal_data_8188e *hal_data = Adapter->HalData;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
int i;
pdmpriv->InitODMFlag = ODM_BB_DIG |
ODM_BB_RA_MASK |
ODM_BB_DYNAMIC_TXPWR |
ODM_BB_FA_CNT |
ODM_BB_RSSI_MONITOR |
ODM_BB_CCK_PD |
ODM_BB_PWR_SAVE |
ODM_MAC_EDCA_TURBO |
ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
if (hal_data->AntDivCfg)
pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
if (Adapter->registrypriv.mp_mode == 1) {
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
}
dm_odm->SupportAbility = pdmpriv->InitODMFlag;
dm_odm->pNumTxBytesUnicast = &Adapter->xmitpriv.tx_bytes;
dm_odm->pNumRxBytesUnicast = &Adapter->recvpriv.rx_bytes;
dm_odm->pWirelessMode = &pmlmeext->cur_wireless_mode;
dm_odm->pSecChOffset = &hal_data->nCur40MhzPrimeSC;
dm_odm->pSecurity = (u8 *)&Adapter->securitypriv.dot11PrivacyAlgrthm;
dm_odm->pBandWidth = (u8 *)&hal_data->CurrentChannelBW;
dm_odm->pChannel = &hal_data->CurrentChannel;
dm_odm->pbNet_closed = (bool *)&Adapter->net_closed;
dm_odm->mp_mode = &Adapter->registrypriv.mp_mode;
dm_odm->pbScanInProcess = (bool *)&pmlmepriv->bScanInProcess;
dm_odm->pbPowerSaving = (bool *)&pwrctrlpriv->bpower_saving;
dm_odm->AntDivType = hal_data->TRxAntDivType;
/* Tx power tracking BB swing table.
* The base index =
* 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB
*/
dm_odm->BbSwingIdxOfdm = 12; /* Set default value as index 12. */
dm_odm->BbSwingIdxOfdmCurrent = 12;
dm_odm->BbSwingFlagOfdm = false;
for (i = 0; i < NUM_STA; i++)
ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i,
NULL);
}
void rtl8188e_InitHalDm(struct adapter *Adapter)
{
struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv;
struct odm_dm_struct *dm_odm = &Adapter->HalData->odmpriv;
dm_InitGPIOSetting(Adapter);
pdmpriv->DM_Type = DM_Type_ByDriver;
pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
Update_ODM_ComInfo_88E(Adapter);
ODM_DMInit(dm_odm);
}
void rtw_hal_dm_watchdog(struct adapter *Adapter)
{
u8 hw_init_completed = false;
struct mlme_priv *pmlmepriv = NULL;
u8 bLinked = false;
hw_init_completed = Adapter->hw_init_completed;
if (!hw_init_completed)
goto skip_dm;
/* ODM */
pmlmepriv = &Adapter->mlmepriv;
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE |
WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
Adapter->HalData->odmpriv.bLinked = bLinked;
ODM_DMWatchdog(&Adapter->HalData->odmpriv);
skip_dm:
/* Check GPIO to determine current RF on/off and Pbc status. */
/* Check Hardware Radio ON/OFF or not */
return;
}
void rtw_hal_dm_init(struct adapter *Adapter)
{
struct dm_priv *pdmpriv = &Adapter->HalData->dmpriv;
memset(pdmpriv, 0, sizeof(struct dm_priv));
Init_ODM_ComInfo_88E(Adapter);
}
/* Add new function to reset the state of antenna diversity before link. */
/* Compare RSSI for deciding antenna */
void rtw_hal_antdiv_rssi_compared(struct adapter *Adapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src)
{
if (Adapter->HalData->AntDivCfg != 0) {
/* select optimum_antenna for before linked => For antenna
* diversity
*/
if (dst->Rssi >= src->Rssi) {/* keep org parameter */
src->Rssi = dst->Rssi;
src->PhyInfo.Optimum_antenna =
dst->PhyInfo.Optimum_antenna;
}
}
}
/* Add new function to reset the state of antenna diversity before link. */
bool rtw_hal_antdiv_before_linked(struct adapter *Adapter)
{
struct odm_dm_struct *dm_odm = &Adapter->HalData->odmpriv;
struct sw_ant_switch *dm_swat_tbl = &dm_odm->DM_SWAT_Table;
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
/* Condition that does not need to use antenna diversity. */
if (Adapter->HalData->AntDivCfg == 0)
return false;
if (check_fwstate(pmlmepriv, _FW_LINKED))
return false;
if (dm_swat_tbl->SWAS_NoLink_State != 0) {
dm_swat_tbl->SWAS_NoLink_State = 0;
return false;
}
/* switch channel */
dm_swat_tbl->SWAS_NoLink_State = 1;
dm_swat_tbl->CurAntenna = (dm_swat_tbl->CurAntenna == Antenna_A) ?
Antenna_B : Antenna_A;
rtw_antenna_select_cmd(Adapter, dm_swat_tbl->CurAntenna, false);
return true;
}

512
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
View File

@ -1,512 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _HAL_INIT_C_
#include <linux/firmware.h>
#include <linux/vmalloc.h>
#include <drv_types.h>
#include <rtw_efuse.h>
#include <phy.h>
#include <rtl8188e_hal.h>
#include <rtw_iol.h>
void iol_mode_enable(struct adapter *padapter, u8 enable)
{
u8 reg_0xf0 = 0;
if (enable) {
/* Enable initial offload */
reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
usb_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN);
if (!padapter->bFWReady)
_8051Reset88E(padapter);
} else {
/* disable initial offload */
reg_0xf0 = usb_read8(padapter, REG_SYS_CFG);
usb_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN);
}
}
s32 iol_execute(struct adapter *padapter, u8 control)
{
s32 status = _FAIL;
u8 reg_0x88 = 0;
unsigned long start = 0;
control = control & 0x0f;
reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
usb_write8(padapter, REG_HMEBOX_E0, reg_0x88 | control);
start = jiffies;
while ((reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0)) & control &&
jiffies_to_msecs(jiffies - start) < 1000) {
udelay(5);
}
reg_0x88 = usb_read8(padapter, REG_HMEBOX_E0);
status = (reg_0x88 & control) ? _FAIL : _SUCCESS;
if (reg_0x88 & control << 4)
status = _FAIL;
return status;
}
static s32 iol_InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
{
s32 rst = _SUCCESS;
iol_mode_enable(padapter, 1);
usb_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
rst = iol_execute(padapter, CMD_INIT_LLT);
iol_mode_enable(padapter, 0);
return rst;
}
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter)
{
s32 result = _SUCCESS;
if (rtw_iol_applied(padapter)) {
iol_mode_enable(padapter, 1);
result = iol_execute(padapter, CMD_READ_EFUSE_MAP);
if (result == _SUCCESS)
result = iol_execute(padapter, CMD_EFUSE_PATCH);
iol_mode_enable(padapter, 0);
}
return result;
}
#define MAX_REG_BOLCK_SIZE 196
void _8051Reset88E(struct adapter *padapter)
{
u8 u1bTmp;
u1bTmp = usb_read8(padapter, REG_SYS_FUNC_EN + 1);
usb_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT(2)));
usb_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp | (BIT(2)));
}
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
{
/* Init H2C counter. by tynli. 2009.12.09. */
padapter->HalData->LastHMEBoxNum = 0;
}
void rtw_hal_free_data(struct adapter *padapter)
{
kfree(padapter->HalData);
padapter->HalData = NULL;
}
void rtw_hal_read_chip_version(struct adapter *padapter)
{
u32 value32;
struct HAL_VERSION ChipVersion;
struct hal_data_8188e *pHalData = padapter->HalData;
value32 = usb_read32(padapter, REG_SYS_CFG);
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
dump_chip_info(ChipVersion);
pHalData->VersionID = ChipVersion;
}
void rtw_hal_set_odm_var(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
{
struct odm_dm_struct *podmpriv = &Adapter->HalData->odmpriv;
switch (eVariable) {
case HAL_ODM_STA_INFO:
{
struct sta_info *psta = pValue1;
if (bSet) {
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
ODM_RAInfo_Init(podmpriv, psta->mac_id);
} else {
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
}
}
break;
case HAL_ODM_P2P_STATE:
podmpriv->bWIFI_Direct = bSet;
break;
case HAL_ODM_WIFI_DISPLAY_STATE:
podmpriv->bWIFI_Display = bSet;
break;
default:
break;
}
}
void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
{
if (enable)
usb_write8(adapter, rOFDM0_RxDSP + 1, usb_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
else
usb_write8(adapter, rOFDM0_RxDSP + 1, usb_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
}
/* */
/* */
/* LLT R/W/Init function */
/* */
/* */
static s32 _LLTWrite(struct adapter *padapter, u32 address, u32 data)
{
s32 status = _SUCCESS;
s32 count;
u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
u16 LLTReg = REG_LLT_INIT;
usb_write32(padapter, LLTReg, value);
/* polling */
for (count = 0; ; count++) {
value = usb_read32(padapter, LLTReg);
if (_LLT_OP_VALUE(value) == _LLT_NO_ACTIVE)
break;
if (count > POLLING_LLT_THRESHOLD) {
status = _FAIL;
break;
}
udelay(5);
}
return status;
}
s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
{
s32 status = _FAIL;
u32 i;
u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER;/* 176, 22k */
if (rtw_iol_applied(padapter)) {
status = iol_InitLLTTable(padapter, txpktbuf_bndy);
} else {
for (i = 0; i < (txpktbuf_bndy - 1); i++) {
status = _LLTWrite(padapter, i, i + 1);
if (status != _SUCCESS)
return status;
}
/* end of list */
status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
if (status != _SUCCESS)
return status;
/* Make the other pages as ring buffer */
/* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */
/* Otherwise used as local loopback buffer. */
for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
status = _LLTWrite(padapter, i, (i + 1));
if (status != _SUCCESS)
return status;
}
/* Let last entry point to the start entry of ring buffer */
status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
if (status != _SUCCESS)
return status;
}
return status;
}
void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
u16 EEPROMId;
/* Checl 0x8129 again for making sure autoload status!! */
EEPROMId = le16_to_cpu(*((__le16 *)hwinfo));
if (EEPROMId != RTL_EEPROM_ID)
pEEPROM->bautoload_fail_flag = true;
else
pEEPROM->bautoload_fail_flag = false;
}
static void Hal_ReadPowerValueFromPROM_8188E(struct txpowerinfo24g *pwrInfo24G, u8 *PROMContent, bool AutoLoadFail)
{
u32 rfPath, eeAddr = EEPROM_TX_PWR_INX_88E, group, TxCount = 0;
memset(pwrInfo24G, 0, sizeof(struct txpowerinfo24g));
if (AutoLoadFail) {
for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
/* 2.4G default value */
for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
}
for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
if (TxCount == 0) {
pwrInfo24G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF;
pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF;
} else {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
}
}
}
return;
}
for (rfPath = 0; rfPath < MAX_RF_PATH; rfPath++) {
/* 2.4G default value */
for (group = 0; group < MAX_CHNL_GROUP_24G; group++) {
pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++];
if (pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF)
pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
}
for (group = 0; group < MAX_CHNL_GROUP_24G - 1; group++) {
pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++];
if (pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF)
pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX;
}
for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
if (TxCount == 0) {
pwrInfo24G->BW40_Diff[rfPath][TxCount] = 0;
if (PROMContent[eeAddr] == 0xFF) {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_HT20_DIFF;
} else {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4;
if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
}
if (PROMContent[eeAddr] == 0xFF) {
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_24G_OFDM_DIFF;
} else {
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f);
if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
}
pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0;
eeAddr++;
} else {
if (PROMContent[eeAddr] == 0xFF) {
pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
} else {
pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4;
if (pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0;
}
if (PROMContent[eeAddr] == 0xFF) {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
} else {
pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f);
if (pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0;
}
eeAddr++;
if (PROMContent[eeAddr] == 0xFF) {
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
} else {
pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0xf0) >> 4;
if (pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0;
}
if (PROMContent[eeAddr] == 0xFF) {
pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF;
} else {
pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr] & 0x0f);
if (pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT(3)) /* 4bit sign number to 8 bit sign number */
pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0;
}
eeAddr++;
}
}
}
}
void Hal_GetChnlGroup88E(u8 chnl, u8 *group)
{
if (chnl < 3) /* Channel 1-2 */
*group = 0;
else if (chnl < 6) /* Channel 3-5 */
*group = 1;
else if (chnl < 9) /* Channel 6-8 */
*group = 2;
else if (chnl < 12) /* Channel 9-11 */
*group = 3;
else if (chnl < 14) /* Channel 12-13 */
*group = 4;
else if (chnl == 14) /* Channel 14 */
*group = 5;
}
void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
{
if (AutoLoadFail) {
padapter->pwrctrlpriv.bHWPowerdown = false;
padapter->pwrctrlpriv.bSupportRemoteWakeup = false;
} else {
/* hw power down mode selection , 0:rf-off / 1:power down */
if (padapter->registrypriv.hwpdn_mode == 2)
padapter->pwrctrlpriv.bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT(4));
else
padapter->pwrctrlpriv.bHWPowerdown = padapter->registrypriv.hwpdn_mode;
/* decide hw if support remote wakeup function */
/* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
}
}
void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool AutoLoadFail)
{
struct hal_data_8188e *pHalData = padapter->HalData;
struct txpowerinfo24g pwrInfo24G;
u8 ch, group;
u8 TxCount;
Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
if (!AutoLoadFail)
pHalData->bTXPowerDataReadFromEEPORM = true;
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
Hal_GetChnlGroup88E(ch, &group);
pHalData->Index24G_CCK_Base[0][ch] = pwrInfo24G.IndexCCK_Base[0][group];
if (ch == 14)
pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][4];
else
pHalData->Index24G_BW40_Base[0][ch] = pwrInfo24G.IndexBW40_Base[0][group];
}
for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
pHalData->CCK_24G_Diff[0][TxCount] = pwrInfo24G.CCK_Diff[0][TxCount];
pHalData->OFDM_24G_Diff[0][TxCount] = pwrInfo24G.OFDM_Diff[0][TxCount];
pHalData->BW20_24G_Diff[0][TxCount] = pwrInfo24G.BW20_Diff[0][TxCount];
pHalData->BW40_24G_Diff[0][TxCount] = pwrInfo24G.BW40_Diff[0][TxCount];
}
/* 2010/10/19 MH Add Regulator recognize for CU. */
if (!AutoLoadFail) {
pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x7); /* bit0~2 */
if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7); /* bit0~2 */
} else {
pHalData->EEPROMRegulatory = 0;
}
}
void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
{
struct hal_data_8188e *pHalData = pAdapter->HalData;
if (!AutoLoadFail) {
pHalData->CrystalCap = hwinfo[EEPROM_XTAL_88E];
if (pHalData->CrystalCap == 0xFF)
pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
} else {
pHalData->CrystalCap = EEPROM_Default_CrystalCap_88E;
}
}
void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo, bool AutoLoadFail)
{
struct hal_data_8188e *pHalData = pAdapter->HalData;
if (!AutoLoadFail)
pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
& 0xE0) >> 5;
else
pHalData->BoardType = 0;
}
void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
{
struct hal_data_8188e *pHalData = padapter->HalData;
if (!AutoLoadFail) {
pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E];
if (pHalData->EEPROMVersion == 0xFF)
pHalData->EEPROMVersion = EEPROM_Default_Version;
} else {
pHalData->EEPROMVersion = 1;
}
}
void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
{
padapter->mlmepriv.ChannelPlan =
hal_com_get_channel_plan(hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF,
padapter->registrypriv.channel_plan,
RT_CHANNEL_DOMAIN_WORLD_WIDE_13, AutoLoadFail);
}
void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail)
{
struct hal_data_8188e *pHalData = padapter->HalData;
if (!AutoLoadFail) {
pHalData->EEPROMCustomerID = hwinfo[EEPROM_CUSTOMERID_88E];
} else {
pHalData->EEPROMCustomerID = 0;
pHalData->EEPROMSubCustomerID = 0;
}
}
void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool AutoLoadFail)
{
struct hal_data_8188e *pHalData = pAdapter->HalData;
struct registry_priv *registry_par = &pAdapter->registrypriv;
if (!AutoLoadFail) {
/* Antenna Diversity setting. */
if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */
pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x18) >> 3;
if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF)
pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION & 0x18) >> 3;
} else {
pHalData->AntDivCfg = registry_par->antdiv_cfg; /* 0:OFF , 1:ON, 2:By EFUSE */
}
if (registry_par->antdiv_type == 0) {
/* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */
pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E];
if (pHalData->TRxAntDivType == 0xFF)
pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
} else {
pHalData->TRxAntDivType = registry_par->antdiv_type;
}
if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV)
pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */
} else {
pHalData->AntDivCfg = 0;
}
}
void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool AutoloadFail)
{
struct hal_data_8188e *pHalData = Adapter->HalData;
/* ThermalMeter from EEPROM */
if (!AutoloadFail)
pHalData->EEPROMThermalMeter = PROMContent[EEPROM_THERMAL_METER_88E];
else
pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
if (pHalData->EEPROMThermalMeter == 0xff || AutoloadFail)
pHalData->EEPROMThermalMeter = EEPROM_Default_ThermalMeter_88E;
}

193
drivers/staging/rtl8188eu/hal/rtl8188e_rxdesc.c
View File

@ -1,193 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTL8188E_REDESC_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
static void process_rssi(struct adapter *padapter, struct recv_frame *prframe)
{
struct rx_pkt_attrib *pattrib = &prframe->attrib;
struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data;
if (signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->phy_info.SignalStrength;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
} /* Process_UI_RSSI_8192C */
static void process_link_qual(struct adapter *padapter,
struct recv_frame *prframe)
{
struct rx_pkt_attrib *pattrib;
struct signal_stat *signal_stat;
if (!prframe || !padapter)
return;
pattrib = &prframe->attrib;
signal_stat = &padapter->recvpriv.signal_qual_data;
if (signal_stat->update_req) {
signal_stat->total_num = 0;
signal_stat->total_val = 0;
signal_stat->update_req = 0;
}
signal_stat->total_num++;
signal_stat->total_val += pattrib->phy_info.SignalQuality;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
}
void rtl8188e_process_phy_info(struct adapter *padapter,
struct recv_frame *precvframe)
{
/* Check RSSI */
process_rssi(padapter, precvframe);
/* Check EVM */
process_link_qual(padapter, precvframe);
}
void update_recvframe_attrib_88e(struct recv_frame *precvframe,
struct recv_stat *prxstat)
{
struct rx_pkt_attrib *pattrib;
struct recv_stat report;
report.rxdw0 = prxstat->rxdw0;
report.rxdw1 = prxstat->rxdw1;
report.rxdw2 = prxstat->rxdw2;
report.rxdw3 = prxstat->rxdw3;
report.rxdw4 = prxstat->rxdw4;
report.rxdw5 = prxstat->rxdw5;
pattrib = &precvframe->attrib;
memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);/* u8)prxreport->crc32; */
/* update rx report to recv_frame attribute */
pattrib->pkt_rpt_type = (u8)((le32_to_cpu(report.rxdw3) >> 14) & 0x3);/* prxreport->rpt_sel; */
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */
pattrib->drvinfo_sz = (u8)((le32_to_cpu(report.rxdw0) >> 16) & 0xf) * 8;/* u8)(prxreport->drvinfosize << 3); */
pattrib->physt = (u8)((le32_to_cpu(report.rxdw0) >> 26) & 0x1);/* u8)prxreport->physt; */
pattrib->bdecrypted = (le32_to_cpu(report.rxdw0) & BIT(27)) ? 0 : 1;/* u8)(prxreport->swdec ? 0 : 1); */
pattrib->encrypt = (u8)((le32_to_cpu(report.rxdw0) >> 20) & 0x7);/* u8)prxreport->security; */
pattrib->qos = (u8)((le32_to_cpu(report.rxdw0) >> 23) & 0x1);/* u8)prxreport->qos; */
pattrib->priority = (u8)((le32_to_cpu(report.rxdw1) >> 8) & 0xf);/* u8)prxreport->tid; */
pattrib->amsdu = (u8)((le32_to_cpu(report.rxdw1) >> 13) & 0x1);/* u8)prxreport->amsdu; */
pattrib->seq_num = (u16)(le32_to_cpu(report.rxdw2) & 0x00000fff);/* u16)prxreport->seq; */
pattrib->frag_num = (u8)((le32_to_cpu(report.rxdw2) >> 12) & 0xf);/* u8)prxreport->frag; */
pattrib->mfrag = (u8)((le32_to_cpu(report.rxdw1) >> 27) & 0x1);/* u8)prxreport->mf; */
pattrib->mdata = (u8)((le32_to_cpu(report.rxdw1) >> 26) & 0x1);/* u8)prxreport->md; */
pattrib->mcs_rate = (u8)(le32_to_cpu(report.rxdw3) & 0x3f);/* u8)prxreport->rxmcs; */
pattrib->rxht = (u8)((le32_to_cpu(report.rxdw3) >> 6) & 0x1);/* u8)prxreport->rxht; */
pattrib->icv_err = (u8)((le32_to_cpu(report.rxdw0) >> 15) & 0x1);/* u8)prxreport->icverr; */
pattrib->shift_sz = (u8)((le32_to_cpu(report.rxdw0) >> 24) & 0x3);
} else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */
pattrib->pkt_len = TX_RPT1_PKT_LEN;
pattrib->drvinfo_sz = 0;
} else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x3FF);/* Rx length[9:0] */
pattrib->drvinfo_sz = 0;
/* */
/* Get TX report MAC ID valid. */
/* */
pattrib->MacIDValidEntry[0] = le32_to_cpu(report.rxdw4);
pattrib->MacIDValidEntry[1] = le32_to_cpu(report.rxdw5);
} else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */
}
}
/*
* Notice:
* Before calling this function,
* precvframe->rx_data should be ready!
*/
void update_recvframe_phyinfo_88e(struct recv_frame *precvframe,
struct phy_stat *pphy_status)
{
struct adapter *padapter = precvframe->adapter;
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info);
u8 *wlanhdr;
struct ieee80211_hdr *hdr =
(struct ieee80211_hdr *)precvframe->pkt->data;
struct odm_per_pkt_info pkt_info;
u8 *sa = NULL;
struct sta_priv *pstapriv;
struct sta_info *psta;
pkt_info.bPacketMatchBSSID = false;
pkt_info.bPacketToSelf = false;
pkt_info.bPacketBeacon = false;
wlanhdr = precvframe->pkt->data;
pkt_info.bPacketMatchBSSID = (!ieee80211_is_ctl(hdr->frame_control) &&
!pattrib->icv_err && !pattrib->crc_err &&
!memcmp(get_hdr_bssid(wlanhdr),
get_bssid(&padapter->mlmepriv), ETH_ALEN));
pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID &&
(!memcmp(ieee80211_get_DA(hdr),
myid(&padapter->eeprompriv), ETH_ALEN));
pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID &&
(GetFrameSubType(wlanhdr) == IEEE80211_STYPE_BEACON);
if (pkt_info.bPacketBeacon) {
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE))
sa = padapter->mlmepriv.cur_network.network.MacAddress;
/* to do Ad-hoc */
} else {
sa = ieee80211_get_SA(hdr);
}
pstapriv = &padapter->stapriv;
pkt_info.StationID = 0xFF;
psta = rtw_get_stainfo(pstapriv, sa);
if (psta)
pkt_info.StationID = psta->mac_id;
pkt_info.Rate = pattrib->mcs_rate;
odm_phy_status_query(&padapter->HalData->odmpriv, pPHYInfo,
(u8 *)pphy_status, &(pkt_info));
precvframe->psta = NULL;
if (pkt_info.bPacketMatchBSSID &&
(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))) {
if (psta) {
precvframe->psta = psta;
rtl8188e_process_phy_info(padapter, precvframe);
}
} else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) {
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
if (psta)
precvframe->psta = psta;
}
rtl8188e_process_phy_info(padapter, precvframe);
}
}

25
drivers/staging/rtl8188eu/hal/rtl8188e_xmit.c
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@ -1,25 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTL8188E_XMIT_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf)
{
struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
if (txrpt_ccx->int_ccx) {
if (txrpt_ccx->pkt_ok)
rtw_ack_tx_done(&adapter->xmitpriv,
RTW_SCTX_DONE_SUCCESS);
else
rtw_ack_tx_done(&adapter->xmitpriv,
RTW_SCTX_DONE_CCX_PKT_FAIL);
}
}

55
drivers/staging/rtl8188eu/hal/rtl8188eu_led.c
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@ -1,55 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
#include <usb_ops_linux.h>
void sw_led_on(struct adapter *padapter, struct LED_871x *pLed)
{
u8 led_cfg;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
led_cfg = usb_read8(padapter, REG_LEDCFG2);
usb_write8(padapter, REG_LEDCFG2, (led_cfg & 0xf0) | BIT(5) | BIT(6));
pLed->led_on = true;
}
void sw_led_off(struct adapter *padapter, struct LED_871x *pLed)
{
u8 led_cfg;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
goto exit;
led_cfg = usb_read8(padapter, REG_LEDCFG2);/* 0x4E */
/* Open-drain arrangement for controlling the LED) */
led_cfg &= 0x90; /* Set to software control. */
usb_write8(padapter, REG_LEDCFG2, (led_cfg | BIT(3)));
led_cfg = usb_read8(padapter, REG_MAC_PINMUX_CFG);
led_cfg &= 0xFE;
usb_write8(padapter, REG_MAC_PINMUX_CFG, led_cfg);
exit:
pLed->led_on = false;
}
void rtw_hal_sw_led_init(struct adapter *padapter)
{
struct led_priv *pledpriv = &padapter->ledpriv;
InitLed871x(padapter, &pledpriv->sw_led);
}
void rtw_hal_sw_led_deinit(struct adapter *padapter)
{
struct led_priv *ledpriv = &padapter->ledpriv;
DeInitLed871x(&ledpriv->sw_led);
}

83
drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c
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@ -1,83 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTL8188EU_RECV_C_
#include <linux/kmemleak.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
#include <usb_ops_linux.h>
#include <wifi.h>
#include <rtl8188e_hal.h>
int rtw_hal_init_recv_priv(struct adapter *padapter)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
int i, res = _SUCCESS;
struct recv_buf *precvbuf;
tasklet_setup(&precvpriv->recv_tasklet, rtl8188eu_recv_tasklet);
/* init recv_buf */
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->precv_buf =
kcalloc(NR_RECVBUFF, sizeof(struct recv_buf), GFP_KERNEL);
if (!precvpriv->precv_buf) {
res = _FAIL;
goto exit;
}
precvbuf = precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
res = rtw_os_recvbuf_resource_alloc(precvbuf);
if (res == _FAIL)
break;
precvbuf->adapter = padapter;
precvbuf++;
}
skb_queue_head_init(&precvpriv->rx_skb_queue);
{
int i;
struct sk_buff *pskb = NULL;
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) {
pskb = __netdev_alloc_skb(padapter->pnetdev,
MAX_RECVBUF_SZ, GFP_KERNEL);
if (pskb) {
kmemleak_not_leak(pskb);
skb_queue_tail(&precvpriv->free_recv_skb_queue,
pskb);
}
pskb = NULL;
}
}
exit:
return res;
}
void rtw_hal_free_recv_priv(struct adapter *padapter)
{
int i;
struct recv_buf *precvbuf;
struct recv_priv *precvpriv = &padapter->recvpriv;
precvbuf = precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
usb_free_urb(precvbuf->purb);
precvbuf++;
}
kfree(precvpriv->precv_buf);
skb_queue_purge(&precvpriv->rx_skb_queue);
skb_queue_purge(&precvpriv->free_recv_skb_queue);
}

638
drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c
View File

@ -1,638 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#define _RTL8188E_XMIT_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <mon.h>
#include <wifi.h>
#include <osdep_intf.h>
#include <usb_ops_linux.h>
#include <rtl8188e_hal.h>
s32 rtw_hal_init_xmit_priv(struct adapter *adapt)
{
struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
tasklet_setup(&pxmitpriv->xmit_tasklet, rtl8188eu_xmit_tasklet);
return _SUCCESS;
}
static u8 urb_zero_packet_chk(struct adapter *adapt, int sz)
{
return !((sz + TXDESC_SIZE) % adapt->HalData->UsbBulkOutSize);
}
static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
{
u16 *usptr = (u16 *)ptxdesc;
u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */
u32 index;
u16 checksum = 0;
/* Clear first */
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
for (index = 0; index < count; index++)
checksum = checksum ^ le16_to_cpu(*(__le16 *)(usptr + index));
ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum);
}
/*
* In normal chip, we should send some packet to Hw which will be used by Fw
* in FW LPS mode. The function is to fill the Tx descriptor of this packets,
* then Fw can tell Hw to send these packet derectly.
*/
void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u8 ispspoll, u8 is_btqosnull)
{
struct tx_desc *ptxdesc;
/* Clear all status */
ptxdesc = (struct tx_desc *)desc;
memset(desc, 0, TXDESC_SIZE);
/* offset 0 */
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes for TX Desc */
ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /* Buffer size + command header */
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /* Fixed queue of Mgnt queue */
/* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
if (ispspoll) {
ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR);
} else {
ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */
ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */
}
if (is_btqosnull)
ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */
/* offset 16 */
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */
/* USB interface drop packet if the checksum of descriptor isn't correct. */
/* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */
rtl8188eu_cal_txdesc_chksum(ptxdesc);
}
static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
{
if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
switch (pattrib->encrypt) {
/* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
case _WEP40_:
case _WEP104_:
ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
case _TKIP_:
case _TKIP_WTMIC_:
ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
case _AES_:
ptxdesc->txdw1 |= cpu_to_le32((0x03 << SEC_TYPE_SHT) & 0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
case _NO_PRIVACY_:
default:
break;
}
}
}
static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw)
{
switch (pattrib->vcs_mode) {
case RTS_CTS:
*pdw |= cpu_to_le32(RTS_EN);
break;
case CTS_TO_SELF:
*pdw |= cpu_to_le32(CTS_2_SELF);
break;
case NONE_VCS:
default:
break;
}
if (pattrib->vcs_mode) {
*pdw |= cpu_to_le32(HW_RTS_EN);
/* Set RTS BW */
if (pattrib->ht_en) {
*pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0;
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01 << 28) & 0x30000000);
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
*pdw |= cpu_to_le32((0x02 << 28) & 0x30000000);
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
*pdw |= 0;
else
*pdw |= cpu_to_le32((0x03 << 28) & 0x30000000);
}
}
}
static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw)
{
if (pattrib->ht_en) {
*pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0;
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000);
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
*pdw |= cpu_to_le32((0x02 << DATA_SC_SHT) & 0x003f0000);
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
*pdw |= 0;
else
*pdw |= cpu_to_le32((0x03 << DATA_SC_SHT) & 0x003f0000);
}
}
static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt)
{
int pull = 0;
uint qsel;
u8 data_rate, pwr_status, offset;
struct adapter *adapt = pxmitframe->padapter;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct odm_dm_struct *odmpriv = &adapt->HalData->odmpriv;
struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (adapt->registrypriv.mp_mode == 0) {
if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) {
ptxdesc = (struct tx_desc *)(pmem + PACKET_OFFSET_SZ);
pull = 1;
}
}
memset(ptxdesc, 0, sizeof(struct tx_desc));
/* 4 offset 0 */
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */
offset = TXDESC_SIZE + OFFSET_SZ;
ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */
if (is_multicast_ether_addr(pattrib->ra))
ptxdesc->txdw0 |= cpu_to_le32(BMC);
if (adapt->registrypriv.mp_mode == 0) {
if (!bagg_pkt) {
if ((pull) && (pxmitframe->pkt_offset > 0))
pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1;
}
}
/* pkt_offset, unit:8 bytes padding */
if (pxmitframe->pkt_offset > 0)
ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
/* driver uses rate */
ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */
if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) {
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3F);
qsel = (uint)(pattrib->qsel & 0x0000001f);
ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000);
fill_txdesc_sectype(pattrib, ptxdesc);
if (pattrib->ampdu_en) {
ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */
ptxdesc->txdw6 = cpu_to_le32(0x6666f800);
} else {
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
}
/* offset 8 */
/* offset 12 */
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
/* offset 16 , offset 20 */
if (pattrib->qos_en)
ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */
/* offset 20 */
if (pxmitframe->agg_num > 1)
ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000);
if ((pattrib->ether_type != 0x888e) &&
(pattrib->ether_type != 0x0806) &&
(pattrib->ether_type != 0x88b4) &&
(pattrib->dhcp_pkt != 1)) {
/* Non EAP & ARP & DHCP type data packet */
fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */
ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS Rate FB LMT */
if (pattrib->ht_en) {
if (ODM_RA_GetShortGI_8188E(odmpriv, pattrib->mac_id))
ptxdesc->txdw5 |= cpu_to_le32(SGI);/* SGI */
}
data_rate = ODM_RA_GetDecisionRate_8188E(odmpriv, pattrib->mac_id);
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
pwr_status = ODM_RA_GetHwPwrStatus_8188E(odmpriv, pattrib->mac_id);
ptxdesc->txdw4 |= cpu_to_le32((pwr_status & 0x7) << PWR_STATUS_SHT);
} else {
/* EAP data packet and ARP packet and DHCP. */
/* Use the 1M data rate to send the EAP/ARP packet. */
/* This will maybe make the handshake smooth. */
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */
if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
} else if ((pxmitframe->frame_tag & 0x0f) == MGNT_FRAMETAG) {
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f);
qsel = (uint)(pattrib->qsel & 0x0000001f);
ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000);
/* offset 8 */
/* CCX-TXRPT ack for xmit mgmt frames. */
if (pxmitframe->ack_report)
ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
/* offset 12 */
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
/* offset 20 */
ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */
if (pattrib->retry_ctrl)
ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */
else
ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
} else {
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */
ptxdesc->txdw1 |= cpu_to_le32((6 << RATE_ID_SHT) & 0x000f0000);/* raid */
/* offset 8 */
/* offset 12 */
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0fff0000);
/* offset 20 */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
/* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */
/* (1) The sequence number of each non-Qos frame / broadcast / multicast / */
/* mgnt frame should be controlled by Hw because Fw will also send null data */
/* which we cannot control when Fw LPS enable. */
/* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */
/* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */
/* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */
/* 2010.06.23. Added by tynli. */
if (!pattrib->qos_en) {
ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /* Hw set sequence number */
ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */
}
rtl88eu_dm_set_tx_ant_by_tx_info(odmpriv, pmem, pattrib->mac_id);
rtl8188eu_cal_txdesc_chksum(ptxdesc);
return pull;
}
/* for non-agg data frame or management frame */
static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
{
s32 ret = _SUCCESS;
s32 inner_ret = _SUCCESS;
int t, sz, w_sz, pull = 0;
u8 *mem_addr;
u32 ff_hwaddr;
struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
if ((pxmitframe->frame_tag == DATA_FRAMETAG) &&
(pxmitframe->attrib.ether_type != 0x0806) &&
(pxmitframe->attrib.ether_type != 0x888e) &&
(pxmitframe->attrib.ether_type != 0x88b4) &&
(pxmitframe->attrib.dhcp_pkt != 1))
rtw_issue_addbareq_cmd(adapt, pxmitframe);
mem_addr = pxmitframe->buf_addr;
for (t = 0; t < pattrib->nr_frags; t++) {
if (inner_ret != _SUCCESS && ret == _SUCCESS)
ret = _FAIL;
if (t != (pattrib->nr_frags - 1)) {
sz = pxmitpriv->frag_len;
sz = sz - 4 - pattrib->icv_len;
} else {
/* no frag */
sz = pattrib->last_txcmdsz;
}
pull = update_txdesc(pxmitframe, mem_addr, sz, false);
if (pull) {
mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */
pxmitframe->buf_addr = mem_addr;
w_sz = sz + TXDESC_SIZE;
} else {
w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
}
ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
inner_ret = usb_write_port(adapt, ff_hwaddr, w_sz, pxmitbuf);
rtw_count_tx_stats(adapt, pxmitframe, sz);
mem_addr += w_sz;
mem_addr = (u8 *)round_up((size_t)mem_addr, 4);
}
rtw_free_xmitframe(pxmitpriv, pxmitframe);
if (ret != _SUCCESS)
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN);
return ret;
}
static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
{
struct pkt_attrib *pattrib = &pxmitframe->attrib;
u32 len;
/* no consider fragement */
len = pattrib->hdrlen + pattrib->iv_len +
SNAP_SIZE + sizeof(u16) +
pattrib->pktlen +
((pattrib->bswenc) ? pattrib->icv_len : 0);
if (pattrib->encrypt == _TKIP_)
len += 8;
return len;
}
bool rtl8188eu_xmitframe_complete(struct adapter *adapt,
struct xmit_priv *pxmitpriv)
{
struct xmit_frame *pxmitframe, *n;
struct xmit_frame *pfirstframe = NULL;
struct xmit_buf *pxmitbuf;
/* aggregate variable */
struct hw_xmit *phwxmit;
struct sta_info *psta = NULL;
struct tx_servq *ptxservq = NULL;
struct list_head *xmitframe_phead = NULL;
u32 pbuf; /* next pkt address */
u32 pbuf_tail; /* last pkt tail */
u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */
u32 bulksize = adapt->HalData->UsbBulkOutSize;
u8 desc_cnt;
u32 bulkptr;
/* dump frame variable */
u32 ff_hwaddr;
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!pxmitbuf)
return false;
/* 3 1. pick up first frame */
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
if (!pxmitframe) {
/* no more xmit frame, release xmit buffer */
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
return false;
}
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
/* always return ndis_packet after rtw_xmitframe_coalesce */
rtw_os_xmit_complete(adapt, pxmitframe);
/* 3 2. aggregate same priority and same DA(AP or STA) frames */
pfirstframe = pxmitframe;
len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
pbuf_tail = len;
pbuf = round_up(pbuf_tail, 8);
/* check pkt amount in one bulk */
desc_cnt = 0;
bulkptr = bulksize;
if (pbuf < bulkptr) {
desc_cnt++;
} else {
desc_cnt = 0;
bulkptr = ((pbuf / bulksize) + 1) * bulksize; /* round to next bulksize */
}
/* dequeue same priority packet from station tx queue */
psta = pfirstframe->attrib.psta;
switch (pfirstframe->attrib.priority) {
case 1:
case 2:
ptxservq = &psta->sta_xmitpriv.bk_q;
phwxmit = pxmitpriv->hwxmits + 3;
break;
case 4:
case 5:
ptxservq = &psta->sta_xmitpriv.vi_q;
phwxmit = pxmitpriv->hwxmits + 1;
break;
case 6:
case 7:
ptxservq = &psta->sta_xmitpriv.vo_q;
phwxmit = pxmitpriv->hwxmits;
break;
case 0:
case 3:
default:
ptxservq = &psta->sta_xmitpriv.be_q;
phwxmit = pxmitpriv->hwxmits + 2;
break;
}
spin_lock_bh(&pxmitpriv->lock);
xmitframe_phead = get_list_head(&ptxservq->sta_pending);
list_for_each_entry_safe(pxmitframe, n, xmitframe_phead, list) {
pxmitframe->agg_num = 0; /* not first frame of aggregation */
pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
if (round_up(pbuf + len, 8) > MAX_XMITBUF_SZ) {
pxmitframe->agg_num = 1;
pxmitframe->pkt_offset = 1;
break;
}
list_del_init(&pxmitframe->list);
ptxservq->qcnt--;
phwxmit->accnt--;
pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
/* always return ndis_packet after rtw_xmitframe_coalesce */
rtw_os_xmit_complete(adapt, pxmitframe);
/* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */
update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, true);
/* don't need xmitframe any more */
rtw_free_xmitframe(pxmitpriv, pxmitframe);
/* handle pointer and stop condition */
pbuf_tail = pbuf + len;
pbuf = round_up(pbuf_tail, 8);
pfirstframe->agg_num++;
if (pfirstframe->agg_num == MAX_TX_AGG_PACKET_NUMBER)
break;
if (pbuf < bulkptr) {
desc_cnt++;
if (desc_cnt == adapt->HalData->UsbTxAggDescNum)
break;
} else {
desc_cnt = 0;
bulkptr = ((pbuf / bulksize) + 1) * bulksize;
}
} /* end while (aggregate same priority and same DA(AP or STA) frames) */
if (list_empty(&ptxservq->sta_pending.queue))
list_del_init(&ptxservq->tx_pending);
spin_unlock_bh(&pxmitpriv->lock);
if ((pfirstframe->attrib.ether_type != 0x0806) &&
(pfirstframe->attrib.ether_type != 0x888e) &&
(pfirstframe->attrib.ether_type != 0x88b4) &&
(pfirstframe->attrib.dhcp_pkt != 1))
rtw_issue_addbareq_cmd(adapt, pfirstframe);
/* 3 3. update first frame txdesc */
if ((pbuf_tail % bulksize) == 0) {
/* remove pkt_offset */
pbuf_tail -= PACKET_OFFSET_SZ;
pfirstframe->buf_addr += PACKET_OFFSET_SZ;
pfirstframe->pkt_offset--;
}
update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, true);
/* 3 4. write xmit buffer to USB FIFO */
ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
usb_write_port(adapt, ff_hwaddr, pbuf_tail, pxmitbuf);
/* 3 5. update statisitc */
pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
rtw_count_tx_stats(adapt, pfirstframe, pbuf_tail);
rtw_free_xmitframe(pxmitpriv, pfirstframe);
return true;
}
/*
* Return
* true dump packet directly
* false enqueue packet
*/
bool rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe)
{
s32 res;
struct xmit_buf *pxmitbuf = NULL;
struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
spin_lock_bh(&pxmitpriv->lock);
if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0)
goto enqueue;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING))
goto enqueue;
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!pxmitbuf)
goto enqueue;
spin_unlock_bh(&pxmitpriv->lock);
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
if (res == _SUCCESS) {
rtw_dump_xframe(adapt, pxmitframe);
} else {
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
rtw_free_xmitframe(pxmitpriv, pxmitframe);
}
return true;
enqueue:
res = rtw_xmitframe_enqueue(adapt, pxmitframe);
spin_unlock_bh(&pxmitpriv->lock);
if (res != _SUCCESS) {
rtw_free_xmitframe(pxmitpriv, pxmitframe);
/* Trick, make the statistics correct */
pxmitpriv->tx_pkts--;
pxmitpriv->tx_drop++;
return true;
}
return false;
}
s32 rtw_hal_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe)
{
struct xmit_priv *xmitpriv = &adapt->xmitpriv;
rtl88eu_mon_xmit_hook(adapt->pmondev, pmgntframe, xmitpriv->frag_len);
return rtw_dump_xframe(adapt, pmgntframe);
}

1818
drivers/staging/rtl8188eu/hal/usb_halinit.c
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File diff suppressed because it is too large Load Diff

37
drivers/staging/rtl8188eu/include/HalVerDef.h
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@ -1,37 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
enum HAL_CHIP_TYPE {
TEST_CHIP = 0,
NORMAL_CHIP = 1,
FPGA = 2,
};
enum HAL_CUT_VERSION {
A_CUT_VERSION = 0,
B_CUT_VERSION = 1,
C_CUT_VERSION = 2,
D_CUT_VERSION = 3,
E_CUT_VERSION = 4,
F_CUT_VERSION = 5,
G_CUT_VERSION = 6,
};
enum HAL_VENDOR {
CHIP_VENDOR_TSMC = 0,
CHIP_VENDOR_UMC = 1,
};
struct HAL_VERSION {
enum HAL_CHIP_TYPE ChipType;
enum HAL_CUT_VERSION CUTVersion;
enum HAL_VENDOR VendorType;
};
#endif

134
drivers/staging/rtl8188eu/include/basic_types.h
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@ -1,134 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __BASIC_TYPES_H__
#define __BASIC_TYPES_H__
#include <linux/types.h>
#define NDIS_OID uint
/* port from fw */
/* TODO: Macros Below are Sync from SD7-Driver. It is necessary
* to check correctness
*/
/*
* Call endian free function when
* 1. Read/write packet content.
* 2. Before write integer to IO.
* 3. After read integer from IO.
*/
/* Convert little data endian to host ordering */
#define EF1BYTE(_val) \
((u8)(_val))
#define EF2BYTE(_val) \
(le16_to_cpu(_val))
#define EF4BYTE(_val) \
(le32_to_cpu(_val))
/* Create a bit mask
* Examples:
* BIT_LEN_MASK_32(0) => 0x00000000
* BIT_LEN_MASK_32(1) => 0x00000001
* BIT_LEN_MASK_32(2) => 0x00000003
* BIT_LEN_MASK_32(32) => 0xFFFFFFFF
*/
#define BIT_LEN_MASK_32(__bitlen) \
(0xFFFFFFFF >> (32 - (__bitlen)))
#define BIT_LEN_MASK_16(__bitlen) \
(0xFFFF >> (16 - (__bitlen)))
#define BIT_LEN_MASK_8(__bitlen) \
(0xFF >> (8 - (__bitlen)))
/* Create an offset bit mask
* Examples:
* BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003
* BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000
*/
#define BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen) \
(BIT_LEN_MASK_32(__bitlen) << (__bitoffset))
#define BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen) \
(BIT_LEN_MASK_16(__bitlen) << (__bitoffset))
#define BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen) \
(BIT_LEN_MASK_8(__bitlen) << (__bitoffset))
/*Description:
* Return 4-byte value in host byte ordering from
* 4-byte pointer in little-endian system.
*/
#define LE_P4BYTE_TO_HOST_4BYTE(__pstart) \
(EF4BYTE(*((__le32 *)(__pstart))))
#define LE_P2BYTE_TO_HOST_2BYTE(__pstart) \
(EF2BYTE(*((__le16 *)(__pstart))))
#define LE_P1BYTE_TO_HOST_1BYTE(__pstart) \
(EF1BYTE(*((u8 *)(__pstart))))
/* Description:
* Translate subfield (continuous bits in little-endian) of 4-byte
* value to host byte ordering.
*/
#define LE_BITS_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
( \
(LE_P4BYTE_TO_HOST_4BYTE(__pstart) >> (__bitoffset)) & \
BIT_LEN_MASK_32(__bitlen) \
)
#define LE_BITS_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
( \
(LE_P2BYTE_TO_HOST_2BYTE(__pstart) >> (__bitoffset)) & \
BIT_LEN_MASK_16(__bitlen) \
)
#define LE_BITS_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
( \
(LE_P1BYTE_TO_HOST_1BYTE(__pstart) >> (__bitoffset)) & \
BIT_LEN_MASK_8(__bitlen) \
)
/* Description:
* Mask subfield (continuous bits in little-endian) of 4-byte value
* and return the result in 4-byte value in host byte ordering.
*/
#define LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P4BYTE_TO_HOST_4BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen)) \
)
#define LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P2BYTE_TO_HOST_2BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen)) \
)
#define LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P1BYTE_TO_HOST_1BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen)) \
)
/* Description:
* Set subfield of little-endian 4-byte value to specified value.
*/
#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u32 *)(__pstart)) = \
( \
LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
)
#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u16 *)(__pstart)) = \
( \
LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
);
#define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u8 *)(__pstart)) = EF1BYTE \
( \
LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) | \
((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
)
#endif /* __BASIC_TYPES_H__ */

176
drivers/staging/rtl8188eu/include/drv_types.h
View File

@ -1,176 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
/*-----------------------------------------------------------------------------
For type defines and data structure defines
------------------------------------------------------------------------------*/
#ifndef __DRV_TYPES_H__
#define __DRV_TYPES_H__
#define DRV_NAME "r8188eu"
#include <osdep_service.h>
#include <wlan_bssdef.h>
#include <rtw_ht.h>
#include <rtw_cmd.h>
#include <rtw_xmit.h>
#include <rtw_recv.h>
#include <hal_intf.h>
#include <hal_com.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
struct qos_priv {
/* bit mask option: u-apsd, s-apsd, ts, block ack... */
unsigned int qos_option;
};
#include <rtw_mlme.h>
#include <rtw_rf.h>
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_ap.h>
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct registry_priv {
struct ndis_802_11_ssid ssid;
u8 channel;/* ad-hoc support requirement */
u8 wireless_mode;/* A, B, G, auto */
u8 preamble;/* long, short, auto */
u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
u8 vcs_type;/* RTS/CTS, CTS-to-self */
u16 rts_thresh;
u16 frag_thresh;
u8 power_mgnt;
u8 ips_mode;
u8 smart_ps;
u8 mp_mode;
u8 acm_method;
/* UAPSD */
u8 wmm_enable;
u8 uapsd_enable;
struct wlan_bssid_ex dev_network;
u8 ht_enable;
u8 cbw40_enable;
u8 ampdu_enable;/* for tx */
u8 rx_stbc;
u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
u8 wifi_spec;/* !turbo_mode */
u8 channel_plan;
bool accept_addba_req; /* true = accept AP's Add BA req */
u8 antdiv_cfg;
u8 antdiv_type;
u8 usbss_enable;/* 0:disable,1:enable */
u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */
u8 max_roaming_times; /* the max number driver will try */
u8 fw_iol; /* enable iol without other concern */
u8 enable80211d;
u8 ifname[16];
u8 if2name[16];
u8 notch_filter;
bool monitor_enable;
};
#define MAX_CONTINUAL_URB_ERR 4
struct dvobj_priv {
struct adapter *if1;
/* For 92D, DMDP have 2 interface. */
u8 InterfaceNumber;
u8 NumInterfaces;
/* In /Out Pipe information */
int RtInPipe[2];
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
/*-------- below is for USB INTERFACE --------*/
u8 ishighspeed;
u8 RtNumInPipes;
u8 RtNumOutPipes;
struct mutex usb_vendor_req_mutex;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
};
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
{
/* todo: get interface type from dvobj and the return
* the dev accordingly
*/
return &dvobj->pusbintf->dev;
};
struct adapter {
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
struct mlme_ext_priv mlmeextpriv;
struct cmd_priv cmdpriv;
struct xmit_priv xmitpriv;
struct recv_priv recvpriv;
struct sta_priv stapriv;
struct security_priv securitypriv;
struct registry_priv registrypriv;
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
struct hal_data_8188e *HalData;
s32 bDriverStopped;
s32 bSurpriseRemoved;
u8 hw_init_completed;
struct task_struct *cmdThread;
struct net_device *pnetdev;
struct net_device *pmondev;
int bup;
struct net_device_stats stats;
struct iw_statistics iwstats;
struct proc_dir_entry *dir_dev;/* for proc directory */
int net_closed;
u8 bFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
struct mutex hw_init_mutex;
};
#define adapter_to_dvobj(adapter) (adapter->dvobj)
static inline u8 *myid(struct eeprom_priv *peepriv)
{
return peepriv->mac_addr;
}
#endif /* __DRV_TYPES_H__ */

44
drivers/staging/rtl8188eu/include/fw.h
View File

@ -1,44 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2009-2013 Realtek Corporation.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "drv_types.h"
#include <linux/types.h>
#ifndef __RTL92C__FW__H__
#define __RTL92C__FW__H__
#define FW_8192C_START_ADDRESS 0x1000
#define FW_8192C_PAGE_SIZE 4096
#define FW_8192C_POLLING_DELAY 5
struct rtl92c_firmware_header {
__le16 signature;
u8 category;
u8 function;
u16 version;
u8 subversion;
u8 rsvd1;
u8 month;
u8 date;
u8 hour;
u8 minute;
u16 ramcodesize;
u16 rsvd2;
u32 svnindex;
u32 rsvd3;
u32 rsvd4;
u32 rsvd5;
};
int rtl88eu_download_fw(struct adapter *adapt);
#endif

175
drivers/staging/rtl8188eu/include/hal8188e_phy_cfg.h
View File

@ -1,175 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __INC_HAL8188EPHYCFG_H__
#define __INC_HAL8188EPHYCFG_H__
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 /* us */
#define AntennaDiversityValue 0x80
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define MAX_AGGR_NUM 0x07
enum sw_chnl_cmd_id {
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
};
/* 1. Switch channel related */
struct sw_chnl_cmd {
enum sw_chnl_cmd_id CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
};
enum hw90_block {
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, /* Never use this */
};
enum rf_radio_path {
RF_PATH_A = 0, /* Radio Path A */
RF_PATH_B = 1, /* Radio Path B */
};
#define MAX_PG_GROUP 13
#define RF_PATH_MAX 2
#define MAX_RF_PATH RF_PATH_MAX
#define MAX_TX_COUNT 4 /* path numbers */
#define CHANNEL_MAX_NUMBER 14 /* 14 is the max chnl number */
#define MAX_CHNL_GROUP_24G 6 /* ch1~2, ch3~5, ch6~8,
*ch9~11, ch12~13, CH 14
* total three groups
*/
#define CHANNEL_GROUP_MAX_88E 6
enum wireless_mode {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = BIT(2),
WIRELESS_MODE_B = BIT(0),
WIRELESS_MODE_G = BIT(1),
WIRELESS_MODE_AUTO = BIT(5),
WIRELESS_MODE_N_24G = BIT(3),
WIRELESS_MODE_N_5G = BIT(4),
WIRELESS_MODE_AC = BIT(6)
};
enum phy_rate_tx_offset_area {
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
};
struct bb_reg_def {
u32 rfintfs; /* set software control: */
/* 0x870~0x877[8 bytes] */
u32 rfintfi; /* readback data: */
/* 0x8e0~0x8e7[8 bytes] */
u32 rfintfo; /* output data: */
/* 0x860~0x86f [16 bytes] */
u32 rfintfe; /* output enable: */
/* 0x860~0x86f [16 bytes] */
u32 rf3wireOffset; /* LSSI data: */
/* 0x840~0x84f [16 bytes] */
u32 rfLSSI_Select; /* BB Band Select: */
/* 0x878~0x87f [8 bytes] */
u32 rfTxGainStage; /* Tx gain stage: */
/* 0x80c~0x80f [4 bytes] */
u32 rfHSSIPara1; /* wire parameter control1 : */
/* 0x820~0x823,0x828~0x82b,
* 0x830~0x833, 0x838~0x83b [16 bytes]
*/
u32 rfHSSIPara2; /* wire parameter control2 : */
/* 0x824~0x827,0x82c~0x82f, 0x834~0x837,
* 0x83c~0x83f [16 bytes]
*/
u32 rfSwitchControl; /* Tx Rx antenna control : */
/* 0x858~0x85f [16 bytes] */
u32 rfAGCControl1; /* AGC parameter control1 : */
/* 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63,
* 0xc68~0xc6b [16 bytes]
*/
u32 rfAGCControl2; /* AGC parameter control2 : */
/* 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67,
* 0xc6c~0xc6f [16 bytes]
*/
u32 rfRxIQImbalance; /* OFDM Rx IQ imbalance matrix : */
/* 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27,
* 0xc2c~0xc2f [16 bytes]
*/
u32 rfRxAFE; /* Rx IQ DC ofset and Rx digital filter,
* Rx DC notch filter :
*/
/* 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23,
* 0xc28~0xc2b [16 bytes]
*/
u32 rfTxIQImbalance; /* OFDM Tx IQ imbalance matrix */
/* 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93,
* 0xc98~0xc9b [16 bytes]
*/
u32 rfTxAFE; /* Tx IQ DC Offset and Tx DFIR type */
/* 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97,
* 0xc9c~0xc9f [16 bytes]
*/
u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */
/* 0x8a0~0x8af [16 bytes] */
u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for
* Path A and B
*/
};
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue(struct adapter *adapter);
/* BB TX Power R/W */
void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 *powerlevel);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
/* Call after initialization */
void ChkFwCmdIoDone(struct adapter *adapter);
/* BB/MAC/RF other monitor API */
void PHY_SetRFPathSwitch_8188E(struct adapter *adapter, bool main);
void PHY_SwitchEphyParameter(struct adapter *adapter);
void PHY_EnableHostClkReq(struct adapter *adapter);
bool SetAntennaConfig92C(struct adapter *adapter, u8 defaultant);
#define PHY_SetMacReg PHY_SetBBReg
#define SIC_HW_SUPPORT 0
#define SIC_MAX_POLL_CNT 5
#define SIC_CMD_READY 0
#define SIC_CMD_WRITE 1
#define SIC_CMD_READ 2
#define SIC_CMD_REG 0x1EB /* 1byte */
#define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */
#define SIC_DATA_REG 0x1EC /* 1bc~1bf */
#endif /* __INC_HAL8192CPHYCFG_H */

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drivers/staging/rtl8188eu/include/hal8188e_phy_reg.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __INC_HAL8188EPHYREG_H__
#define __INC_HAL8188EPHYREG_H__
/*--------------------------Define Parameters-------------------------------*/
/* */
/* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
/* 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF */
/* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
/* 3. RF register 0x00-2E */
/* 4. Bit Mask for BB/RF register */
/* 5. Other definition for BB/RF R/W */
/* */
/* 3. Page8(0x800) */
#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting */
#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */
#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */
#define rFPGA0_XA_HSSIParameter2 0x824
#define rFPGA0_XB_HSSIParameter1 0x828
#define rFPGA0_XB_HSSIParameter2 0x82c
#define rFPGA0_XA_LSSIParameter 0x840
#define rFPGA0_XB_LSSIParameter 0x844
#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */
#define rFPGA0_XCD_SwitchControl 0x85c
#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */
#define rFPGA0_XB_RFInterfaceOE 0x864
#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Iface Software Control */
#define rFPGA0_XCD_RFInterfaceSW 0x874
#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */
#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */
#define rFPGA0_XB_LSSIReadBack 0x8a4
#define TransceiverA_HSPI_Readback 0x8b8
#define TransceiverB_HSPI_Readback 0x8bc
#define rFPGA0_XAB_RFInterfaceRB 0x8e0
/* 4. Page9(0x900) */
/* RF mode & OFDM TxSC RF BW Setting?? */
#define rFPGA1_RFMOD 0x900
/* 5. PageA(0xA00) */
/* Set Control channel to upper or lower - required only for 40MHz */
#define rCCK0_System 0xa00
/* */
/* PageB(0xB00) */
/* */
#define rConfig_AntA 0xb68
#define rConfig_AntB 0xb6c
/* */
/* 6. PageC(0xC00) */
/* */
#define rOFDM0_TRxPathEnable 0xc04
#define rOFDM0_TRMuxPar 0xc08
/* RxIQ DC offset, Rx digital filter, DC notch filter */
#define rOFDM0_XARxAFE 0xc10
#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */
#define rOFDM0_XBRxAFE 0xc18
#define rOFDM0_XBRxIQImbalance 0xc1c
#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */
#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */
#define rOFDM0_XAAGCCore1 0xc50 /* DIG */
#define rOFDM0_XAAGCCore2 0xc54
#define rOFDM0_XBAGCCore1 0xc58
#define rOFDM0_XBAGCCore2 0xc5c
#define rOFDM0_AGCRSSITable 0xc78
#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */
#define rOFDM0_XATxAFE 0xc84
#define rOFDM0_XBTxIQImbalance 0xc88
#define rOFDM0_XBTxAFE 0xc8c
#define rOFDM0_XCTxAFE 0xc94
#define rOFDM0_XDTxAFE 0xc9c
#define rOFDM0_RxIQExtAnta 0xca0
/* */
/* 7. PageD(0xD00) */
/* */
#define rOFDM1_LSTF 0xd00
/* */
/* 8. PageE(0xE00) */
/* */
#define rTxAGC_A_Rate18_06 0xe00
#define rTxAGC_A_Rate54_24 0xe04
#define rTxAGC_A_CCK1_Mcs32 0xe08
#define rTxAGC_A_Mcs03_Mcs00 0xe10
#define rTxAGC_A_Mcs07_Mcs04 0xe14
#define rTxAGC_A_Mcs11_Mcs08 0xe18
#define rTxAGC_A_Mcs15_Mcs12 0xe1c
#define rTxAGC_B_Rate18_06 0x830
#define rTxAGC_B_Rate54_24 0x834
#define rTxAGC_B_CCK1_55_Mcs32 0x838
#define rTxAGC_B_Mcs03_Mcs00 0x83c
#define rTxAGC_B_Mcs07_Mcs04 0x848
#define rTxAGC_B_Mcs11_Mcs08 0x84c
#define rTxAGC_B_Mcs15_Mcs12 0x868
#define rTxAGC_B_CCK11_A_CCK2_11 0x86c
#define rFPGA0_IQK 0xe28
#define rTx_IQK_Tone_A 0xe30
#define rRx_IQK_Tone_A 0xe34
#define rTx_IQK_PI_A 0xe38
#define rRx_IQK_PI_A 0xe3c
#define rTx_IQK 0xe40
#define rRx_IQK 0xe44
#define rIQK_AGC_Pts 0xe48
#define rIQK_AGC_Rsp 0xe4c
#define rIQK_AGC_Cont 0xe60
#define rBlue_Tooth 0xe6c
#define rRx_Wait_CCA 0xe70
#define rTx_CCK_RFON 0xe74
#define rTx_CCK_BBON 0xe78
#define rTx_OFDM_RFON 0xe7c
#define rTx_OFDM_BBON 0xe80
#define rTx_To_Rx 0xe84
#define rTx_To_Tx 0xe88
#define rRx_CCK 0xe8c
#define rTx_Power_Before_IQK_A 0xe94
#define rTx_Power_After_IQK_A 0xe9c
#define rRx_Power_Before_IQK_A_2 0xea4
#define rRx_Power_After_IQK_A_2 0xeac
#define rTx_Power_Before_IQK_B 0xeb4
#define rTx_Power_After_IQK_B 0xebc
#define rRx_Power_Before_IQK_B_2 0xec4
#define rRx_Power_After_IQK_B_2 0xecc
#define rRx_OFDM 0xed0
#define rRx_Wait_RIFS 0xed4
#define rRx_TO_Rx 0xed8
#define rStandby 0xedc
#define rSleep 0xee0
#define rPMPD_ANAEN 0xeec
/* */
/* RL6052 Register definition */
/* */
#define RF_AC 0x00 /* */
#define RF_CHNLBW 0x18 /* RF channel and BW switch */
#define RF_T_METER_88E 0x42 /* */
#define RF_RCK_OS 0x30 /* RF TX PA control */
#define RF_TXPA_G1 0x31 /* RF TX PA control */
#define RF_TXPA_G2 0x32 /* RF TX PA control */
#define RF_WE_LUT 0xEF
/* */
/* Bit Mask */
/* */
/* 2. Page8(0x800) */
#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */
#define bCCKEn 0x1000000
#define bOFDMEn 0x2000000
#define bLSSIReadAddress 0x7f800000 /* T65 RF */
#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */
#define bLSSIReadBackData 0xfffff /* T65 RF */
#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 */
/* */
/* Other Definition */
/* */
/* for PutRegsetting & GetRegSetting BitMask */
#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */
#define bMaskByte1 0xff00
#define bMaskByte3 0xff000000
#define bMaskDWord 0xffffffff
#define bMask12Bits 0xfff
#define bMaskOFDM_D 0xffc00000
/* for PutRFRegsetting & GetRFRegSetting BitMask */
#define bRFRegOffsetMask 0xfffff
#endif

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drivers/staging/rtl8188eu/include/hal8188e_rate_adaptive.h
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __INC_RA_H
#define __INC_RA_H
/*
* Copyright (c) Realtek Semiconductor Corp. All rights reserved.
*
* Module Name:
* RateAdaptive.h
*
* Abstract:
* Prototype of RA and related data structure.
*
* Major Change History:
* When Who What
* ---------- --------------- -------------------------------
* 2011-08-12 Page Create.
*/
/* Rate adaptive define */
#define PERENTRY 23
#define RETRYSIZE 5
#define RATESIZE 28
#define TX_RPT2_ITEM_SIZE 8
/* */
/* TX report 2 format in Rx desc */
/* */
#define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 9)
#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc + 16, 0, 32)
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc + 20, 0, 32)
#define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr) \
LE_BITS_TO_4BYTE(__pAddr, 0, 16)
#define GET_TX_REPORT_TYPE1_RERTY_1(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr + 2, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_2(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr + 3, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_3(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr + 4, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr + 4 + 1, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr + 4 + 2, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr + 4 + 3, 0, 8)
/* End rate adaptive define */
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID);
u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 MacID,
u8 RateID, u32 RateMask,
u8 SGIEnable);
void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid,
u8 rssi);
void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm,
u8 *txrpt_buf, u16 txrpt_len,
u32 validentry0, u32 validentry1);
void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime);
#endif

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drivers/staging/rtl8188eu/include/hal_com.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
/* */
/* Rate Definition */
/* */
/* CCK */
#define RATR_1M 0x00000001
#define RATR_2M 0x00000002
#define RATR_55M 0x00000004
#define RATR_11M 0x00000008
/* OFDM */
#define RATR_6M 0x00000010
#define RATR_9M 0x00000020
#define RATR_12M 0x00000040
#define RATR_18M 0x00000080
#define RATR_24M 0x00000100
#define RATR_36M 0x00000200
#define RATR_48M 0x00000400
#define RATR_54M 0x00000800
/* MCS 1 Spatial Stream */
#define RATR_MCS0 0x00001000
#define RATR_MCS1 0x00002000
#define RATR_MCS2 0x00004000
#define RATR_MCS3 0x00008000
#define RATR_MCS4 0x00010000
#define RATR_MCS5 0x00020000
#define RATR_MCS6 0x00040000
#define RATR_MCS7 0x00080000
/* MCS 2 Spatial Stream */
#define RATR_MCS8 0x00100000
#define RATR_MCS9 0x00200000
#define RATR_MCS10 0x00400000
#define RATR_MCS11 0x00800000
#define RATR_MCS12 0x01000000
#define RATR_MCS13 0x02000000
#define RATR_MCS14 0x04000000
#define RATR_MCS15 0x08000000
/* CCK */
#define RATE_1M BIT(0)
#define RATE_2M BIT(1)
#define RATE_5_5M BIT(2)
#define RATE_11M BIT(3)
/* OFDM */
#define RATE_6M BIT(4)
#define RATE_9M BIT(5)
#define RATE_12M BIT(6)
#define RATE_18M BIT(7)
#define RATE_24M BIT(8)
#define RATE_36M BIT(9)
#define RATE_48M BIT(10)
#define RATE_54M BIT(11)
/* MCS 1 Spatial Stream */
#define RATE_MCS0 BIT(12)
#define RATE_MCS1 BIT(13)
#define RATE_MCS2 BIT(14)
#define RATE_MCS3 BIT(15)
#define RATE_MCS4 BIT(16)
#define RATE_MCS5 BIT(17)
#define RATE_MCS6 BIT(18)
#define RATE_MCS7 BIT(19)
/* MCS 2 Spatial Stream */
#define RATE_MCS8 BIT(20)
#define RATE_MCS9 BIT(21)
#define RATE_MCS10 BIT(22)
#define RATE_MCS11 BIT(23)
#define RATE_MCS12 BIT(24)
#define RATE_MCS13 BIT(25)
#define RATE_MCS14 BIT(26)
#define RATE_MCS15 BIT(27)
/* ALL CCK Rate */
#define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
#define RATE_ALL_OFDM_AG (RATR_6M | RATR_9M | RATR_12M | RATR_18M | \
RATR_24M | RATR_36M | RATR_48M | RATR_54M)
#define RATE_ALL_OFDM_1SS (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | \
RATR_MCS3 | RATR_MCS4 | RATR_MCS5 | RATR_MCS6 | \
RATR_MCS7)
#define RATE_ALL_OFDM_2SS (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | \
RATR_MCS11 | RATR_MCS12 | RATR_MCS13 | \
RATR_MCS14 | RATR_MCS15)
/*------------------------------ Tx Desc definition Macro --------------------*/
/* pragma mark -- Tx Desc related definition. -- */
/* Rate */
/* CCK Rates, TxHT = 0 */
#define DESC_RATE1M 0x00
#define DESC_RATE2M 0x01
#define DESC_RATE5_5M 0x02
#define DESC_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC_RATE6M 0x04
#define DESC_RATE9M 0x05
#define DESC_RATE12M 0x06
#define DESC_RATE18M 0x07
#define DESC_RATE24M 0x08
#define DESC_RATE36M 0x09
#define DESC_RATE48M 0x0a
#define DESC_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC_RATEMCS0 0x0c
#define DESC_RATEMCS1 0x0d
#define DESC_RATEMCS2 0x0e
#define DESC_RATEMCS3 0x0f
#define DESC_RATEMCS4 0x10
#define DESC_RATEMCS5 0x11
#define DESC_RATEMCS6 0x12
#define DESC_RATEMCS7 0x13
#define DESC_RATEMCS8 0x14
#define DESC_RATEMCS9 0x15
#define DESC_RATEMCS10 0x16
#define DESC_RATEMCS11 0x17
#define DESC_RATEMCS12 0x18
#define DESC_RATEMCS13 0x19
#define DESC_RATEMCS14 0x1a
#define DESC_RATEMCS15 0x1b
#define DESC_RATEMCS15_SG 0x1c
#define DESC_RATEMCS32 0x20
/* 1 Byte long (in unit of TU) */
#define REG_P2P_CTWIN 0x0572
#define REG_NOA_DESC_SEL 0x05CF
#define REG_NOA_DESC_DURATION 0x05E0
#define REG_NOA_DESC_INTERVAL 0x05E4
#define REG_NOA_DESC_START 0x05E8
#define REG_NOA_DESC_COUNT 0x05EC
#include "HalVerDef.h"
void dump_chip_info(struct HAL_VERSION ChipVersion);
/* return the final channel plan decision */
u8 hal_com_get_channel_plan(u8 hw_channel_plan, u8 sw_channel_plan,
u8 def_channel_plan, bool load_fail);
u8 MRateToHwRate(u8 rate);
void hal_set_brate_cfg(u8 *brates, u16 *rate_cfg);
bool hal_mapping_out_pipe(struct adapter *adapter, u8 numoutpipe);
#endif /* __HAL_COMMON_H__ */

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drivers/staging/rtl8188eu/include/hal_intf.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HAL_INTF_H__
#define __HAL_INTF_H__
#include <osdep_service.h>
#include <drv_types.h>
#include <hal8188e_phy_cfg.h>
enum hw_variables {
HW_VAR_MEDIA_STATUS,
HW_VAR_SET_OPMODE,
HW_VAR_MAC_ADDR,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_RESP_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_BCN_VALID,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_CAM_READ,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_ACM_CTRL,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_TDLS_WRCR,
HW_VAR_TDLS_INIT_CH_SEN,
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_USAGE,
HW_VAR_EFUSE_BYTES,
HW_VAR_EFUSE_BT_USAGE,
HW_VAR_EFUSE_BT_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_CHECK_TXBUF,
HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation,
* power control for MAC only
*/
/* The valid upper nav range for the HW updating, if the true value is
* larger than the upper range, the HW won't update it.
*/
/* Unit in microsecond. 0 means disable this function. */
HW_VAR_NAV_UPPER,
HW_VAR_RPT_TIMER_SETTING,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_H2C_MEDIA_STATUS_RPT,
HW_VAR_CHK_HI_QUEUE_EMPTY,
};
enum hal_def_variable {
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */
HAL_DEF_DBG_DM_FUNC,/* for dbg */
HAL_DEF_RA_DECISION_RATE,
HAL_DEF_RA_SGI,
HAL_DEF_PT_PWR_STATUS,
HW_VAR_MAX_RX_AMPDU_FACTOR,
HW_DEF_RA_INFO_DUMP,
HAL_DEF_DBG_DUMP_TXPKT,
HW_DEF_FA_CNT_DUMP,
};
enum hal_odm_variable {
HAL_ODM_STA_INFO,
HAL_ODM_P2P_STATE,
HAL_ODM_WIFI_DISPLAY_STATE,
};
#define RF_CHANGE_BY_PS BIT(29)
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level);
u32 rtl8188eu_hal_deinit(struct adapter *Adapter);
u32 rtl8188eu_hal_init(struct adapter *Adapter);
void rtw_hal_def_value_init(struct adapter *padapter);
void rtw_hal_free_data(struct adapter *padapter);
void rtw_hal_dm_init(struct adapter *padapter);
void rtw_hal_sw_led_init(struct adapter *padapter);
void rtw_hal_sw_led_deinit(struct adapter *padapter);
u32 rtw_hal_power_on(struct adapter *padapter);
uint rtw_hal_init(struct adapter *padapter);
uint rtw_hal_deinit(struct adapter *padapter);
void rtw_hal_stop(struct adapter *padapter);
void rtw_hal_set_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_chip_configure(struct adapter *padapter);
void rtw_hal_read_chip_info(struct adapter *padapter);
void rtw_hal_read_chip_version(struct adapter *padapter);
u8 rtw_hal_get_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
void rtw_hal_set_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable, void *pValue1,
bool bSet);
u32 rtw_hal_inirp_init(struct adapter *padapter);
void rtw_hal_inirp_deinit(struct adapter *padapter);
void usb_intf_stop(struct adapter *padapter);
bool rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 rtw_hal_init_xmit_priv(struct adapter *padapter);
int rtw_hal_init_recv_priv(struct adapter *padapter);
void rtw_hal_free_recv_priv(struct adapter *padapter);
void rtw_hal_update_ra_mask(struct adapter *padapter, u32 mac_id, u8 level);
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg, u8 level);
void rtw_hal_clone_data(struct adapter *dst_adapt,
struct adapter *src_adapt);
void beacon_timing_control(struct adapter *padapter);
u32 rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
void rtw_hal_set_bwmode(struct adapter *padapter,
enum ht_channel_width Bandwidth, u8 Offset);
void rtw_hal_set_chan(struct adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog(struct adapter *padapter);
bool rtw_hal_antdiv_before_linked(struct adapter *padapter);
void rtw_hal_antdiv_rssi_compared(struct adapter *padapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
void rtw_hal_sreset_init(struct adapter *padapter);
void rtw_hal_notch_filter(struct adapter *adapter, bool enable);
void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_do_join(struct adapter *padapter);
#endif /* __HAL_INTF_H__ */

742
drivers/staging/rtl8188eu/include/ieee80211.h
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@ -1,742 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __IEEE80211_H
#define __IEEE80211_H
#include <osdep_service.h>
#include <drv_types.h>
#include "wifi.h"
#include <linux/wireless.h>
#ifdef CONFIG_88EU_AP_MODE
#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28)
/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */
enum {
RTL871X_HOSTAPD_FLUSH = 1,
RTL871X_HOSTAPD_ADD_STA = 2,
RTL871X_HOSTAPD_REMOVE_STA = 3,
RTL871X_HOSTAPD_GET_INFO_STA = 4,
/* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */
RTL871X_HOSTAPD_GET_WPAIE_STA = 5,
RTL871X_SET_ENCRYPTION = 6,
RTL871X_GET_ENCRYPTION = 7,
RTL871X_HOSTAPD_SET_FLAGS_STA = 8,
RTL871X_HOSTAPD_GET_RID = 9,
RTL871X_HOSTAPD_SET_RID = 10,
RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11,
RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12,
RTL871X_HOSTAPD_MLME = 13,
RTL871X_HOSTAPD_SCAN_REQ = 14,
RTL871X_HOSTAPD_STA_CLEAR_STATS = 15,
RTL871X_HOSTAPD_SET_BEACON = 16,
RTL871X_HOSTAPD_SET_WPS_BEACON = 17,
RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18,
RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19,
RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20,
RTL871X_HOSTAPD_SET_MACADDR_ACL = 21,
RTL871X_HOSTAPD_ACL_ADD_STA = 22,
RTL871X_HOSTAPD_ACL_REMOVE_STA = 23,
};
/* STA flags */
#define WLAN_STA_AUTH BIT(0)
#define WLAN_STA_ASSOC BIT(1)
#define WLAN_STA_PS BIT(2)
#define WLAN_STA_TIM BIT(3)
#define WLAN_STA_PERM BIT(4)
#define WLAN_STA_AUTHORIZED BIT(5)
#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */
#define WLAN_STA_SHORT_PREAMBLE BIT(7)
#define WLAN_STA_PREAUTH BIT(8)
#define WLAN_STA_WME BIT(9)
#define WLAN_STA_MFP BIT(10)
#define WLAN_STA_HT BIT(11)
#define WLAN_STA_WPS BIT(12)
#define WLAN_STA_MAYBE_WPS BIT(13)
#define WLAN_STA_NONERP BIT(31)
#endif
#define IEEE_CMD_SET_WPA_PARAM 1
#define IEEE_CMD_SET_WPA_IE 2
#define IEEE_CMD_SET_ENCRYPTION 3
#define IEEE_CMD_MLME 4
#define IEEE_PARAM_WPA_ENABLED 1
#define IEEE_PARAM_TKIP_COUNTERMEASURES 2
#define IEEE_PARAM_DROP_UNENCRYPTED 3
#define IEEE_PARAM_PRIVACY_INVOKED 4
#define IEEE_PARAM_AUTH_ALGS 5
#define IEEE_PARAM_IEEE_802_1X 6
#define IEEE_PARAM_WPAX_SELECT 7
#define AUTH_ALG_OPEN_SYSTEM 0x1
#define AUTH_ALG_SHARED_KEY 0x2
#define AUTH_ALG_LEAP 0x00000004
#define IEEE_MLME_STA_DEAUTH 1
#define IEEE_MLME_STA_DISASSOC 2
#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2
#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3
#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4
#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5
#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6
#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7
#define IEEE_CRYPT_ALG_NAME_LEN 16
#define WPA_CIPHER_NONE BIT(0)
#define WPA_CIPHER_WEP40 BIT(1)
#define WPA_CIPHER_WEP104 BIT(2)
#define WPA_CIPHER_TKIP BIT(3)
#define WPA_CIPHER_CCMP BIT(4)
#define WPA_SELECTOR_LEN 4
extern u8 RTW_WPA_OUI_TYPE[];
extern u8 WPA_AUTH_KEY_MGMT_NONE[];
extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[];
extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[];
extern u8 WPA_CIPHER_SUITE_NONE[];
extern u8 WPA_CIPHER_SUITE_WEP40[];
extern u8 WPA_CIPHER_SUITE_TKIP[];
extern u8 WPA_CIPHER_SUITE_WRAP[];
extern u8 WPA_CIPHER_SUITE_CCMP[];
extern u8 WPA_CIPHER_SUITE_WEP104[];
#define RSN_HEADER_LEN 4
#define RSN_SELECTOR_LEN 4
extern u16 RSN_VERSION_BSD;
extern u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[];
extern u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[];
extern u8 RSN_CIPHER_SUITE_NONE[];
extern u8 RSN_CIPHER_SUITE_WEP40[];
extern u8 RSN_CIPHER_SUITE_TKIP[];
extern u8 RSN_CIPHER_SUITE_WRAP[];
extern u8 RSN_CIPHER_SUITE_CCMP[];
extern u8 RSN_CIPHER_SUITE_WEP104[];
enum ratr_table_mode {
RATR_INX_WIRELESS_NGB = 0, /* BGN 40 Mhz 2SS 1SS */
RATR_INX_WIRELESS_NG = 1, /* GN or N */
RATR_INX_WIRELESS_NB = 2, /* BGN 20 Mhz 2SS 1SS or BN */
RATR_INX_WIRELESS_N = 3,
RATR_INX_WIRELESS_GB = 4,
RATR_INX_WIRELESS_G = 5,
RATR_INX_WIRELESS_B = 6,
RATR_INX_WIRELESS_MC = 7,
RATR_INX_WIRELESS_AC_N = 8,
};
enum NETWORK_TYPE {
WIRELESS_INVALID = 0,
/* Sub-Element */
WIRELESS_11B = BIT(0), /* tx:cck only, rx:cck only, hw: cck */
WIRELESS_11G = BIT(1), /* tx:ofdm only, rx:ofdm & cck, hw:cck & ofdm*/
WIRELESS_11A = BIT(2), /* tx:ofdm only, rx: ofdm only, hw:ofdm only */
WIRELESS_11_24N = BIT(3), /* tx:MCS only, rx:MCS & cck, hw:MCS & cck */
WIRELESS_11_5N = BIT(4), /* tx:MCS only, rx:MCS & ofdm, hw:ofdm only */
WIRELESS_AC = BIT(6),
/* Combination */
/* tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm */
WIRELESS_11BG = (WIRELESS_11B | WIRELESS_11G),
/* tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm */
WIRELESS_11G_24N = (WIRELESS_11G | WIRELESS_11_24N),
/* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11A_5N = (WIRELESS_11A | WIRELESS_11_5N),
/* tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck */
WIRELESS_11BG_24N = (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N),
/* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11AGN = (WIRELESS_11A | WIRELESS_11G | WIRELESS_11_24N |
WIRELESS_11_5N),
WIRELESS_11ABGN = (WIRELESS_11A | WIRELESS_11B | WIRELESS_11G |
WIRELESS_11_24N | WIRELESS_11_5N),
};
#define SUPPORTED_24G_NETTYPE_MSK \
(WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N)
#define SUPPORTED_5G_NETTYPE_MSK \
(WIRELESS_11A | WIRELESS_11_5N)
#define IsSupported24G(NetType) \
((NetType) & SUPPORTED_24G_NETTYPE_MSK ? true : false)
#define IsSupported5G(NetType) \
((NetType) & SUPPORTED_5G_NETTYPE_MSK ? true : false)
#define IsEnableHWCCK(NetType) \
IsSupported24G(NetType)
#define IsEnableHWOFDM(NetType) \
((NetType) & (WIRELESS_11G | WIRELESS_11_24N | \
SUPPORTED_5G_NETTYPE_MSK) ? true : false)
#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType)
#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedTxCCK(NetType) \
((NetType) & (WIRELESS_11B) ? true : false)
#define IsSupportedTxOFDM(NetType) \
((NetType) & (WIRELESS_11G | WIRELESS_11A) ? true : false)
#define IsSupportedTxMCS(NetType) \
((NetType) & (WIRELESS_11_24N | WIRELESS_11_5N) ? true : false)
struct ieee_param {
u32 cmd;
u8 sta_addr[ETH_ALEN];
union {
struct {
u8 name;
u32 value;
} wpa_param;
struct {
u32 len;
u8 reserved[32];
u8 data[0];
} wpa_ie;
struct {
int command;
int reason_code;
} mlme;
struct {
u8 alg[IEEE_CRYPT_ALG_NAME_LEN];
u8 set_tx;
u32 err;
u8 idx;
u8 seq[8]; /* sequence counter (set: RX, get: TX) */
u16 key_len;
u8 key[0];
} crypt;
#ifdef CONFIG_88EU_AP_MODE
struct {
u16 aid;
u16 capability;
int flags;
u8 tx_supp_rates[16];
struct ieee80211_ht_cap ht_cap;
} add_sta;
struct {
u8 reserved[2];/* for set max_num_sta */
u8 buf[0];
} bcn_ie;
#endif
} u;
};
#ifdef CONFIG_88EU_AP_MODE
struct ieee_param_ex {
u32 cmd;
u8 sta_addr[ETH_ALEN];
u8 data[0];
};
struct sta_data {
u16 aid;
u16 capability;
int flags;
u32 sta_set;
u8 tx_supp_rates[16];
u32 tx_supp_rates_len;
struct ieee80211_ht_cap ht_cap;
u64 rx_pkts;
u64 rx_bytes;
u64 rx_drops;
u64 tx_pkts;
u64 tx_bytes;
u64 tx_drops;
};
#endif
#define IEEE80211_DATA_LEN 2304
/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
* 6.2.1.1.2.
* The figure in section 7.1.2 suggests a body size of up to 2312
* bytes is allowed, which is a bit confusing, I suspect this
* represents the 2304 bytes of real data, plus a possible 8 bytes of
* WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro)
*/
#define IEEE80211_HLEN 30
#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
/* this is stolen from ipw2200 driver */
#define IEEE_IBSS_MAC_HASH_SIZE 31
enum eap_type {
EAP_PACKET = 0,
EAPOL_START,
EAPOL_LOGOFF,
EAPOL_KEY,
EAPOL_ENCAP_ASF_ALERT
};
#define IEEE80211_3ADDR_LEN 24
#define IEEE80211_4ADDR_LEN 30
#define IEEE80211_FCS_LEN 4
#define MIN_FRAG_THRESHOLD 256U
#define MAX_FRAG_THRESHOLD 2346U
/* sequence control field */
#define RTW_IEEE80211_SCTL_FRAG 0x000F
#define RTW_IEEE80211_SCTL_SEQ 0xFFF0
#define RTW_ERP_INFO_NON_ERP_PRESENT BIT(0)
#define RTW_ERP_INFO_USE_PROTECTION BIT(1)
#define RTW_ERP_INFO_BARKER_PREAMBLE_MODE BIT(2)
/* QoS, QOS */
#define NORMAL_ACK 0
#define NO_ACK 1
#define NON_EXPLICIT_ACK 2
#define BLOCK_ACK 3
#ifndef ETH_P_PAE
#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
#endif /* ETH_P_PAE */
#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */
#define ETH_P_ECONET 0x0018
#ifndef ETH_P_80211_RAW
#define ETH_P_80211_RAW (ETH_P_ECONET + 1)
#endif
/* IEEE 802.11 defines */
#define P80211_OUI_LEN 3
struct ieee80211_snap_hdr {
u8 dsap; /* always 0xAA */
u8 ssap; /* always 0xAA */
u8 ctrl; /* always 0x03 */
u8 oui[P80211_OUI_LEN]; /* organizational universal id */
} __packed;
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
#define WLAN_QC_GET_TID(qc) ((qc) & 0x0f)
#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTW_IEEE80211_SCTL_FRAG)
#define WLAN_GET_SEQ_SEQ(seq) ((seq) & RTW_IEEE80211_SCTL_SEQ)
/* Non standard? Not in <linux/ieee80211.h> */
#define WLAN_REASON_EXPIRATION_CHK 65535
#define IEEE80211_MGMT_HDR_LEN 24
#define IEEE80211_DATA_HDR3_LEN 24
#define IEEE80211_DATA_HDR4_LEN 30
#define IEEE80211_CCK_MODULATION BIT(0)
#define IEEE80211_OFDM_MODULATION BIT(1)
#define IEEE80211_24GHZ_BAND BIT(0)
#define IEEE80211_52GHZ_BAND BIT(1)
#define IEEE80211_CCK_RATE_LEN 4
#define IEEE80211_NUM_OFDM_RATESLEN 8
#define IEEE80211_CCK_RATE_1MB 0x02
#define IEEE80211_CCK_RATE_2MB 0x04
#define IEEE80211_CCK_RATE_5MB 0x0B
#define IEEE80211_CCK_RATE_11MB 0x16
#define IEEE80211_OFDM_RATE_LEN 8
#define IEEE80211_OFDM_RATE_6MB 0x0C
#define IEEE80211_OFDM_RATE_9MB 0x12
#define IEEE80211_OFDM_RATE_12MB 0x18
#define IEEE80211_OFDM_RATE_18MB 0x24
#define IEEE80211_OFDM_RATE_24MB 0x30
#define IEEE80211_OFDM_RATE_36MB 0x48
#define IEEE80211_OFDM_RATE_48MB 0x60
#define IEEE80211_OFDM_RATE_54MB 0x6C
#define IEEE80211_BASIC_RATE_MASK 0x80
#define IEEE80211_CCK_RATE_1MB_MASK BIT(0)
#define IEEE80211_CCK_RATE_2MB_MASK BIT(1)
#define IEEE80211_CCK_RATE_5MB_MASK BIT(2)
#define IEEE80211_CCK_RATE_11MB_MASK BIT(3)
#define IEEE80211_OFDM_RATE_6MB_MASK BIT(4)
#define IEEE80211_OFDM_RATE_9MB_MASK BIT(5)
#define IEEE80211_OFDM_RATE_12MB_MASK BIT(6)
#define IEEE80211_OFDM_RATE_18MB_MASK BIT(7)
#define IEEE80211_OFDM_RATE_24MB_MASK BIT(8)
#define IEEE80211_OFDM_RATE_36MB_MASK BIT(9)
#define IEEE80211_OFDM_RATE_48MB_MASK BIT(10)
#define IEEE80211_OFDM_RATE_54MB_MASK BIT(11)
#define IEEE80211_CCK_RATES_MASK 0x0000000F
#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \
IEEE80211_CCK_RATE_2MB_MASK)
#define IEEE80211_CCK_DEFAULT_RATES_MASK \
(IEEE80211_CCK_BASIC_RATES_MASK | \
IEEE80211_CCK_RATE_5MB_MASK | \
IEEE80211_CCK_RATE_11MB_MASK)
#define IEEE80211_OFDM_RATES_MASK 0x00000FF0
#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \
IEEE80211_OFDM_RATE_12MB_MASK | \
IEEE80211_OFDM_RATE_24MB_MASK)
#define IEEE80211_OFDM_DEFAULT_RATES_MASK \
(IEEE80211_OFDM_BASIC_RATES_MASK | \
IEEE80211_OFDM_RATE_9MB_MASK | \
IEEE80211_OFDM_RATE_18MB_MASK | \
IEEE80211_OFDM_RATE_36MB_MASK | \
IEEE80211_OFDM_RATE_48MB_MASK | \
IEEE80211_OFDM_RATE_54MB_MASK)
#define IEEE80211_NUM_OFDM_RATES 8
#define IEEE80211_NUM_CCK_RATES 4
#define IEEE80211_OFDM_SHIFT_MASK_A 4
/* IEEE 802.11 requires that STA supports concurrent reception of at least
* three fragmented frames. This define can be increased to support more
* concurrent frames, but it should be noted that each entry can consume about
* 2 kB of RAM and increasing cache size will slow down frame reassembly.
*/
#define IEEE80211_FRAG_CACHE_LEN 4
#define SEC_KEY_1 BIT(0)
#define SEC_KEY_2 BIT(1)
#define SEC_KEY_3 BIT(2)
#define SEC_KEY_4 BIT(3)
#define SEC_ACTIVE_KEY BIT(4)
#define SEC_AUTH_MODE BIT(5)
#define SEC_UNICAST_GROUP BIT(6)
#define SEC_LEVEL BIT(7)
#define SEC_ENABLED BIT(8)
#define SEC_LEVEL_0 0 /* None */
#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */
#define SEC_LEVEL_2 2 /* Level 1 + TKIP */
#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */
#define SEC_LEVEL_3 4 /* Level 2 + CCMP */
#define WEP_KEYS 4
#define WEP_KEY_LEN 13
/* SWEEP TABLE ENTRIES NUMBER*/
#define MAX_SWEEP_TAB_ENTRIES 42
#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs
* only use 8, and then use extended rates for the remaining supported
* rates. Other APs, however, stick all of their supported rates on the
* main rates information element...
*/
#define MAX_RATES_LENGTH ((u8)12)
#define MAX_RATES_EX_LENGTH ((u8)16)
#define MAX_NETWORK_COUNT 128
#define MAX_CHANNEL_NUMBER 161
#define IEEE80211_SOFTMAC_SCAN_TIME 400
/* HZ / 2) */
#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2)
#define CRC_LENGTH 4U
#define MAX_WPA_IE_LEN (256)
#define MAX_WPS_IE_LEN (512)
#define MAX_P2P_IE_LEN (256)
#define MAX_WFD_IE_LEN (128)
#define NETWORK_EMPTY_ESSID BIT(0)
#define NETWORK_HAS_OFDM BIT(1)
#define NETWORK_HAS_CCK BIT(2)
#define IW_ESSID_MAX_SIZE 32
/*
* join_res:
* -1: authentication fail
* -2: association fail
* > 0: TID
*/
enum ieee80211_state {
/* the card is not linked at all */
IEEE80211_NOLINK = 0,
/* IEEE80211_ASSOCIATING* are for BSS client mode
* the driver shall not perform RX filtering unless
* the state is LINKED.
* The driver shall just check for the state LINKED and
* defaults to NOLINK for ALL the other states (including
* LINKED_SCANNING)
*/
/* the association procedure will start (wq scheduling)*/
IEEE80211_ASSOCIATING,
IEEE80211_ASSOCIATING_RETRY,
/* the association procedure is sending AUTH request*/
IEEE80211_ASSOCIATING_AUTHENTICATING,
/* the association procedure has successfully authentcated
* and is sending association request
*/
IEEE80211_ASSOCIATING_AUTHENTICATED,
/* the link is ok. the card associated to a BSS or linked
* to a ibss cell or acting as an AP and creating the bss
*/
IEEE80211_LINKED,
/* same as LINKED, but the driver shall apply RX filter
* rules as we are in NO_LINK mode. As the card is still
* logically linked, but it is doing a syncro site survey
* then it will be back to LINKED state.
*/
IEEE80211_LINKED_SCANNING,
};
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
#define CFG_IEEE80211_RESERVE_FCS BIT(0)
#define CFG_IEEE80211_COMPUTE_FCS BIT(1)
#define MAXTID 16
#define IEEE_A BIT(0)
#define IEEE_B BIT(1)
#define IEEE_G BIT(2)
#define IEEE_MODE_MASK (IEEE_A | IEEE_B | IEEE_G)
/* Action category code */
enum rtw_ieee80211_category {
RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0,
RTW_WLAN_CATEGORY_QOS = 1,
RTW_WLAN_CATEGORY_DLS = 2,
RTW_WLAN_CATEGORY_BACK = 3,
RTW_WLAN_CATEGORY_PUBLIC = 4, /* IEEE 802.11 public action frames */
RTW_WLAN_CATEGORY_RADIO_MEASUREMENT = 5,
RTW_WLAN_CATEGORY_FT = 6,
RTW_WLAN_CATEGORY_HT = 7,
RTW_WLAN_CATEGORY_SA_QUERY = 8,
RTW_WLAN_CATEGORY_TDLS = 12,
RTW_WLAN_CATEGORY_WMM = 17,
RTW_WLAN_CATEGORY_P2P = 0x7f,/* P2P action frames */
};
enum _PUBLIC_ACTION {
ACT_PUBLIC_BSSCOEXIST = 0, /* 20/40 BSS Coexistence */
ACT_PUBLIC_DSE_ENABLE = 1,
ACT_PUBLIC_DSE_DEENABLE = 2,
ACT_PUBLIC_DSE_REG_LOCATION = 3,
ACT_PUBLIC_EXT_CHL_SWITCH = 4,
ACT_PUBLIC_DSE_MSR_REQ = 5,
ACT_PUBLIC_DSE_MSR_RPRT = 6,
ACT_PUBLIC_MP = 7, /* Measurement Pilot */
ACT_PUBLIC_DSE_PWR_CONSTRAINT = 8,
ACT_PUBLIC_VENDOR = 9, /* for WIFI_DIRECT */
ACT_PUBLIC_GAS_INITIAL_REQ = 10,
ACT_PUBLIC_GAS_INITIAL_RSP = 11,
ACT_PUBLIC_GAS_COMEBACK_REQ = 12,
ACT_PUBLIC_GAS_COMEBACK_RSP = 13,
ACT_PUBLIC_TDLS_DISCOVERY_RSP = 14,
ACT_PUBLIC_LOCATION_TRACK = 15,
ACT_PUBLIC_MAX
};
/* HT features action code */
enum rtw_ieee80211_ht_actioncode {
RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
RTW_WLAN_ACTION_SM_PS = 1,
RTW_WLAN_ACTION_PSPM = 2,
RTW_WLAN_ACTION_PCO_PHASE = 3,
RTW_WLAN_ACTION_MIMO_CSI_MX = 4,
RTW_WLAN_ACTION_MIMO_NONCP_BF = 5,
RTW_WLAN_ACTION_MIMP_CP_BF = 6,
RTW_WLAN_ACTION_ASEL_INDICATES_FB = 7,
RTW_WLAN_ACTION_HI_INFO_EXCHG = 8,
};
#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
* 00:50:F2
*/
#define WME_OUI_TYPE 2
#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1
#define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2
#define WME_VERSION 1
#define WME_ACTION_CODE_SETUP_REQUEST 0
#define WME_ACTION_CODE_SETUP_RESPONSE 1
#define WME_ACTION_CODE_TEARDOWN 2
#define WME_SETUP_RESPONSE_STATUS_ADMISSION_ACCEPTED 0
#define WME_SETUP_RESPONSE_STATUS_INVALID_PARAMETERS 1
#define WME_SETUP_RESPONSE_STATUS_REFUSED 3
#define WME_TSPEC_DIRECTION_UPLINK 0
#define WME_TSPEC_DIRECTION_DOWNLINK 1
#define WME_TSPEC_DIRECTION_BI_DIRECTIONAL 3
#define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */
#define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */
/**
* enum rtw_ieee80211_channel_flags - channel flags
*
* Channel flags set by the regulatory control code.
*
* @RTW_IEEE80211_CHAN_DISABLED: This channel is disabled.
* @RTW_IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted
* on this channel.
* @RTW_IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
* @RTW_IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
* @RTW_IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel
* is not permitted.
* @RTW_IEEE80211_CHAN_NO_HT40MINUS: extension channel below this channel
* is not permitted.
*/
enum rtw_ieee80211_channel_flags {
RTW_IEEE80211_CHAN_DISABLED = BIT(0),
RTW_IEEE80211_CHAN_PASSIVE_SCAN = BIT(1),
RTW_IEEE80211_CHAN_NO_IBSS = BIT(2),
RTW_IEEE80211_CHAN_RADAR = BIT(3),
RTW_IEEE80211_CHAN_NO_HT40PLUS = BIT(4),
RTW_IEEE80211_CHAN_NO_HT40MINUS = BIT(5),
};
#define RTW_IEEE80211_CHAN_NO_HT40 \
(RTW_IEEE80211_CHAN_NO_HT40PLUS | RTW_IEEE80211_CHAN_NO_HT40MINUS)
/* Represent channel details, subset of ieee80211_channel */
struct rtw_ieee80211_channel {
u16 hw_value;
u32 flags;
};
#define CHAN_FMT \
"hw_value:%u, " \
"flags:0x%08x" \
#define CHAN_ARG(channel) \
(channel)->hw_value \
, (channel)->flags \
/* Parsed Information Elements */
struct rtw_ieee802_11_elems {
u8 *ssid;
u8 ssid_len;
u8 *supp_rates;
u8 supp_rates_len;
u8 *fh_params;
u8 fh_params_len;
u8 *ds_params;
u8 ds_params_len;
u8 *cf_params;
u8 cf_params_len;
u8 *tim;
u8 tim_len;
u8 *ibss_params;
u8 ibss_params_len;
u8 *challenge;
u8 challenge_len;
u8 *erp_info;
u8 erp_info_len;
u8 *ext_supp_rates;
u8 ext_supp_rates_len;
u8 *wpa_ie;
u8 wpa_ie_len;
u8 *rsn_ie;
u8 rsn_ie_len;
u8 *wme;
u8 wme_len;
u8 *wme_tspec;
u8 wme_tspec_len;
u8 *wps_ie;
u8 wps_ie_len;
u8 *power_cap;
u8 power_cap_len;
u8 *supp_channels;
u8 supp_channels_len;
u8 *mdie;
u8 mdie_len;
u8 *ftie;
u8 ftie_len;
u8 *timeout_int;
u8 timeout_int_len;
u8 *ht_capabilities;
u8 ht_capabilities_len;
u8 *ht_operation;
u8 ht_operation_len;
u8 *vendor_ht_cap;
u8 vendor_ht_cap_len;
};
enum parse_res {
ParseOK = 0,
ParseUnknown = 1,
ParseFailed = -1
};
enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
struct rtw_ieee802_11_elems *elems,
int show_errors);
u8 *rtw_set_fixed_ie(void *pbuf, unsigned int len,
void *source, unsigned int *frlen);
u8 *rtw_set_ie(u8 *pbuf, int index, uint len, u8 *source, uint *frlen);
enum secondary_ch_offset {
SCN = 0, /* no secondary channel */
SCA = 1, /* secondary channel above */
SCB = 3, /* secondary channel below */
};
u8 *rtw_get_ie(u8 *pbuf, int index, uint *len, int limit);
void rtw_set_supported_rate(u8 *SupportedRates, uint mode);
unsigned char *rtw_get_wpa_ie(unsigned char *pie, uint *wpa_ie_len, int limit);
unsigned char *rtw_get_wpa2_ie(unsigned char *pie, uint *rsn_ie_len, int limit);
int rtw_get_wpa_cipher_suite(u8 *s);
int rtw_get_wpa2_cipher_suite(u8 *s);
int rtw_get_wapi_ie(u8 *in_ie, uint in_len, u8 *wapi_ie, u16 *wapi_len);
int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher,
int *pairwise_cipher, int *is_8021x);
int rtw_parse_wpa2_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher,
int *pairwise_cipher, int *is_8021x);
void rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len,
u8 *wpa_ie, u16 *wpa_len);
u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen);
u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen);
u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
u8 *buf_attr, u32 *len_attr);
u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
u8 *buf_content, uint *len_content);
uint rtw_get_rateset_len(u8 *rateset);
struct registry_priv;
int rtw_generate_ie(struct registry_priv *pregistrypriv);
int rtw_get_bit_value_from_ieee_value(u8 val);
bool rtw_is_cckrates_included(u8 *rate);
bool rtw_is_cckratesonly_included(u8 *rate);
int rtw_check_network_type(unsigned char *rate);
void rtw_get_bcn_info(struct wlan_network *pnetwork);
void rtw_macaddr_cfg(u8 *mac_addr);
u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
unsigned char *MCS_rate);
#endif /* IEEE80211_H */

21
drivers/staging/rtl8188eu/include/mlme_osdep.h
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@ -1,21 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __MLME_OSDEP_H_
#define __MLME_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
void rtw_init_mlme_timer(struct adapter *padapter);
void rtw_os_indicate_disconnect(struct adapter *adapter);
void rtw_os_indicate_connect(struct adapter *adapter);
void rtw_report_sec_ie(struct adapter *adapter, u8 authmode, u8 *sec_ie);
void rtw_reset_securitypriv(struct adapter *adapter);
void indicate_wx_scan_complete_event(struct adapter *padapter);
#endif /* _MLME_OSDEP_H_ */

28
drivers/staging/rtl8188eu/include/mon.h
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@ -1,28 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* RTL8188EU monitor interface
*
* Copyright (C) 2015 Jakub Sitnicki
*/
/*
* Monitor interface receives all transmitted and received IEEE 802.11
* frames, both Data and Management, and passes them up to userspace
* preserving the WLAN headers.
*/
#ifndef _MON_H_
#define _MON_H_
struct net_device;
struct recv_frame;
struct xmit_frame;
struct net_device *rtl88eu_mon_init(void);
void rtl88eu_mon_deinit(struct net_device *dev);
void rtl88eu_mon_recv_hook(struct net_device *dev, struct recv_frame *frame);
void rtl88eu_mon_xmit_hook(struct net_device *dev, struct xmit_frame *frame,
uint frag_len);
#endif /* _MON_H_ */

1052
drivers/staging/rtl8188eu/include/odm.h
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101
drivers/staging/rtl8188eu/include/odm_hwconfig.h
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@ -1,101 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
/* Definition */
/* CCK Rates, TxHT = 0 */
#define DESC92C_RATE1M 0x00
#define DESC92C_RATE2M 0x01
#define DESC92C_RATE5_5M 0x02
#define DESC92C_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC92C_RATE6M 0x04
#define DESC92C_RATE9M 0x05
#define DESC92C_RATE12M 0x06
#define DESC92C_RATE18M 0x07
#define DESC92C_RATE24M 0x08
#define DESC92C_RATE36M 0x09
#define DESC92C_RATE48M 0x0a
#define DESC92C_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC92C_RATEMCS0 0x0c
#define DESC92C_RATEMCS1 0x0d
#define DESC92C_RATEMCS2 0x0e
#define DESC92C_RATEMCS3 0x0f
#define DESC92C_RATEMCS4 0x10
#define DESC92C_RATEMCS5 0x11
#define DESC92C_RATEMCS6 0x12
#define DESC92C_RATEMCS7 0x13
#define DESC92C_RATEMCS8 0x14
#define DESC92C_RATEMCS9 0x15
#define DESC92C_RATEMCS10 0x16
#define DESC92C_RATEMCS11 0x17
#define DESC92C_RATEMCS12 0x18
#define DESC92C_RATEMCS13 0x19
#define DESC92C_RATEMCS14 0x1a
#define DESC92C_RATEMCS15 0x1b
#define DESC92C_RATEMCS15_SG 0x1c
#define DESC92C_RATEMCS32 0x20
/* structure and define */
struct phy_rx_agc_info {
#ifdef __LITTLE_ENDIAN
u8 gain:7, trsw:1;
#else
u8 trsw:1, gain:7;
#endif
};
struct phy_status_rpt {
struct phy_rx_agc_info path_agc[RF_PATH_MAX];
u8 ch_corr[2];
u8 cck_sig_qual_ofdm_pwdb_all;
u8 cck_agc_rpt_ofdm_cfosho_a;
u8 cck_rpt_b_ofdm_cfosho_b;
u8 rsvd_1;/* ch_corr_msb; */
u8 noise_power_db_msb;
u8 path_cfotail[2];
u8 pcts_mask[2];
s8 stream_rxevm[2];
u8 path_rxsnr[3];
u8 noise_power_db_lsb;
u8 rsvd_2[3];
u8 stream_csi[2];
u8 stream_target_csi[2];
s8 sig_evm;
u8 rsvd_3;
#ifdef __LITTLE_ENDIAN
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
u8 sgi_en:1;
u8 rxsc:2;
u8 idle_long:1;
u8 r_ant_train_en:1;
u8 ant_sel_b:1;
u8 ant_sel:1;
#else /* _BIG_ENDIAN_ */
u8 ant_sel:1;
u8 ant_sel_b:1;
u8 r_ant_train_en:1;
u8 idle_long:1;
u8 rxsc:2;
u8 sgi_en:1;
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
#endif
};
void odm_phy_status_query(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *phy_info,
u8 *phy_status,
struct odm_per_pkt_info *pkt_info);
#endif

63
drivers/staging/rtl8188eu/include/odm_precomp.h
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@ -1,63 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __ODM_PRECOMP_H__
#define __ODM_PRECOMP_H__
#include "odm_types.h"
#define TEST_FALG___ 1
/* 2 Config Flags and Structs - defined by each ODM Type */
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
#include <usb_ops_linux.h>
/* 2 OutSrc Header Files */
#include "odm.h"
#include "odm_hwconfig.h"
#include "phydm_regdefine11n.h"
#include "hal8188e_rate_adaptive.h" /* for RA,Power training */
#include "rtl8188e_hal.h"
#include "phydm_reg.h"
#include "odm_rtl8188e.h"
void odm_DIGInit(struct odm_dm_struct *pDM_Odm);
void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm);
void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm);
void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm);
void odm_DIG(struct odm_dm_struct *pDM_Odm);
void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step);
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm);
void odm_1R_CCA(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext);
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm);
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm);
#endif /* __ODM_PRECOMP_H__ */

39
drivers/staging/rtl8188eu/include/odm_rtl8188e.h
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@ -1,39 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __ODM_RTL8188E_H__
#define __ODM_RTL8188E_H__
#define MAIN_ANT 0
#define AUX_ANT 1
#define MAIN_ANT_CG_TRX 1
#define AUX_ANT_CG_TRX 0
#define MAIN_ANT_CGCS_RX 0
#define AUX_ANT_CGCS_RX 1
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm);
void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm);
void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, u8 *desc,
u8 mac_id);
void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant);
void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux,
u32 mac_id, u8 rx_pwdb_all);
void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingCallback(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm);
bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *pDM_Odm);
#endif

24
drivers/staging/rtl8188eu/include/odm_types.h
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@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
#define ODM_CE 0x04 /* BIT2 */
enum HAL_STATUS {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
};
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc + 8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc + 8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc + 28, 29, 1, __Value)
#endif /* __ODM_TYPES_H__ */

35
drivers/staging/rtl8188eu/include/osdep_intf.h
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@ -1,35 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __OSDEP_INTF_H_
#define __OSDEP_INTF_H_
#include <osdep_service.h>
#include <drv_types.h>
extern char *rtw_initmac;
extern int rtw_mc2u_disable;
u8 rtw_init_drv_sw(struct adapter *padapter);
u8 rtw_free_drv_sw(struct adapter *padapter);
u8 rtw_reset_drv_sw(struct adapter *padapter);
void rtw_stop_drv_threads(struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
struct net_device *rtw_init_netdev(void);
u16 rtw_recv_select_queue(struct sk_buff *skb);
int netdev_open(struct net_device *pnetdev);
int ips_netdrv_open(struct adapter *padapter);
void rtw_ips_dev_unload(struct adapter *padapter);
int rtw_ips_pwr_up(struct adapter *padapter);
void rtw_ips_pwr_down(struct adapter *padapter);
#endif /* _OSDEP_INTF_H_ */

81
drivers/staging/rtl8188eu/include/osdep_service.h
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@ -1,81 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __OSDEP_SERVICE_H_
#define __OSDEP_SERVICE_H_
#include <basic_types.h>
#define _FAIL 0
#define _SUCCESS 1
#define RTW_RX_HANDLED 2
#include <linux/spinlock.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/kref.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <linux/circ_buf.h>
#include <linux/uaccess.h>
#include <asm/byteorder.h>
#include <linux/atomic.h>
#include <linux/io.h>
#include <linux/mutex.h>
#include <linux/sem.h>
#include <linux/sched/signal.h>
#include <linux/etherdevice.h>
#include <linux/wireless.h>
#include <net/iw_handler.h>
#include <linux/if_arp.h>
#include <linux/rtnetlink.h>
#include <linux/delay.h>
#include <linux/interrupt.h> /* for struct tasklet_struct */
#include <linux/ip.h>
#include <linux/kthread.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
struct __queue {
struct list_head queue;
spinlock_t lock;
};
static inline struct list_head *get_list_head(struct __queue *queue)
{
return &queue->queue;
}
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
{
return netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) &&
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) &&
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) &&
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3));
}
u8 *_rtw_malloc(u32 sz);
#define rtw_malloc(sz) _rtw_malloc((sz))
void _rtw_init_queue(struct __queue *pqueue);
#define FUNC_NDEV_FMT "%s(%s)"
#define FUNC_NDEV_ARG(ndev) __func__, ndev->name
#define FUNC_ADPT_FMT "%s(%s)"
#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name
/* Macros for handling unaligned memory accesses */
#define RTW_GET_BE24(a) ((((u32)(a)[0]) << 16) | (((u32)(a)[1]) << 8) | \
((u32)(a)[2]))
void rtw_buf_free(u8 **buf, u32 *buf_len);
void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len);
#endif

26
drivers/staging/rtl8188eu/include/phy.h
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/* SPDX-License-Identifier: GPL-2.0 */
#include <odm.h>
#define IQK_DELAY_TIME_88E 10
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
bool phy_mac_config(struct adapter *adapt);
bool rtl88eu_phy_rf_config(struct adapter *adapt);
bool rtl88eu_phy_bb_config(struct adapter *adapt);
u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask);
void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask, u32 data);
u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rf_path,
u32 reg_addr, u32 bit_mask);
void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path rf_path,
u32 reg_addr, u32 bit_mask, u32 data);
void phy_set_tx_power_level(struct adapter *adapt, u8 channel);
void rtl88eu_dm_txpower_track_adjust(struct odm_dm_struct *dm_odm,
u8 type, u8 *dir, u32 *out_write);
void rtl88eu_dm_txpower_tracking_callback_thermalmeter(struct adapter *adapt);
void rtl88eu_phy_iq_calibrate(struct adapter *adapter, bool recovery);
void rtl88eu_phy_lc_calibrate(struct adapter *adapter);

22
drivers/staging/rtl8188eu/include/phydm_reg.h
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@ -1,22 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2016 Realtek Corporation.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HAL_ODM_REG_H__
#define __HAL_ODM_REG_H__
#define ODM_EDCA_VO_PARAM 0x500
#define ODM_EDCA_VI_PARAM 0x504
#define ODM_EDCA_BE_PARAM 0x508
#define ODM_EDCA_BK_PARAM 0x50C
#endif

53
drivers/staging/rtl8188eu/include/phydm_regdefine11n.h
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@ -1,53 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2016 Realtek Corporation.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_RX_DEFAULT_A_11N 0x858
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_FA_RST_11N 0xA2C
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
#define ODM_REG_CCK_CCA_CNT_11N 0xA60
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA1_11N 0xCA4
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
#define ODM_REG_OFDM_FA_RSTD_11N 0xD00
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
#define ODM_REG_ANTSEL_PIN_11N 0x4C
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_BIT_IGI_11N 0x0000007F
#endif

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drivers/staging/rtl8188eu/include/pwrseq.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HAL8188EPWRSEQ_H__
#define __HAL8188EPWRSEQ_H__
#include "pwrseqcmd.h"
/*
* Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
* There are 6 HW Power States:
* 0: POFF--Power Off
* 1: PDN--Power Down
* 2: CARDEMU--Card Emulation
* 3: ACT--Active Mode
* 4: LPS--Low Power State
* 5: SUS--Suspend
*
* PWR SEQ Version: rtl8188E_PwrSeq_V09.h
*/
#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10
#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10
#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15
#define RTL8188E_TRANS_END_STEPS 1
#define RTL8188E_TRANS_CARDEMU_TO_ACT \
/* format
* { offset, cut_msk, cmd, msk, value
* },
* comment here
*/ \
{0x0006, PWR_CMD_POLLING, BIT(1), BIT(1)}, \
/* wait till 0x04[17] = 1 power ready*/ \
{0x0002, PWR_CMD_WRITE, BIT(0) | BIT(1), 0}, \
/* 0x02[1:0] = 0 reset BB*/ \
{0x0026, PWR_CMD_WRITE, BIT(7), BIT(7)}, \
/*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CMD_WRITE, BIT(7), 0}, \
/* 0x04[15] = 0 disable HWPDN (control by DRV)*/ \
{0x0005, PWR_CMD_WRITE, BIT(4) | BIT(3), 0}, \
/*0x04[12:11] = 2b'00 disable WL suspend*/ \
{0x0005, PWR_CMD_WRITE, BIT(0), BIT(0)}, \
/*0x04[8] = 1 polling until return 0*/ \
{0x0005, PWR_CMD_POLLING, BIT(0), 0}, \
/*wait till 0x04[8] = 0*/ \
{0x0023, PWR_CMD_WRITE, BIT(4), 0}, \
/*LDO normal mode*/
#define RTL8188E_TRANS_ACT_TO_CARDEMU \
/* format
* { offset, cut_msk, cmd, msk, value
* },
* comments here
*/ \
{0x001F, PWR_CMD_WRITE, 0xFF, 0}, \
/*0x1F[7:0] = 0 turn off RF*/ \
{0x0023, PWR_CMD_WRITE, BIT(4), BIT(4)}, \
/*LDO Sleep mode*/ \
{0x0005, PWR_CMD_WRITE, BIT(1), BIT(1)}, \
/*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CMD_POLLING, BIT(1), 0}, \
/*wait till 0x04[9] = 0 polling until return 0 to disable*/
#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \
/* format
* { offset, cut_msk, cmd, msk,
* value },
* comments here
*/ \
{0x0026, PWR_CMD_WRITE, BIT(7), BIT(7)}, \
/*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3)}, \
/*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0007, PWR_CMD_WRITE, 0xFF, 0}, \
/* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */\
{0x0041, PWR_CMD_WRITE, BIT(4), 0}, \
/*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4)}, \
/*Set USB suspend enable local register 0xfe10[4]=1 */
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
#define RTL8188E_TRANS_ACT_TO_LPS \
/* format
* { offset, cut_msk, cmd, msk,
* value },
* comments here
*/ \
{0x0522, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \
{0x05F8, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x05F9, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x05FA, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x05FB, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x0002, PWR_CMD_WRITE, BIT(0), 0}, \
/*CCK and OFDM are disabled,and clock are gated*/ \
{0x0002, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, \
/*Delay 1us*/ \
{0x0100, PWR_CMD_WRITE, 0xFF, 0x3F}, \
/*Reset MAC TRX*/ \
{0x0101, PWR_CMD_WRITE, BIT(1), 0}, \
/*check if removed later*/\
{0x0553, PWR_CMD_WRITE, BIT(5), BIT(5)}, \
/*Respond TxOK to scheduler*/
#define RTL8188E_TRANS_END \
/* format
* { offset, cut_msk, cmd, msk,
* value },
* comments here
*/ \
{0xFFFF, PWR_CMD_END, 0, 0},
extern struct wl_pwr_cfg rtl8188E_power_on_flow
[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_disable_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_enter_lps_flow
[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS];
#endif /* __HAL8188EPWRSEQ_H__ */

37
drivers/staging/rtl8188eu/include/pwrseqcmd.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __HALPWRSEQCMD_H__
#define __HALPWRSEQCMD_H__
#include <drv_types.h>
/* The value of cmd: 4 bits */
#define PWR_CMD_WRITE 0x01
#define PWR_CMD_POLLING 0x02
#define PWR_CMD_DELAY 0x03
#define PWR_CMD_END 0x04
enum pwrseq_cmd_delat_unit {
PWRSEQ_DELAY_US,
PWRSEQ_DELAY_MS,
};
struct wl_pwr_cfg {
u16 offset;
u8 cmd:4;
u8 msk;
u8 value;
};
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, struct wl_pwr_cfg pwrcfgCmd[]);
#endif

26
drivers/staging/rtl8188eu/include/recv_osdep.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RECV_OSDEP_H_
#define __RECV_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void _rtw_free_recv_priv(struct recv_priv *precvpriv);
s32 rtw_recv_entry(struct recv_frame *precv_frame);
int rtw_recv_indicatepkt(struct adapter *adapter,
struct recv_frame *recv_frame);
void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup);
int rtw_os_recvbuf_resource_alloc(struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
#endif /* */

12
drivers/staging/rtl8188eu/include/rf.h
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/* SPDX-License-Identifier: GPL-2.0 */
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth);
void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
u8 *powerlevel);
void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
u8 *powerlevel_ofdm,
u8 *powerlevel_bw20,
u8 *powerlevel_bw40, u8 channel);

70
drivers/staging/rtl8188eu/include/rtl8188e_cmd.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTL8188E_CMD_H__
#define __RTL8188E_CMD_H__
enum RTL8188E_H2C_CMD_ID {
/* Class Common */
H2C_COM_RSVD_PAGE = 0x00,
H2C_COM_MEDIA_STATUS_RPT = 0x01,
H2C_COM_SCAN = 0x02,
H2C_COM_KEEP_ALIVE = 0x03,
H2C_COM_DISCNT_DECISION = 0x04,
H2C_COM_INIT_OFFLOAD = 0x06,
H2C_COM_REMOTE_WAKE_CTL = 0x07,
H2C_COM_AP_OFFLOAD = 0x08,
H2C_COM_BCN_RSVD_PAGE = 0x09,
H2C_COM_PROB_RSP_RSVD_PAGE = 0x0A,
/* Class PS */
H2C_PS_PWR_MODE = 0x20,
H2C_PS_TUNE_PARA = 0x21,
H2C_PS_TUNE_PARA_2 = 0x22,
H2C_PS_LPS_PARA = 0x23,
H2C_PS_P2P_OFFLOAD = 0x24,
/* Class DM */
H2C_DM_MACID_CFG = 0x40,
H2C_DM_TXBF = 0x41,
/* Class BT */
H2C_BT_COEX_MASK = 0x60,
H2C_BT_COEX_GPIO_MODE = 0x61,
H2C_BT_DAC_SWING_VAL = 0x62,
H2C_BT_PSD_RST = 0x63,
/* Class */
H2C_RESET_TSF = 0xc0,
};
enum {
PWRS
};
struct setpwrmode_parm {
u8 Mode;/* 0:Active,1:LPS,2:WMMPS */
u8 SmartPS_RLBM;/* LPS= 0:PS_Poll,1:PS_Poll,2:NullData,WMM= 0:PS_Poll,1:NullData */
u8 AwakeInterval; /* unit: beacon interval */
u8 bAllQueueUAPSD;
u8 PwrState;/* AllON(0x0c),RFON(0x04),RFOFF(0x00) */
};
struct rsvdpage_loc {
u8 LocProbeRsp;
u8 LocPsPoll;
u8 LocNullData;
u8 LocQosNull;
u8 LocBTQosNull;
};
/* host message to firmware cmd */
void rtl8188e_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus);
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt);
#endif/* __RTL8188E_CMD_H__ */

40
drivers/staging/rtl8188eu/include/rtl8188e_dm.h
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@ -1,40 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTL8188E_DM_H__
#define __RTL8188E_DM_H__
enum{
UP_LINK,
DOWN_LINK,
};
struct dm_priv {
u8 DM_Type;
u8 DMFlag;
u8 InitDMFlag;
u32 InitODMFlag;
/* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
int LastMinUndecoratedPWDBForDM;
/* for High Power */
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;/* Tx Power Control for Near/Far Range */
u8 PowerIndex_backup[6];
};
void rtl8188e_InitHalDm(struct adapter *adapt);
void AntDivCompare8188E(struct adapter *adapt, struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
#endif

319
drivers/staging/rtl8188eu/include/rtl8188e_hal.h
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@ -1,319 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTL8188E_HAL_H__
#define __RTL8188E_HAL_H__
/* include HAL Related header after HAL Related compiling flags */
#include "rtl8188e_spec.h"
#include "hal8188e_phy_reg.h"
#include "hal8188e_phy_cfg.h"
#include "rtl8188e_dm.h"
#include "rtl8188e_recv.h"
#include "rtl8188e_xmit.h"
#include "rtl8188e_cmd.h"
#include "pwrseq.h"
#include "rtw_efuse.h"
#include "rtw_sreset.h"
#include "odm_precomp.h"
/* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */
#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
#define DRVINFO_SZ 4 /* unit is 8bytes */
#define PageNum_128(_Len) (u32)(((_Len) >> 7) + ((_Len) & 0x7F ? 1 : 0))
/* download firmware related data structure */
#define FW_8188E_SIZE 0x4000 /* 16384,16k */
#define FW_8188E_START_ADDRESS 0x1000
#define FW_8188E_END_ADDRESS 0x1FFF /* 0x5FFF */
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
#define IS_FW_HEADER_EXIST(_pFwHdr) \
((le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x92C0 || \
(le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x88C0 || \
(le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x2300 || \
(le16_to_cpu(_pFwHdr->signature) & 0xFFF0) == 0x88E0)
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
enum usb_rx_agg_mode {
USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA,
USB_RX_AGG_USB,
USB_RX_AGG_MIX
};
#define MAX_RX_DMA_BUFFER_SIZE_88E \
0x2400 /* 9k for 88E nornal chip , MaxRxBuff=10k-max(TxReportSize(64*8),
* WOLPattern(16*24))
*/
#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */
/* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */
#define MAX_TX_QUEUE 9
#define TX_SELE_HQ BIT(0) /* High Queue */
#define TX_SELE_LQ BIT(1) /* Low Queue */
#define TX_SELE_NQ BIT(2) /* Normal Queue */
/* Note: We will divide number of page equally for each queue other
* than public queue!
*/
/* 22k = 22528 bytes = 176 pages (@page = 128 bytes) */
/* must reserved about 7 pages for LPS => 176-7 = 169 (0xA9) */
/* 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS
* null-data
*/
#define TX_TOTAL_PAGE_NUMBER_88E 0xA9/* 169 (21632=> 21k) */
#define TX_PAGE_BOUNDARY_88E (TX_TOTAL_PAGE_NUMBER_88E + 1)
/* Note: For Normal Chip Setting ,modify later */
#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER \
TX_TOTAL_PAGE_NUMBER_88E /* 0xA9 , 0xb0=>176=>22k */
#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E \
(WMM_NORMAL_TX_TOTAL_PAGE_NUMBER + 1) /* 0xA9 */
/* Chip specific */
#define CHIP_BONDING_IDENTIFIER(_value) (((_value) >> 22) & 0x3)
#define CHIP_BONDING_92C_1T2R 0x1
#define CHIP_BONDING_88C_USB_MCARD 0x2
#define CHIP_BONDING_88C_USB_HP 0x1
#include "HalVerDef.h"
#include "hal_com.h"
/* Channel Plan */
enum ChannelPlan {
CHPL_FCC = 0,
CHPL_IC = 1,
CHPL_ETSI = 2,
CHPL_SPA = 3,
CHPL_FRANCE = 4,
CHPL_MKK = 5,
CHPL_MKK1 = 6,
CHPL_ISRAEL = 7,
CHPL_TELEC = 8,
CHPL_GLOBAL = 9,
CHPL_WORLD = 10,
};
struct txpowerinfo24g {
u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
/* If only one tx, only BW20 and OFDM are used. */
s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
};
#define EFUSE_REAL_CONTENT_LEN 512
#define EFUSE_MAX_SECTION 16
#define EFUSE_IC_ID_OFFSET 506 /* For some inferior IC purpose*/
#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN)
/* To prevent out of boundary programming case, */
/* leave 1byte and program full section */
/* 9bytes + 1byt + 5bytes and pre 1byte. */
/* For worst case: */
/* | 1byte|----8bytes----|1byte|--5bytes--| */
/* | | Reserved(14bytes) | */
/* PG data exclude header, dummy 6 bytes from CP test and reserved 1byte. */
#define EFUSE_OOB_PROTECT_BYTES 15
#define HWSET_MAX_SIZE_88E 512
#define EFUSE_REAL_CONTENT_LEN_88E 256
#define EFUSE_MAP_LEN_88E 512
#define EFUSE_MAP_LEN EFUSE_MAP_LEN_88E
#define EFUSE_MAX_SECTION_88E 64
#define EFUSE_MAX_WORD_UNIT_88E 4
#define EFUSE_IC_ID_OFFSET_88E 506
#define AVAILABLE_EFUSE_ADDR_88E(addr) \
(addr < EFUSE_REAL_CONTENT_LEN_88E)
/* To prevent out of boundary programming case, leave 1byte and program
* full section
*/
/* 9bytes + 1byt + 5bytes and pre 1byte. */
/* For worst case: */
/* | 2byte|----8bytes----|1byte|--7bytes--| 92D */
/* PG data exclude header, dummy 7 bytes from CP test and reserved 1byte. */
#define EFUSE_OOB_PROTECT_BYTES_88E 18
#define EFUSE_PROTECT_BYTES_BANK_88E 16
/* EFUSE for BT definition */
#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */
#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */
#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */
#define EFUSE_PROTECT_BYTES_BANK 16
struct hal_data_8188e {
struct HAL_VERSION VersionID;
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u16 FirmwareSignature;
u8 PGMaxGroup;
/* current WIFI_PHY values */
u32 ReceiveConfig;
enum wireless_mode CurrentWirelessMode;
enum ht_channel_width CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
u16 BasicRateSet;
u8 BoardType;
/* EEPROM setting. */
u16 EEPROMVID;
u16 EEPROMPID;
u16 EEPROMSVID;
u16 EEPROMSDID;
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
u8 EEPROMVersion;
u8 EEPROMRegulatory;
u8 bTXPowerDataReadFromEEPORM;
u8 EEPROMThermalMeter;
u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
/* If only one tx, only BW20 and OFDM are used. */
s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For HT 40MHZ pwr */
u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For HT 40MHZ pwr */
u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* HT 20<->40 Pwr diff */
u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For HT<->legacy pwr diff */
u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* For power group */
u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
/* Read/write are allow for following hardware information variables */
u8 framesync;
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u8 CrystalCap;
u32 AcParam_BE; /* Original parameter for BE, use for EDCA turbo. */
struct bb_reg_def PHYRegDef[4]; /* Radio A/B/C/D */
u32 RfRegChnlVal[2];
/* RDG enable */
bool bRDGEnable;
/* for host message to fw */
u8 LastHMEBoxNum;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
u8 RegCR_1;
struct dm_priv dmpriv;
struct odm_dm_struct odmpriv;
struct sreset_priv srestpriv;
u8 CurAntenna;
u8 AntDivCfg;
u8 TRxAntDivType;
u8 bDumpRxPkt;/* for debug */
u8 bDumpTxPkt;/* for debug */
/* Add for dual MAC 0--Mac0 1--Mac1 */
u32 interfaceIndex;
u8 OutEpQueueSel;
u8 OutEpNumber;
u16 EfuseUsedBytes;
/* Auto FSM to Turn On, include clock, isolation, power control
* for MAC only
*/
u8 bMacPwrCtrlOn;
u32 UsbBulkOutSize;
/* Interrupt relatd register information. */
u32 IntArray[3];/* HISR0,HISR1,HSISR */
u8 C2hArray[16];
u8 UsbTxAggMode;
u8 UsbTxAggDescNum;
enum usb_rx_agg_mode UsbRxAggMode;
u8 UsbRxAggBlockCount; /* USB Block count. Block size is
* 512-byte in high speed and 64-byte
* in full speed
*/
u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; /* 8192C DMA page count */
u8 UsbRxAggPageTimeout;
};
void Hal_GetChnlGroup88E(u8 chnl, u8 *group);
/* rtl8188e_hal_init.c */
void _8051Reset88E(struct adapter *padapter);
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter);
s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy);
/* EFuse */
void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo);
void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent,
bool AutoLoadFail);
void Hal_ReadThermalMeter_88E(struct adapter *dapter, u8 *PROMContent,
bool AutoloadFail);
void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
/* register */
void rtl8188e_start_thread(struct adapter *padapter);
void rtl8188e_stop_thread(struct adapter *padapter);
s32 iol_execute(struct adapter *padapter, u8 control);
void iol_mode_enable(struct adapter *padapter, u8 enable);
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
#endif /* __RTL8188E_HAL_H__ */

53
drivers/staging/rtl8188eu/include/rtl8188e_recv.h
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@ -1,53 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTL8188E_RECV_H__
#define __RTL8188E_RECV_H__
#define TX_RPT1_PKT_LEN 8
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#define RECV_BULK_IN_ADDR 0x80
#define RECV_INT_IN_ADDR 0x81
#define NR_PREALLOC_RECV_SKB (8)
#define NR_RECVBUFF (4)
#define MAX_RECVBUF_SZ (15360) /* 15k < 16k */
struct phy_stat {
unsigned int phydw0;
unsigned int phydw1;
unsigned int phydw2;
unsigned int phydw3;
unsigned int phydw4;
unsigned int phydw5;
unsigned int phydw6;
unsigned int phydw7;
};
/* Rx smooth factor */
#define Rx_Smooth_Factor (20)
enum rx_packet_type {
NORMAL_RX,/* Normal rx packet */
TX_REPORT1,/* CCX */
TX_REPORT2,/* TX RPT */
HIS_REPORT,/* USB HISR RPT */
};
#define INTERRUPT_MSG_FORMAT_LEN 60
void rtl8188eu_recv_tasklet(struct tasklet_struct *t);
void rtl8188e_process_phy_info(struct adapter *padapter,
struct recv_frame *prframe);
void update_recvframe_phyinfo_88e(struct recv_frame *fra, struct phy_stat *phy);
void update_recvframe_attrib_88e(struct recv_frame *fra,
struct recv_stat *stat);
#endif

1116
drivers/staging/rtl8188eu/include/rtl8188e_spec.h
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157
drivers/staging/rtl8188eu/include/rtl8188e_xmit.h
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@ -1,157 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTL8188E_XMIT_H__
#define __RTL8188E_XMIT_H__
#define MAX_TX_AGG_PACKET_NUMBER 0xFF
/* */
/* Queue Select Value in TxDesc */
/* */
#define QSLT_BK 0x2/* 0x01 */
#define QSLT_BE 0x0
#define QSLT_VI 0x5/* 0x4 */
#define QSLT_VO 0x7/* 0x6 */
#define QSLT_BEACON 0x10
#define QSLT_HIGH 0x11
#define QSLT_MGNT 0x12
#define QSLT_CMD 0x13
/* For 88e early mode */
#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
#define SET_EARLYMODE_LEN0(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
#define SET_EARLYMODE_LEN1(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr + 4, 0, 8, __Value)
#define SET_EARLYMODE_LEN3(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr + 4, 8, 12, __Value)
#define SET_EARLYMODE_LEN4(__pAddr, __Value) \
SET_BITS_TO_LE_4BYTE(__pAddr + 4, 20, 12, __Value)
/* */
/* defined for TX DESC Operation */
/* */
#define MAX_TID (15)
/* OFFSET 0 */
#define OFFSET_SZ 0
#define OFFSET_SHT 16
#define BMC BIT(24)
#define LSG BIT(26)
#define FSG BIT(27)
#define OWN BIT(31)
/* OFFSET 4 */
#define PKT_OFFSET_SZ 0
#define QSEL_SHT 8
#define RATE_ID_SHT 16
#define NAVUSEHDR BIT(20)
#define SEC_TYPE_SHT 22
#define PKT_OFFSET_SHT 26
/* OFFSET 8 */
#define AGG_EN BIT(12)
#define AGG_BK BIT(16)
#define AMPDU_DENSITY_SHT 20
#define ANTSEL_A BIT(24)
#define ANTSEL_B BIT(25)
#define TX_ANT_CCK_SHT 26
#define TX_ANTL_SHT 28
#define TX_ANT_HT_SHT 30
/* OFFSET 12 */
#define SEQ_SHT 16
#define EN_HWSEQ BIT(31)
/* OFFSET 16 */
#define QOS BIT(6)
#define HW_SSN BIT(7)
#define USERATE BIT(8)
#define DISDATAFB BIT(10)
#define CTS_2_SELF BIT(11)
#define RTS_EN BIT(12)
#define HW_RTS_EN BIT(13)
#define DATA_SHORT BIT(24)
#define PWR_STATUS_SHT 15
#define DATA_SC_SHT 20
#define DATA_BW BIT(25)
/* OFFSET 20 */
#define RTY_LMT_EN BIT(17)
enum TXDESC_SC {
SC_DONT_CARE = 0x00,
SC_UPPER = 0x01,
SC_LOWER = 0x02,
SC_DUPLICATE = 0x03
};
/* OFFSET 20 */
#define SGI BIT(6)
#define USB_TXAGG_NUM_SHT 24
#define txdesc_set_ccx_sw_88e(txdesc, value) \
do { \
((struct txdesc_88e *)(txdesc))->sw1 = (((value) >> 8) & 0x0f); \
((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \
} while (0)
struct txrpt_ccx_88e {
/* offset 0 */
u8 tag1:1;
u8 pkt_num:3;
u8 txdma_underflow:1;
u8 int_bt:1;
u8 int_tri:1;
u8 int_ccx:1;
/* offset 1 */
u8 mac_id:6;
u8 pkt_ok:1;
u8 bmc:1;
/* offset 2 */
u8 retry_cnt:6;
u8 lifetime_over:1;
u8 retry_over:1;
/* offset 3 */
u8 ccx_qtime0;
u8 ccx_qtime1;
/* offset 5 */
u8 final_data_rate;
/* offset 6 */
u8 sw1:4;
u8 qsel:4;
/* offset 7 */
u8 sw0;
};
#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1 << 8))
#define txrpt_ccx_qtime_88e(txrpt_ccx) \
((txrpt_ccx)->ccx_qtime0 + ((txrpt_ccx)->ccx_qtime1 << 8))
void rtl8188e_fill_fake_txdesc(struct adapter *padapter, u8 *pDesc,
u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull);
s32 rtl8188eu_init_xmit_priv(struct adapter *padapter);
s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter);
#define hal_xmit_handler rtl8188eu_xmit_buf_handler
void rtl8188eu_xmit_tasklet(struct tasklet_struct *t);
bool rtl8188eu_xmitframe_complete(struct adapter *padapter,
struct xmit_priv *pxmitpriv);
void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf);
#endif /* __RTL8188E_XMIT_H__ */

50
drivers/staging/rtl8188eu/include/rtw_android.h
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@ -1,50 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_ANDROID_H__
#define __RTW_ANDROID_H__
#include <linux/module.h>
#include <linux/netdevice.h>
enum ANDROID_WIFI_CMD {
ANDROID_WIFI_CMD_START,
ANDROID_WIFI_CMD_STOP,
ANDROID_WIFI_CMD_SCAN_ACTIVE,
ANDROID_WIFI_CMD_SCAN_PASSIVE,
ANDROID_WIFI_CMD_RSSI,
ANDROID_WIFI_CMD_LINKSPEED,
ANDROID_WIFI_CMD_RXFILTER_START,
ANDROID_WIFI_CMD_RXFILTER_STOP,
ANDROID_WIFI_CMD_RXFILTER_ADD,
ANDROID_WIFI_CMD_RXFILTER_REMOVE,
ANDROID_WIFI_CMD_BTCOEXSCAN_START,
ANDROID_WIFI_CMD_BTCOEXSCAN_STOP,
ANDROID_WIFI_CMD_BTCOEXMODE,
ANDROID_WIFI_CMD_SETSUSPENDOPT,
ANDROID_WIFI_CMD_P2P_DEV_ADDR,
ANDROID_WIFI_CMD_SETFWPATH,
ANDROID_WIFI_CMD_SETBAND,
ANDROID_WIFI_CMD_GETBAND,
ANDROID_WIFI_CMD_COUNTRY,
ANDROID_WIFI_CMD_P2P_SET_NOA,
ANDROID_WIFI_CMD_P2P_GET_NOA,
ANDROID_WIFI_CMD_P2P_SET_PS,
ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE,
ANDROID_WIFI_CMD_MACADDR,
ANDROID_WIFI_CMD_BLOCK,
ANDROID_WIFI_CMD_WFD_ENABLE,
ANDROID_WIFI_CMD_WFD_DISABLE,
ANDROID_WIFI_CMD_WFD_SET_TCPPORT,
ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT,
ANDROID_WIFI_CMD_WFD_SET_DEVTYPE,
ANDROID_WIFI_CMD_MAX
};
int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd);
#endif /* __RTW_ANDROID_H__ */

45
drivers/staging/rtl8188eu/include/rtw_ap.h
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@ -1,45 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_AP_H_
#define __RTW_AP_H_
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_88EU_AP_MODE
/* external function */
void rtw_indicate_sta_assoc_event(struct adapter *padapter,
struct sta_info *psta);
void rtw_indicate_sta_disassoc_event(struct adapter *padapter,
struct sta_info *psta);
void init_mlme_ap_info(struct adapter *padapter);
void free_mlme_ap_info(struct adapter *padapter);
void update_beacon(struct adapter *padapter, u8 ie_id,
u8 *oui, u8 tx);
void add_RATid(struct adapter *padapter, struct sta_info *psta,
u8 rssi_level);
void expire_timeout_chk(struct adapter *padapter);
void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta);
int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len);
void rtw_set_macaddr_acl(struct adapter *padapter, int mode);
int rtw_acl_add_sta(struct adapter *padapter, u8 *addr);
int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr);
void associated_clients_update(struct adapter *padapter, u8 updated);
void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta);
u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta);
void sta_info_update(struct adapter *padapter, struct sta_info *psta);
void ap_sta_info_defer_update(struct adapter *padapter, struct sta_info *psta);
u8 ap_free_sta(struct adapter *padapter, struct sta_info *psta,
bool active, u16 reason);
int rtw_sta_flush(struct adapter *padapter);
void start_ap_mode(struct adapter *padapter);
void stop_ap_mode(struct adapter *padapter);
#endif /* end of CONFIG_88EU_AP_MODE */
#endif

361
drivers/staging/rtl8188eu/include/rtw_cmd.h
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@ -1,361 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_CMD_H_
#define __RTW_CMD_H_
#include <wlan_bssdef.h>
#include <rtw_rf.h>
#include <rtw_led.h>
#include <osdep_service.h>
#include <ieee80211.h> /* <ieee80211/ieee80211.h> */
#define MAX_CMDSZ 1024
#define MAX_RSPSZ 512
#define CMDBUFF_ALIGN_SZ 512
struct cmd_obj {
struct adapter *padapter;
u16 cmdcode;
u8 res;
u8 *parmbuf;
u32 cmdsz;
u8 *rsp;
u32 rspsz;
struct list_head list;
};
struct cmd_priv {
struct completion cmd_queue_comp;
struct __queue cmd_queue;
};
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
do {\
INIT_LIST_HEAD(&pcmd->list);\
pcmd->cmdcode = code;\
pcmd->parmbuf = (u8 *)(pparm);\
pcmd->cmdsz = sizeof(*pparm);\
pcmd->rsp = NULL;\
pcmd->rspsz = 0;\
} while (0)
u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj);
struct cmd_obj *rtw_dequeue_cmd(struct __queue *queue);
void rtw_free_cmd_obj(struct cmd_obj *pcmd);
int rtw_cmd_thread(void *context);
void rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
enum rtw_drvextra_cmd_id {
NONE_WK_CID,
DYNAMIC_CHK_WK_CID,
DM_CTRL_WK_CID,
PBC_POLLING_WK_CID,
POWER_SAVING_CTRL_WK_CID,/* IPS,AUTOSuspend */
LPS_CTRL_WK_CID,
ANT_SELECT_WK_CID,
P2P_PS_WK_CID,
P2P_PROTO_WK_CID,
CHECK_HIQ_WK_CID,/* for softap mode, check hi queue if empty */
INTEl_WIDI_WK_CID,
C2H_WK_CID,
RTP_TIMER_CFG_WK_CID,
MAX_WK_CID
};
enum LPS_CTRL_TYPE {
LPS_CTRL_SCAN = 0,
LPS_CTRL_JOINBSS = 1,
LPS_CTRL_CONNECT = 2,
LPS_CTRL_DISCONNECT = 3,
LPS_CTRL_SPECIAL_PACKET = 4,
LPS_CTRL_LEAVE = 5,
};
enum RFINTFS {
SWSI,
HWSI,
HWPI,
};
/*
* Caller Mode: Infra, Ad-HoC(C)
*
* Notes: To disconnect the current associated BSS
*
* Command Mode
*
*/
struct disconnect_parm {
u32 deauth_timeout_ms;
};
struct setopmode_parm {
u8 mode;
u8 rsvd[3];
};
/*
* Caller Mode: AP, Ad-HoC, Infra
*
* Notes: To ask RTL8711 performing site-survey
*
* Command-Event Mode
*
*/
#define RTW_SSID_SCAN_AMOUNT 9 /* for WEXT_CSCAN_AMOUNT 9 */
#define RTW_CHANNEL_SCAN_AMOUNT (14 + 37)
struct sitesurvey_parm {
int scan_mode; /* active: 1, passive: 0 */
u8 ssid_num;
u8 ch_num;
struct ndis_802_11_ssid ssid[RTW_SSID_SCAN_AMOUNT];
struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT];
};
/*
* Caller Mode: Any
*
* Notes: To set the auth type of RTL8711. open/shared/802.1x
*
* Command Mode
*
*/
struct setauth_parm {
u8 mode; /* 0: legacy open, 1: legacy shared 2: 802.1x */
u8 _1x; /* 0: PSK, 1: TLS */
u8 rsvd[2];
};
/*
* Caller Mode: Infra
*
* a. algorithm: wep40, wep104, tkip & aes
* b. keytype: grp key/unicast key
* c. key contents
*
* when shared key ==> keyid is the camid
* when 802.1x ==> keyid [0:1] ==> grp key
* when 802.1x ==> keyid > 2 ==> unicast key
*
*/
struct setkey_parm {
u8 algorithm; /* could be none, wep40, TKIP, CCMP, wep104 */
u8 keyid;
u8 grpkey; /* 1: this is the grpkey for 802.1x.
* 0: this is the unicast key for 802.1x
*/
u8 set_tx; /* 1: main tx key for wep. 0: other key. */
u8 key[16]; /* this could be 40 or 104 */
};
/*
* When in AP or Ad-Hoc mode, this is used to
* allocate an sw/hw entry for a newly associated sta.
*
* Command
*
* when shared key ==> algorithm/keyid
*
*/
struct set_stakey_parm {
u8 addr[ETH_ALEN];
u8 algorithm;
u8 id;/* currently for erasing cam entry if
* algorithm == _NO_PRIVACY_
*/
u8 key[16];
};
struct set_stakey_rsp {
u8 addr[ETH_ALEN];
u8 keyid;
u8 rsvd;
};
/*
* Caller Ad-Hoc/AP
*
* Command -Rsp(AID == CAMID) mode
*
* This is to force fw to add an sta_data entry per driver's request.
*
* FW will write an cam entry associated with it.
*
*/
struct set_assocsta_parm {
u8 addr[ETH_ALEN];
};
struct set_assocsta_rsp {
u8 cam_id;
u8 rsvd[3];
};
/*
* Notes: This command is used for H2C/C2H loopback testing
*
* mac[0] == 0
* ==> CMD mode, return H2C_SUCCESS.
* The following condition must be true under CMD mode
* mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0;
* s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7;
* s2 == (b1 << 8 | b0);
*
* mac[0] == 1
* ==> CMD_RSP mode, return H2C_SUCCESS_RSP
*
* The rsp layout shall be:
* rsp: parm:
* mac[0] = mac[5];
* mac[1] = mac[4];
* mac[2] = mac[3];
* mac[3] = mac[2];
* mac[4] = mac[1];
* mac[5] = mac[0];
* s0 = s1;
* s1 = swap16(s0);
* w0 = swap32(w1);
* b0 = b1
* s2 = s0 + s1
* b1 = b0
* w1 = w0
*
* mac[0] == 2
* ==> CMD_EVENT mode, return H2C_SUCCESS
* The event layout shall be:
* event: parm:
* mac[0] = mac[5];
* mac[1] = mac[4];
* mac[2] = event's seq no, starting from 1 to parm's marc[3]
* mac[2] = event's seq no, starting from 1 to parm's marc[3]
* mac[2] = event's seq no, starting from 1 to parm's marc[3]
* mac[3] = mac[2];
* mac[4] = mac[1];
* mac[5] = mac[0];
* s0 = swap16(s0) - event.mac[2];
* s1 = s1 + event.mac[2];
* w0 = swap32(w0);
* b0 = b1
* s2 = s0 + event.mac[2]
* b1 = b0
* w1 = swap32(w1) - event.mac[2];
*
* parm->mac[3] is the total event counts that host requested.
* event will be the same with the cmd's param.
*/
/* CMD param Format for driver extra cmd handler */
struct drvextra_cmd_parm {
int ec_id; /* extra cmd id */
int type_size; /* Can use this field as the type id or command size */
unsigned char *pbuf;
};
struct addBaReq_parm {
unsigned int tid;
u8 addr[ETH_ALEN];
};
/*H2C Handler index: 46 */
struct set_ch_parm {
u8 ch;
u8 bw;
u8 ch_offset;
};
/*H2C Handler index: 59 */
struct SetChannelPlan_param {
u8 channel_plan;
};
/*
*
* Result:
* 0x00: success
* 0x01: success, and check Response.
* 0x02: cmd ignored due to duplicated sequcne number
* 0x03: cmd dropped due to invalid cmd code
* 0x04: reserved.
*
*/
#define H2C_SUCCESS 0x00
#define H2C_SUCCESS_RSP 0x01
#define H2C_DROPPED 0x03
#define H2C_PARAMETERS_ERROR 0x04
#define H2C_REJECTED 0x05
u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid,
int ssid_num, struct rtw_ieee80211_channel *ch,
int ch_num);
u8 rtw_createbss_cmd(struct adapter *padapter);
u8 rtw_setstakey_cmd(struct adapter *padapter, u8 *psta, u8 unicast_key);
u8 rtw_clearstakey_cmd(struct adapter *padapter, u8 *psta, u8 entry,
u8 enqueue);
u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork);
u8 rtw_disassoc_cmd(struct adapter *padapter, u32 deauth_timeout_ms,
bool enqueue);
u8 rtw_setopmode_cmd(struct adapter *padapter,
enum ndis_802_11_network_infra networktype);
u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr);
u8 rtw_dynamic_chk_wk_cmd(struct adapter *adapter);
u8 rtw_lps_ctrl_wk_cmd(struct adapter *padapter, u8 lps_ctrl_type, u8 enqueue);
u8 rtw_rpt_timer_cfg_cmd(struct adapter *padapter, u16 minRptTime);
u8 rtw_antenna_select_cmd(struct adapter *padapter, u8 antenna, u8 enqueue);
u8 rtw_ps_cmd(struct adapter *padapter);
#ifdef CONFIG_88EU_AP_MODE
u8 rtw_chk_hi_queue_cmd(struct adapter *padapter);
#endif
u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue);
u8 rtw_drvextra_cmd_hdl(struct adapter *padapter, unsigned char *pbuf);
void rtw_survey_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_disassoc_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_joinbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_createbss_cmd_callback(struct adapter *adapt, struct cmd_obj *pcmd);
void rtw_readtssi_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_setstaKey_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_setassocsta_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cm);
void rtw_getrttbl_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
struct _cmd_callback {
u32 cmd_code;
void (*callback)(struct adapter *padapter, struct cmd_obj *cmd);
};
enum rtw_h2c_cmd {
_JoinBss_CMD_,
_DisConnect_CMD_,
_CreateBss_CMD_,
_SetOpMode_CMD_,
_SiteSurvey_CMD_,
_SetAuth_CMD_,
_SetKey_CMD_,
_SetStaKey_CMD_,
_SetAssocSta_CMD_,
_AddBAReq_CMD_,
_SetChannel_CMD_,
_TX_Beacon_CMD_,
_Set_MLME_EVT_CMD_,
_Set_Drv_Extra_CMD_,
_SetChannelPlan_CMD_,
MAX_H2CCMD
};
#endif /* _CMD_H_ */

114
drivers/staging/rtl8188eu/include/rtw_eeprom.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_EEPROM_H__
#define __RTW_EEPROM_H__
#include <osdep_service.h>
#include <drv_types.h>
#define RTL8712_EEPROM_ID 0x8712
#define HWSET_MAX_SIZE_512 512
#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512
#define CLOCK_RATE 50 /* 100us */
/* EEPROM opcodes */
#define EEPROM_READ_OPCODE 06
#define EEPROM_WRITE_OPCODE 05
#define EEPROM_ERASE_OPCODE 07
#define EEPROM_EWEN_OPCODE 19 /* Erase/write enable */
#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_ALPHA 0x1
#define EEPROM_CID_Senao 0x3
#define EEPROM_CID_NetCore 0x5
#define EEPROM_CID_CAMEO 0X8
#define EEPROM_CID_SITECOM 0x9
#define EEPROM_CID_COREGA 0xB
#define EEPROM_CID_EDIMAX_BELK 0xC
#define EEPROM_CID_SERCOMM_BELK 0xE
#define EEPROM_CID_CAMEO1 0xF
#define EEPROM_CID_WNC_COREGA 0x12
#define EEPROM_CID_CLEVO 0x13
#define EEPROM_CID_WHQL 0xFE
/* Customer ID, note that: */
/* This variable is initiailzed through EEPROM or registry, */
/* however, its definition may be different with that in EEPROM for */
/* EEPROM size consideration. So, we have to perform proper translation
* between them.
*/
/* Besides, CustomerID of registry has precedence of that of EEPROM. */
/* defined below. 060703, by rcnjko. */
enum RT_CUSTOMER_ID {
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
RT_CID_8187_SERCOMM_PS = 2,
RT_CID_8187_HW_LED = 3,
RT_CID_8187_NETGEAR = 4,
RT_CID_WHQL = 5,
RT_CID_819x_CAMEO = 6,
RT_CID_819x_RUNTOP = 7,
RT_CID_819x_Senao = 8,
RT_CID_TOSHIBA = 9, /* Merge by Jacken, 2008/01/31. */
RT_CID_819x_Netcore = 10,
RT_CID_Nettronix = 11,
RT_CID_DLINK = 12,
RT_CID_PRONET = 13,
RT_CID_COREGA = 14,
RT_CID_CHINA_MOBILE = 15,
RT_CID_819x_ALPHA = 16,
RT_CID_819x_Sitecom = 17,
RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded
* for CCX functions, but for test behavior like retry
* limit and tx report. By Bruce, 2009-02-17.
*/
RT_CID_819x_Lenovo = 19,
RT_CID_819x_QMI = 20,
RT_CID_819x_Edimax_Belkin = 21,
RT_CID_819x_Sercomm_Belkin = 22,
RT_CID_819x_CAMEO1 = 23,
RT_CID_819x_MSI = 24,
RT_CID_819x_Acer = 25,
RT_CID_819x_AzWave_ASUS = 26,
RT_CID_819x_AzWave = 27, /* For AzWave in PCIe,i
* The ID is AzWave use and not only Asus
*/
RT_CID_819x_HP = 28,
RT_CID_819x_WNC_COREGA = 29,
RT_CID_819x_Arcadyan_Belkin = 30,
RT_CID_819x_SAMSUNG = 31,
RT_CID_819x_CLEVO = 32,
RT_CID_819x_DELL = 33,
RT_CID_819x_PRONETS = 34,
RT_CID_819x_Edimax_ASUS = 35,
RT_CID_819x_CAMEO_NETGEAR = 36,
RT_CID_PLANEX = 37,
RT_CID_CC_C = 38,
RT_CID_819x_Xavi = 39,
RT_CID_819x_FUNAI_TV = 40,
RT_CID_819x_ALPHA_WD = 41,
};
struct eeprom_priv {
u8 bautoload_fail_flag;
u8 bloadfile_fail_flag;
u8 bloadmac_fail_flag;
u8 mac_addr[6]; /* PermanentAddress */
u16 channel_plan;
u8 EepromOrEfuse;
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512];
};
#endif /* __RTL871X_EEPROM_H__ */

67
drivers/staging/rtl8188eu/include/rtw_efuse.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_EFUSE_H__
#define __RTW_EFUSE_H__
#include <osdep_service.h>
#define EFUSE_ERROE_HANDLE 1
#define PG_STATE_HEADER 0x01
#define PG_STATE_WORD_0 0x02
#define PG_STATE_WORD_1 0x04
#define PG_STATE_WORD_2 0x08
#define PG_STATE_WORD_3 0x10
#define PG_STATE_DATA 0x20
#define PG_SWBYTE_H 0x01
#define PG_SWBYTE_L 0x02
#define PGPKT_DATA_SIZE 8
/* E-Fuse */
#define EFUSE_MAP_SIZE 512
#define EFUSE_MAX_SIZE 256
/* end of E-Fuse */
#define EFUSE_MAX_MAP_LEN 512
#define EFUSE_MAX_HW_SIZE 512
#define EFUSE_MAX_SECTION_BASE 16
#define EXT_HEADER(header) ((header & 0x1F) == 0x0F)
#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F)
#define GET_HDR_OFFSET_2_0(header) ((header & 0xE0) >> 5)
#define EFUSE_REPEAT_THRESHOLD_ 3
/* The following is for BT Efuse definition */
#define EFUSE_BT_MAX_MAP_LEN 1024
#define EFUSE_MAX_BANK 4
#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK - 1)
/*--------------------------Define Parameters-------------------------------*/
#define EFUSE_MAX_WORD_UNIT 4
/*------------------------------Define structure----------------------------*/
struct pgpkt {
u8 offset;
u8 word_en;
u8 data[8];
u8 word_cnts;
};
u8 Efuse_CalculateWordCnts(u8 word_en);
u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data);
u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data);
int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data);
bool Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data);
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
u8 Efuse_WordEnableDataWrite(struct adapter *adapter, u16 efuse_addr,
u8 word_en, u8 *data);
void EFUSE_ShadowMapUpdate(struct adapter *adapter);
#endif

81
drivers/staging/rtl8188eu/include/rtw_event.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _RTW_EVENT_H_
#define _RTW_EVENT_H_
#include <osdep_service.h>
#include <wlan_bssdef.h>
#include <linux/mutex.h>
#include <linux/sem.h>
/*
* Used to report a bss has been scanned
*/
struct survey_event {
struct wlan_bssid_ex bss;
};
/*
* Used to report that the requested site survey has been done.
*
* bss_cnt indicates the number of bss that has been reported.
*
*
*/
struct surveydone_event {
unsigned int bss_cnt;
};
/*
* Used to report the link result of joinning the given bss
*
*
* join_res:
* -1: authentication fail
* -2: association fail
* > 0: TID
*
*/
struct joinbss_event {
struct wlan_network network;
};
/*
* Used to report a given STA has joinned the created BSS.
* It is used in AP/Ad-HoC(M) mode.
*/
struct stassoc_event {
unsigned char macaddr[6];
unsigned char rsvd[2];
int cam_id;
};
struct stadel_event {
unsigned char macaddr[6];
unsigned char rsvd[2]; /* for reason */
int mac_id;
};
struct fwevent {
u32 parmsize;
void (*event_callback)(struct adapter *dev, u8 *pbuf);
};
#define C2HEVENT_SZ 32
#define NETWORK_QUEUE_SZ 4
struct network_queue {
int head;
int tail;
struct wlan_bssid_ex networks[NETWORK_QUEUE_SZ];
};
#endif /* _WLANEVENT_H_ */

26
drivers/staging/rtl8188eu/include/rtw_ht.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _RTW_HT_H_
#define _RTW_HT_H_
#include <linux/ieee80211.h>
struct ht_priv {
u32 ht_option;
u32 ampdu_enable;/* for enable Tx A-MPDU */
u8 bwmode;/* */
u8 ch_offset;/* PRIME_CHNL_OFFSET */
u8 sgi;/* short GI */
/* for processing Tx A-MPDU */
u8 agg_enable_bitmap;
u8 candidate_tid_bitmap;
struct ieee80211_ht_cap ht_cap;
};
#endif /* _RTL871X_HT_H_ */

85
drivers/staging/rtl8188eu/include/rtw_ioctl.h
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@ -1,85 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _RTW_IOCTL_H_
#define _RTW_IOCTL_H_
#include <osdep_service.h>
#include <drv_types.h>
#ifndef OID_802_11_CAPABILITY
#define OID_802_11_CAPABILITY 0x0d010122
#endif
#ifndef OID_802_11_PMKID
#define OID_802_11_PMKID 0x0d010123
#endif
/* For DDK-defined OIDs */
#define OID_NDIS_SEG1 0x00010100
#define OID_NDIS_SEG2 0x00010200
#define OID_NDIS_SEG3 0x00020100
#define OID_NDIS_SEG4 0x01010100
#define OID_NDIS_SEG5 0x01020100
#define OID_NDIS_SEG6 0x01020200
#define OID_NDIS_SEG7 0xFD010100
#define OID_NDIS_SEG8 0x0D010100
#define OID_NDIS_SEG9 0x0D010200
#define OID_NDIS_SEG10 0x0D020200
#define SZ_OID_NDIS_SEG1 23
#define SZ_OID_NDIS_SEG2 3
#define SZ_OID_NDIS_SEG3 6
#define SZ_OID_NDIS_SEG4 6
#define SZ_OID_NDIS_SEG5 4
#define SZ_OID_NDIS_SEG6 8
#define SZ_OID_NDIS_SEG7 7
#define SZ_OID_NDIS_SEG8 36
#define SZ_OID_NDIS_SEG9 24
#define SZ_OID_NDIS_SEG10 19
/* For Realtek-defined OIDs */
#define OID_MP_SEG1 0xFF871100
#define OID_MP_SEG2 0xFF818000
#define OID_MP_SEG3 0xFF818700
#define OID_MP_SEG4 0xFF011100
enum oid_type {
QUERY_OID,
SET_OID
};
struct oid_par_priv {
void *adapter_context;
NDIS_OID oid;
void *information_buf;
u32 information_buf_len;
u32 *bytes_rw;
u32 *bytes_needed;
enum oid_type type_of_oid;
u32 dbg;
};
#if defined(_RTW_MP_IOCTL_C_)
static int oid_null_function(struct oid_par_priv *poid_par_priv)
{
return NDIS_STATUS_SUCCESS;
}
#endif
extern struct iw_handler_def rtw_handlers_def;
int drv_query_info(struct net_device *miniportadaptercontext, NDIS_OID oid,
void *informationbuffer, u32 informationbufferlength,
u32 *byteswritten, u32 *bytesneeded);
int drv_set_info(struct net_device *MiniportAdapterContext,
NDIS_OID oid, void *informationbuffer,
u32 informationbufferlength, u32 *bytesread,
u32 *bytesneeded);
#endif /* #ifndef __INC_CEINFO_ */

28
drivers/staging/rtl8188eu/include/rtw_ioctl_set.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_IOCTL_SET_H_
#define __RTW_IOCTL_SET_H_
#include <drv_types.h>
typedef u8 NDIS_802_11_PMKID_VALUE[16];
u8 rtw_set_802_11_authentication_mode(struct adapter *adapt,
enum ndis_802_11_auth_mode authmode);
u8 rtw_set_802_11_bssid(struct adapter *adapter, u8 *bssid);
u8 rtw_set_802_11_add_wep(struct adapter *adapter, struct ndis_802_11_wep *wep);
u8 rtw_set_802_11_disassociate(struct adapter *adapter);
u8 rtw_set_802_11_bssid_list_scan(struct adapter *adapter,
struct ndis_802_11_ssid *pssid,
int ssid_max_num);
u8 rtw_set_802_11_infrastructure_mode(struct adapter *adapter,
enum ndis_802_11_network_infra type);
u8 rtw_set_802_11_ssid(struct adapter *adapt, struct ndis_802_11_ssid *ssid);
u16 rtw_get_cur_max_rate(struct adapter *adapter);
int rtw_set_country(struct adapter *adapter, const char *country_code);
#endif

14
drivers/staging/rtl8188eu/include/rtw_iol.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_IOL_H_
#define __RTW_IOL_H_
#include <drv_types.h>
bool rtw_iol_applied(struct adapter *adapter);
#endif /* __RTW_IOL_H_ */

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drivers/staging/rtl8188eu/include/rtw_led.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_LED_H_
#define __RTW_LED_H_
#include <osdep_service.h>
#include <drv_types.h>
#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000
#define LED_BLINK_LINK_INTERVAL_ALPHA 500 /* 500 */
#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 /* 150 */
#define LED_BLINK_FASTER_INTERVAL_ALPHA 50
#define LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA 5000
enum LED_CTL_MODE {
LED_CTL_POWER_ON,
LED_CTL_LINK,
LED_CTL_NO_LINK,
LED_CTL_TX,
LED_CTL_RX,
LED_CTL_SITE_SURVEY,
LED_CTL_POWER_OFF,
LED_CTL_START_TO_LINK,
LED_CTL_START_WPS,
LED_CTL_STOP_WPS,
LED_CTL_START_WPS_BOTTON,
LED_CTL_STOP_WPS_FAIL
};
enum LED_STATE_871x {
LED_UNKNOWN,
RTW_LED_ON,
RTW_LED_OFF,
LED_BLINK_NORMAL,
LED_BLINK_SLOWLY,
LED_BLINK_POWER_ON,
LED_BLINK_SCAN,
LED_BLINK_TXRX,
LED_BLINK_WPS,
LED_BLINK_WPS_STOP
};
struct LED_871x {
struct adapter *padapter;
enum LED_STATE_871x CurrLedState; /* Current LED state. */
enum LED_STATE_871x BlinkingLedState; /* Next state for blinking,
* either RTW_LED_ON or RTW_LED_OFF are.
*/
u8 led_on; /* true if LED is ON, false if LED is OFF. */
u8 bLedBlinkInProgress; /* true if it is blinking, false o.w.. */
u8 bLedWPSBlinkInProgress;
u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
struct timer_list BlinkTimer; /* Timer object for led blinking. */
/* ALPHA, added by chiyoko, 20090106 */
u8 bLedNoLinkBlinkInProgress;
u8 bLedLinkBlinkInProgress;
u8 bLedScanBlinkInProgress;
struct work_struct BlinkWorkItem; /* Workitem used by BlinkTimer to
* manipulate H/W to blink LED.
*/
};
#define IS_LED_WPS_BLINKING(_LED_871x) \
(((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS || \
((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS_STOP || \
((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress)
void led_control_8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction);
struct led_priv {
struct LED_871x sw_led;
};
void BlinkWorkItemCallback(struct work_struct *work);
void ResetLedStatus(struct LED_871x *pLed);
void InitLed871x(struct adapter *padapter, struct LED_871x *pLed);
void DeInitLed871x(struct LED_871x *pLed);
/* hal... */
void blink_handler(struct LED_871x *pLed);
void sw_led_on(struct adapter *padapter, struct LED_871x *pLed);
void sw_led_off(struct adapter *padapter, struct LED_871x *pLed);
#endif /* __RTW_LED_H_ */

355
drivers/staging/rtl8188eu/include/rtw_mlme.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_MLME_H_
#define __RTW_MLME_H_
#include <osdep_service.h>
#include <mlme_osdep.h>
#include <drv_types.h>
#include <wlan_bssdef.h>
#define MAX_BSS_CNT 128
#define MAX_JOIN_TIMEOUT 6500
/* Increase the scanning timeout because of increasing the SURVEY_TO value. */
#define SCANNING_TIMEOUT 8000
#define SCAN_INTERVAL (30) /* unit:2sec, 30*2=60sec */
#define SCANQUEUE_LIFETIME 20 /* unit:sec */
#define WIFI_NULL_STATE 0x00000000
#define WIFI_ASOC_STATE 0x00000001 /* Under Linked state */
#define WIFI_REASOC_STATE 0x00000002
#define WIFI_SLEEP_STATE 0x00000004
#define WIFI_STATION_STATE 0x00000008
#define WIFI_AP_STATE 0x00000010
#define WIFI_ADHOC_STATE 0x00000020
#define WIFI_ADHOC_MASTER_STATE 0x00000040
#define WIFI_UNDER_LINKING 0x00000080
#define WIFI_UNDER_WPS 0x00000100
#define WIFI_STA_ALIVE_CHK_STATE 0x00000400
#define WIFI_SITE_MONITOR 0x00000800 /* to indicate the station is under site surveying */
#define _FW_UNDER_LINKING WIFI_UNDER_LINKING
#define _FW_LINKED WIFI_ASOC_STATE
#define _FW_UNDER_SURVEY WIFI_SITE_MONITOR
enum dot11AuthAlgrthmNum {
dot11AuthAlgrthm_Open = 0, /* open system */
dot11AuthAlgrthm_Shared,
dot11AuthAlgrthm_8021X,
dot11AuthAlgrthm_Auto,
dot11AuthAlgrthm_WAPI,
dot11AuthAlgrthm_MaxNum
};
/* Scan type including active and passive scan. */
enum rt_scan_type {
SCAN_PASSIVE,
SCAN_ACTIVE,
SCAN_MIX,
};
enum SCAN_RESULT_TYPE {
SCAN_RESULT_P2P_ONLY = 0, /* Will return all the P2P devices. */
SCAN_RESULT_ALL = 1, /* Will return all the scanned device,
* include AP.
*/
SCAN_RESULT_WFD_TYPE = 2 /* Will just return the correct WFD
* device.
*/
/* If this device is Miracast sink
* device, it will just return all the
* Miracast source devices.
*/
};
/*
* there are several "locks" in mlme_priv,
* since mlme_priv is a shared resource between many threads,
* like ISR/Call-Back functions, the OID handlers, and even timer functions.
*
* Each _queue has its own locks, already.
* Other items are protected by mlme_priv.lock.
*
* To avoid possible dead lock, any thread trying to modifiying mlme_priv
* SHALL not lock up more than one lock at a time!
*/
#define traffic_threshold 10
#define traffic_scan_period 500
struct rt_link_detect {
u32 NumTxOkInPeriod;
u32 NumRxOkInPeriod;
u32 NumRxUnicastOkInPeriod;
bool bBusyTraffic;
bool bTxBusyTraffic;
bool bRxBusyTraffic;
bool bHigherBusyTraffic; /* For interrupt migration purpose. */
bool bHigherBusyRxTraffic; /* We may disable Tx interrupt according
* to Rx traffic.
*/
bool bHigherBusyTxTraffic; /* We may disable Tx interrupt according
* to Tx traffic.
*/
};
struct mlme_priv {
spinlock_t lock;
int fw_state; /* shall we protect this variable? maybe not necessarily... */
u8 bScanInProcess;
u8 to_join; /* flag */
u8 to_roaming; /* roaming trying times */
struct list_head *pscanned;
struct __queue free_bss_pool;
struct __queue scanned_queue;
u8 *free_bss_buf;
struct ndis_802_11_ssid assoc_ssid;
u8 assoc_bssid[6];
struct wlan_network cur_network;
u32 scan_interval;
struct timer_list assoc_timer;
uint assoc_by_bssid;
struct timer_list scan_to_timer; /* driver itself handles scan_timeout status. */
struct qos_priv qospriv;
/* Number of non-HT AP/stations */
int num_sta_no_ht;
/* Number of HT AP/stations 20 MHz */
/* int num_sta_ht_20mhz; */
int num_FortyMHzIntolerant;
struct ht_priv htpriv;
struct rt_link_detect LinkDetectInfo;
struct timer_list dynamic_chk_timer; /* dynamic/periodic check timer */
u8 key_mask; /* use for ips to set wep key after ips_leave */
u8 acm_mask; /* for wmm acm mask */
u8 ChannelPlan;
enum rt_scan_type scan_mode; /* active: 1, passive: 0 */
/* u8 probereq_wpsie[MAX_WPS_IE_LEN];added in probe req */
/* int probereq_wpsie_len; */
u8 *wps_probe_req_ie;
u32 wps_probe_req_ie_len;
u8 *assoc_req;
u32 assoc_req_len;
u8 *assoc_rsp;
u32 assoc_rsp_len;
#if defined(CONFIG_88EU_AP_MODE)
/* Number of associated Non-ERP stations (i.e., stations using 802.11b
* in 802.11g BSS)
*/
int num_sta_non_erp;
/* Number of associated stations that do not support Short Slot Time */
int num_sta_no_short_slot_time;
/* Number of associated stations that do not support Short Preamble */
int num_sta_no_short_preamble;
int olbc; /* Overlapping Legacy BSS Condition */
/* Number of HT assoc sta that do not support greenfield */
int num_sta_ht_no_gf;
/* Number of associated non-HT stations */
/* int num_sta_no_ht; */
/* Number of HT associated stations 20 MHz */
int num_sta_ht_20mhz;
/* Overlapping BSS information */
int olbc_ht;
u16 ht_op_mode;
u8 *wps_beacon_ie;
/* u8 *wps_probe_req_ie; */
u8 *wps_probe_resp_ie;
u8 *wps_assoc_resp_ie;
u32 wps_beacon_ie_len;
u32 wps_probe_resp_ie_len;
u32 wps_assoc_resp_ie_len;
spinlock_t bcn_update_lock;
u8 update_bcn;
#endif /* if defined (CONFIG_88EU_AP_MODE) */
};
#ifdef CONFIG_88EU_AP_MODE
struct hostapd_priv {
struct adapter *padapter;
};
int hostapd_mode_init(struct adapter *padapter);
void hostapd_mode_unload(struct adapter *padapter);
#endif
extern const u8 WPA_TKIP_CIPHER[4];
extern const u8 RSN_TKIP_CIPHER[4];
extern u8 REALTEK_96B_IE[];
extern const u8 MCS_rate_1R[16];
void rtw_joinbss_event_prehandle(struct adapter *adapter, u8 *pbuf);
void rtw_survey_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_surveydone_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_joinbss_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf);
void indicate_wx_scan_complete_event(struct adapter *padapter);
void rtw_indicate_wx_assoc_event(struct adapter *padapter);
void rtw_indicate_wx_disassoc_event(struct adapter *padapter);
int event_thread(void *context);
void rtw_free_network_queue(struct adapter *adapter, u8 isfreeall);
int rtw_init_mlme_priv(struct adapter *adapter);
void rtw_free_mlme_priv(struct mlme_priv *pmlmepriv);
int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv);
int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv,
int keyid, u8 set_tx);
int rtw_set_auth(struct adapter *adapter, struct security_priv *psecuritypriv);
static inline u8 *get_bssid(struct mlme_priv *pmlmepriv)
{ /* if sta_mode:pmlmepriv->cur_network.network.MacAddress=> bssid */
/* if adhoc_mode:pmlmepriv->cur_network.network.MacAddress=> ibss mac address */
return pmlmepriv->cur_network.network.MacAddress;
}
static inline int check_fwstate(struct mlme_priv *pmlmepriv, int state)
{
if (pmlmepriv->fw_state & state)
return true;
return false;
}
static inline int get_fwstate(struct mlme_priv *pmlmepriv)
{
return pmlmepriv->fw_state;
}
/*
* No Limit on the calling context,
* therefore set it to be the critical section...
*
* ### NOTE:#### (!!!!)
* MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock
*/
static inline void set_fwstate(struct mlme_priv *pmlmepriv, int state)
{
pmlmepriv->fw_state |= state;
/* FOR HW integration */
if (state == _FW_UNDER_SURVEY)
pmlmepriv->bScanInProcess = true;
}
static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, int state)
{
pmlmepriv->fw_state &= ~state;
/* FOR HW integration */
if (state == _FW_UNDER_SURVEY)
pmlmepriv->bScanInProcess = false;
}
/*
* No Limit on the calling context,
* therefore set it to be the critical section...
*/
static inline void clr_fwstate(struct mlme_priv *pmlmepriv, int state)
{
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, state))
pmlmepriv->fw_state ^= state;
spin_unlock_bh(&pmlmepriv->lock);
}
static inline void clr_fwstate_ex(struct mlme_priv *pmlmepriv, int state)
{
spin_lock_bh(&pmlmepriv->lock);
_clr_fwstate_(pmlmepriv, state);
spin_unlock_bh(&pmlmepriv->lock);
}
u16 rtw_get_capability(struct wlan_bssid_ex *bss);
void rtw_update_scanned_network(struct adapter *adapter,
struct wlan_bssid_ex *target);
void rtw_disconnect_hdl_under_linked(struct adapter *adapter,
struct sta_info *psta, u8 free_assoc);
void rtw_generate_random_ibss(u8 *pibss);
struct wlan_network *rtw_find_network(struct __queue *scanned_queue, u8 *addr);
struct wlan_network *rtw_get_oldest_wlan_network(struct __queue *scanned_queue);
void rtw_free_assoc_resources(struct adapter *adapter);
void rtw_free_assoc_resources_locked(struct adapter *adapter);
void rtw_indicate_disconnect(struct adapter *adapter);
void rtw_indicate_connect(struct adapter *adapter);
void rtw_indicate_scan_done(struct adapter *padapter, bool aborted);
int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie,
uint in_len);
int rtw_restruct_wmm_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie,
uint in_len, uint initial_out_len);
void rtw_init_registrypriv_dev_network(struct adapter *adapter);
void rtw_update_registrypriv_dev_network(struct adapter *adapter);
void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter);
void _rtw_join_timeout_handler(struct timer_list *t);
void rtw_scan_timeout_handler(struct timer_list *t);
void rtw_dynamic_check_timer_handlder(struct timer_list *t);
#define rtw_is_scan_deny(adapter) false
#define rtw_clear_scan_deny(adapter) do {} while (0)
#define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0)
#define rtw_set_scan_deny(adapter, ms) do {} while (0)
void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv);
struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv);
int rtw_if_up(struct adapter *padapter);
u8 *rtw_get_capability_from_ie(u8 *ie);
u8 *rtw_get_beacon_interval_from_ie(u8 *ie);
void rtw_joinbss_reset(struct adapter *padapter);
unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie,
u8 *out_ie, uint in_len, uint *pout_len);
void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len);
void rtw_issue_addbareq_cmd(struct adapter *padapter,
struct xmit_frame *pxmitframe);
int rtw_is_same_ibss(struct adapter *adapter, struct wlan_network *pnetwork);
int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst);
void rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network);
void _rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network);
void rtw_stassoc_hw_rpt(struct adapter *adapter, struct sta_info *psta);
#endif /* __RTL871X_MLME_H_ */

680
drivers/staging/rtl8188eu/include/rtw_mlme_ext.h
View File

@ -1,680 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_MLME_EXT_H_
#define __RTW_MLME_EXT_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <wlan_bssdef.h>
/* Commented by Albert 20101105 */
/* Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) */
/* The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request. */
/* So, this driver tried to extend the dwell time for each scanning channel. */
/* This will increase the chance to receive the probe response from SoftAP. */
#define SURVEY_TO (100)
#define REAUTH_TO (300) /* 50) */
#define REASSOC_TO (300) /* 50) */
/* define DISCONNECT_TO (3000) */
#define ADDBA_TO (2000)
#define LINKED_TO (1) /* unit:2 sec, 1x2=2 sec */
#define REAUTH_LIMIT (4)
#define REASSOC_LIMIT (4)
#define READDBA_LIMIT (2)
#define ROAMING_LIMIT 8
#define DYNAMIC_FUNC_DISABLE (0x0)
/* ====== ODM_ABILITY_E ======== */
/* BB ODM section BIT 0-15 */
#define DYNAMIC_BB_DIG BIT(0)
#define DYNAMIC_BB_RA_MASK BIT(1)
#define DYNAMIC_BB_DYNAMIC_TXPWR BIT(2)
#define DYNAMIC_BB_BB_FA_CNT BIT(3)
#define DYNAMIC_BB_RSSI_MONITOR BIT(4)
#define DYNAMIC_BB_CCK_PD BIT(5)
#define DYNAMIC_BB_ANT_DIV BIT(6)
#define DYNAMIC_BB_PWR_SAVE BIT(7)
#define DYNAMIC_BB_PWR_TRA BIT(8)
#define DYNAMIC_BB_RATE_ADAPTIVE BIT(9)
#define DYNAMIC_BB_PATH_DIV BIT(10)
#define DYNAMIC_BB_PSD BIT(11)
/* MAC DM section BIT 16-23 */
#define DYNAMIC_MAC_EDCA_TURBO BIT(16)
#define DYNAMIC_MAC_EARLY_MODE BIT(17)
/* RF ODM section BIT 24-31 */
#define DYNAMIC_RF_TX_PWR_TRACK BIT(24)
#define DYNAMIC_RF_RX_GAIN_TRACK BIT(25)
#define DYNAMIC_RF_CALIBRATION BIT(26)
#define DYNAMIC_ALL_FUNC_ENABLE 0xFFFFFFF
#define _HW_STATE_NOLINK_ 0x00
#define _HW_STATE_ADHOC_ 0x01
#define _HW_STATE_STATION_ 0x02
#define _HW_STATE_AP_ 0x03
#define _1M_RATE_ 0
#define _2M_RATE_ 1
#define _5M_RATE_ 2
#define _11M_RATE_ 3
#define _6M_RATE_ 4
#define _9M_RATE_ 5
#define _12M_RATE_ 6
#define _18M_RATE_ 7
#define _24M_RATE_ 8
#define _36M_RATE_ 9
#define _48M_RATE_ 10
#define _54M_RATE_ 11
extern const u8 RTW_WPA_OUI[];
extern const u8 WPS_OUI[];
/* Channel Plan Type. */
/* Note: */
/* We just add new channel plan when the new channel plan is different
* from any of the following channel plan.
*/
/* If you just want to customize the actions(scan period or join actions)
* about one of the channel plan,
*/
/* customize them in struct rt_channel_info in the RT_CHANNEL_LIST. */
enum RT_CHANNEL_DOMAIN {
/* old channel plan mapping ===== */
RT_CHANNEL_DOMAIN_FCC = 0x00,
RT_CHANNEL_DOMAIN_IC = 0x01,
RT_CHANNEL_DOMAIN_ETSI = 0x02,
RT_CHANNEL_DOMAIN_SPAIN = 0x03,
RT_CHANNEL_DOMAIN_FRANCE = 0x04,
RT_CHANNEL_DOMAIN_MKK = 0x05,
RT_CHANNEL_DOMAIN_MKK1 = 0x06,
RT_CHANNEL_DOMAIN_ISRAEL = 0x07,
RT_CHANNEL_DOMAIN_TELEC = 0x08,
RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09,
RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A,
RT_CHANNEL_DOMAIN_TAIWAN = 0x0B,
RT_CHANNEL_DOMAIN_CHINA = 0x0C,
RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D,
RT_CHANNEL_DOMAIN_KOREA = 0x0E,
RT_CHANNEL_DOMAIN_TURKEY = 0x0F,
RT_CHANNEL_DOMAIN_JAPAN = 0x10,
RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11,
RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12,
RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13,
RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14,
/* new channel plan mapping, (2GDOMAIN_5GDOMAIN) ===== */
RT_CHANNEL_DOMAIN_WORLD_NULL = 0x20,
RT_CHANNEL_DOMAIN_ETSI1_NULL = 0x21,
RT_CHANNEL_DOMAIN_FCC1_NULL = 0x22,
RT_CHANNEL_DOMAIN_MKK1_NULL = 0x23,
RT_CHANNEL_DOMAIN_ETSI2_NULL = 0x24,
RT_CHANNEL_DOMAIN_FCC1_FCC1 = 0x25,
RT_CHANNEL_DOMAIN_WORLD_ETSI1 = 0x26,
RT_CHANNEL_DOMAIN_MKK1_MKK1 = 0x27,
RT_CHANNEL_DOMAIN_WORLD_KCC1 = 0x28,
RT_CHANNEL_DOMAIN_WORLD_FCC2 = 0x29,
RT_CHANNEL_DOMAIN_WORLD_FCC3 = 0x30,
RT_CHANNEL_DOMAIN_WORLD_FCC4 = 0x31,
RT_CHANNEL_DOMAIN_WORLD_FCC5 = 0x32,
RT_CHANNEL_DOMAIN_WORLD_FCC6 = 0x33,
RT_CHANNEL_DOMAIN_FCC1_FCC7 = 0x34,
RT_CHANNEL_DOMAIN_WORLD_ETSI2 = 0x35,
RT_CHANNEL_DOMAIN_WORLD_ETSI3 = 0x36,
RT_CHANNEL_DOMAIN_MKK1_MKK2 = 0x37,
RT_CHANNEL_DOMAIN_MKK1_MKK3 = 0x38,
RT_CHANNEL_DOMAIN_FCC1_NCC1 = 0x39,
RT_CHANNEL_DOMAIN_FCC1_NCC2 = 0x40,
RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN_2G = 0x41,
/* Add new channel plan above this line=============== */
RT_CHANNEL_DOMAIN_MAX,
RT_CHANNEL_DOMAIN_REALTEK_DEFINE = 0x7F,
};
enum RT_CHANNEL_DOMAIN_2G {
RT_CHANNEL_DOMAIN_2G_WORLD = 0x00, /* Worldwide 13 */
RT_CHANNEL_DOMAIN_2G_ETSI1 = 0x01, /* Europe */
RT_CHANNEL_DOMAIN_2G_FCC1 = 0x02, /* US */
RT_CHANNEL_DOMAIN_2G_MKK1 = 0x03, /* Japan */
RT_CHANNEL_DOMAIN_2G_ETSI2 = 0x04, /* France */
RT_CHANNEL_DOMAIN_2G_NULL = 0x05,
/* Add new channel plan above this line=============== */
RT_CHANNEL_DOMAIN_2G_MAX,
};
#define rtw_is_channel_plan_valid(chplan) \
(chplan < RT_CHANNEL_DOMAIN_MAX || \
chplan == RT_CHANNEL_DOMAIN_REALTEK_DEFINE)
struct rt_channel_plan {
unsigned char Channel[MAX_CHANNEL_NUM];
unsigned char Len;
};
struct rt_channel_plan_2g {
unsigned char Channel[MAX_CHANNEL_NUM_2G];
unsigned char Len;
};
struct rt_channel_plan_map {
unsigned char Index2G;
};
enum Associated_AP {
atherosAP = 0,
broadcomAP = 1,
ciscoAP = 2,
marvellAP = 3,
ralinkAP = 4,
realtekAP = 5,
airgocapAP = 6,
unknownAP = 7,
maxAP,
};
enum HT_IOT_PEER {
HT_IOT_PEER_UNKNOWN = 0,
HT_IOT_PEER_REALTEK = 1,
HT_IOT_PEER_REALTEK_92SE = 2,
HT_IOT_PEER_BROADCOM = 3,
HT_IOT_PEER_RALINK = 4,
HT_IOT_PEER_ATHEROS = 5,
HT_IOT_PEER_CISCO = 6,
HT_IOT_PEER_MERU = 7,
HT_IOT_PEER_MARVELL = 8,
HT_IOT_PEER_REALTEK_SOFTAP = 9,/* peer is RealTek SOFT_AP */
HT_IOT_PEER_SELF_SOFTAP = 10, /* Self is SoftAP */
HT_IOT_PEER_AIRGO = 11,
HT_IOT_PEER_INTEL = 12,
HT_IOT_PEER_RTK_APCLIENT = 13,
HT_IOT_PEER_REALTEK_81XX = 14,
HT_IOT_PEER_REALTEK_WOW = 15,
HT_IOT_PEER_TENDA = 16,
HT_IOT_PEER_MAX = 17
};
enum SCAN_STATE {
SCAN_DISABLE = 0,
SCAN_START = 1,
SCAN_TXNULL = 2,
SCAN_PROCESS = 3,
SCAN_COMPLETE = 4,
SCAN_STATE_MAX,
};
struct mlme_handler {
unsigned int num;
const char *str;
unsigned int (*func)(struct adapter *adapt, struct recv_frame *frame);
};
struct action_handler {
unsigned int num;
const char *str;
unsigned int (*func)(struct adapter *adapt, struct recv_frame *frame);
};
struct ss_res {
int state;
int bss_cnt;
int channel_idx;
int scan_mode;
u8 ssid_num;
u8 ch_num;
struct ndis_802_11_ssid ssid[RTW_SSID_SCAN_AMOUNT];
struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT];
};
/* define AP_MODE 0x0C */
/* define STATION_MODE 0x08 */
/* define AD_HOC_MODE 0x04 */
/* define NO_LINK_MODE 0x00 */
#define WIFI_FW_NULL_STATE _HW_STATE_NOLINK_
#define WIFI_FW_STATION_STATE _HW_STATE_STATION_
#define WIFI_FW_AP_STATE _HW_STATE_AP_
#define WIFI_FW_ADHOC_STATE _HW_STATE_ADHOC_
#define WIFI_FW_AUTH_NULL 0x00000100
#define WIFI_FW_AUTH_STATE 0x00000200
#define WIFI_FW_AUTH_SUCCESS 0x00000400
#define WIFI_FW_ASSOC_STATE 0x00002000
#define WIFI_FW_ASSOC_SUCCESS 0x00004000
#define WIFI_FW_LINKING_STATE (WIFI_FW_AUTH_NULL | \
WIFI_FW_AUTH_STATE | \
WIFI_FW_AUTH_SUCCESS | \
WIFI_FW_ASSOC_STATE)
struct FW_Sta_Info {
struct sta_info *psta;
u32 status;
u32 rx_pkt;
u32 retry;
unsigned char SupportedRates[NDIS_802_11_LENGTH_RATES_EX];
};
/*
* Usage:
* When one iface acted as AP mode and the other iface is STA mode and scanning,
* it should switch back to AP's operating channel periodically.
* Parameters info:
* When the driver scanned RTW_SCAN_NUM_OF_CH channels, it would switch back to
* AP's operating channel for
* RTW_STAY_AP_CH_MILLISECOND * SURVEY_TO milliseconds.
* Example:
* For chip supports 2.4G + 5GHz and AP mode is operating in channel 1,
* RTW_SCAN_NUM_OF_CH is 8, RTW_STAY_AP_CH_MS is 3 and SURVEY_TO is 100.
* When it's STA mode gets set_scan command,
* it would
* 1. Doing the scan on channel 1.2.3.4.5.6.7.8
* 2. Back to channel 1 for 300 milliseconds
* 3. Go through doing site survey on channel 9.10.11.36.40.44.48.52
* 4. Back to channel 1 for 300 milliseconds
* 5. ... and so on, till survey done.
*/
struct mlme_ext_info {
u32 state;
u32 reauth_count;
u32 reassoc_count;
u32 link_count;
u32 auth_seq;
u32 auth_algo; /* 802.11 auth, could be open, shared, auto */
u32 authModeToggle;
u32 enc_algo;/* encrypt algorithm; */
u32 key_index; /* this is only valid for legacy wep,
* 0~3 for key id.
*/
u32 iv;
u8 chg_txt[128];
u16 aid;
u16 bcn_interval;
u16 capability;
u8 assoc_AP_vendor;
u8 slotTime;
u8 preamble_mode;
u8 WMM_enable;
u8 ERP_enable;
u8 ERP_IE;
u8 HT_enable;
u8 HT_caps_enable;
u8 HT_info_enable;
u8 HT_protection;
u8 turboMode_cts2self;
u8 turboMode_rtsen;
u8 SM_PS;
u8 agg_enable_bitmap;
u8 ADDBA_retry_count;
u8 candidate_tid_bitmap;
u8 dialogToken;
/* Accept ADDBA Request */
bool accept_addba_req;
u8 bwmode_updated;
u8 hidden_ssid_mode;
struct ADDBA_request ADDBA_req;
struct WMM_para_element WMM_param;
struct ieee80211_ht_cap HT_caps;
struct HT_info_element HT_info;
struct wlan_bssid_ex network;/* join network or bss_network,
* if in ap mode, it is the same
* as cur_network.network
*/
struct FW_Sta_Info FW_sta_info[NUM_STA];
};
/* The channel information about this channel including joining,
* scanning, and power constraints.
*/
struct rt_channel_info {
u8 ChannelNum; /* The channel number. */
enum rt_scan_type ScanType; /* Scan type such as passive
* or active scan.
*/
u32 rx_count;
};
int rtw_ch_set_search_ch(struct rt_channel_info *ch_set, const u32 ch);
/* P2P_MAX_REG_CLASSES - Maximum number of regulatory classes */
#define P2P_MAX_REG_CLASSES 10
/* P2P_MAX_REG_CLASS_CHANNELS - Maximum number of chan per regulatory class */
#define P2P_MAX_REG_CLASS_CHANNELS 20
/* struct p2p_channels - List of supported channels */
struct p2p_channels {
/* struct p2p_reg_class - Supported regulatory class */
struct p2p_reg_class {
/* reg_class - Regulatory class (IEEE 802.11-2007, Annex J) */
u8 reg_class;
/* channel - Supported channels */
u8 channel[P2P_MAX_REG_CLASS_CHANNELS];
/* channels - Number of channel entries in use */
size_t channels;
} reg_class[P2P_MAX_REG_CLASSES];
/* reg_classes - Number of reg_class entries in use */
size_t reg_classes;
};
struct p2p_oper_class_map {
enum hw_mode {IEEE80211G} mode;
u8 op_class;
u8 min_chan;
u8 max_chan;
u8 inc;
enum {BW20, BW40PLUS, BW40MINUS} bw;
};
struct mlme_ext_priv {
u8 mlmeext_init;
atomic_t event_seq;
u16 mgnt_seq;
unsigned char cur_channel;
unsigned char cur_bwmode;
unsigned char cur_ch_offset;/* PRIME_CHNL_OFFSET */
unsigned char cur_wireless_mode; /* NETWORK_TYPE */
unsigned char oper_channel; /* saved chan info when call
* set_channel_bw
*/
unsigned char oper_bwmode;
unsigned char oper_ch_offset;/* PRIME_CHNL_OFFSET */
unsigned char max_chan_nums;
struct rt_channel_info channel_set[MAX_CHANNEL_NUM];
struct p2p_channels channel_list;
unsigned char basicrate[NumRates];
unsigned char datarate[NumRates];
struct ss_res sitesurvey_res;
struct mlme_ext_info mlmext_info;/* for sta/adhoc mode, including
* current scan/connecting/connected
* related info. For ap mode,
* network includes ap's cap_info
*/
struct timer_list survey_timer;
struct timer_list link_timer;
u16 chan_scan_time;
u8 scan_abort;
u8 tx_rate; /* TXRATE when USERATE is set. */
u32 retry; /* retry for issue probereq */
u64 TSFValue;
#ifdef CONFIG_88EU_AP_MODE
unsigned char bstart_bss;
#endif
u8 update_channel_plan_by_ap_done;
/* recv_decache check for Action_public frame */
u8 action_public_dialog_token;
u16 action_public_rxseq;
u8 active_keep_alive_check;
};
int init_mlme_ext_priv(struct adapter *adapter);
int init_hw_mlme_ext(struct adapter *padapter);
void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext);
void init_mlme_ext_timer(struct adapter *padapter);
void init_addba_retry_timer(struct adapter *adapt, struct sta_info *sta);
struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv);
unsigned char networktype_to_raid(unsigned char network_type);
u8 judge_network_type(struct adapter *padapter, unsigned char *rate);
void get_rate_set(struct adapter *padapter, unsigned char *pbssrate, int *len);
void UpdateBrateTbl(struct adapter *padapter, u8 *mBratesOS);
void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen);
void Save_DM_Func_Flag(struct adapter *padapter);
void Restore_DM_Func_Flag(struct adapter *padapter);
void Switch_DM_Func(struct adapter *padapter, u32 mode, u8 enable);
void Set_MSR(struct adapter *padapter, u8 type);
u8 rtw_get_oper_ch(struct adapter *adapter);
void rtw_set_oper_ch(struct adapter *adapter, u8 ch);
void rtw_set_oper_bw(struct adapter *adapter, u8 bw);
void rtw_set_oper_choffset(struct adapter *adapter, u8 offset);
void set_channel_bwmode(struct adapter *padapter, unsigned char channel,
unsigned char channel_offset, unsigned short bwmode);
void SelectChannel(struct adapter *padapter, unsigned char channel);
void SetBWMode(struct adapter *padapter, unsigned short bwmode,
unsigned char channel_offset);
unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval);
void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key);
void clear_cam_entry(struct adapter *padapter, u8 entry);
void invalidate_cam_all(struct adapter *padapter);
int allocate_fw_sta_entry(struct adapter *padapter);
void flush_all_cam_entry(struct adapter *padapter);
void update_network(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src,
struct adapter *adapter, bool update_ie);
u16 get_beacon_interval(struct wlan_bssid_ex *bss);
int is_client_associated_to_ap(struct adapter *padapter);
int is_client_associated_to_ibss(struct adapter *padapter);
int is_IBSS_empty(struct adapter *padapter);
unsigned char check_assoc_AP(u8 *pframe, uint len);
int WMM_param_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE);
void WMMOnAssocRsp(struct adapter *padapter);
void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE);
void HT_info_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE);
void HTOnAssocRsp(struct adapter *padapter);
void ERP_IE_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE);
void VCS_update(struct adapter *padapter, struct sta_info *psta);
void update_beacon_info(struct adapter *padapter, u8 *pframe, uint len,
struct sta_info *psta);
int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len);
void update_IOT_info(struct adapter *padapter);
void update_capinfo(struct adapter *adapter, u16 updatecap);
void update_wireless_mode(struct adapter *padapter);
void update_tx_basic_rate(struct adapter *padapter, u8 modulation);
void update_bmc_sta_support_rate(struct adapter *padapter, u32 mac_id);
int update_sta_support_rate(struct adapter *padapter, u8 *pvar_ie,
uint var_ie_len, int cam_idx);
/* for sta/adhoc mode */
void update_sta_info(struct adapter *padapter, struct sta_info *psta);
unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz);
unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz);
unsigned int update_MSC_rate(struct ieee80211_ht_cap *pHT_caps);
void Update_RA_Entry(struct adapter *padapter, u32 mac_id);
void set_sta_rate(struct adapter *padapter, struct sta_info *psta);
unsigned char get_highest_rate_idx(u32 mask);
int support_short_GI(struct adapter *padapter, struct ieee80211_ht_cap *caps);
unsigned int is_ap_in_tkip(struct adapter *padapter);
void report_join_res(struct adapter *padapter, int res);
void report_survey_event(struct adapter *padapter,
struct recv_frame *precv_frame);
void report_surveydone_event(struct adapter *padapter);
void report_del_sta_event(struct adapter *padapter,
unsigned char *addr, unsigned short reason);
void report_add_sta_event(struct adapter *padapter, unsigned char *addr,
int cam_idx);
u8 set_tx_beacon_cmd(struct adapter *padapter);
unsigned int setup_beacon_frame(struct adapter *padapter,
unsigned char *beacon_frame);
void update_mgnt_tx_rate(struct adapter *padapter, u8 rate);
void update_mgntframe_attrib(struct adapter *padapter,
struct pkt_attrib *pattrib);
int issue_nulldata(struct adapter *padapter, unsigned char *da,
unsigned int power_mode, int try_cnt, int wait_ms);
int issue_qos_nulldata(struct adapter *padapter, unsigned char *da,
u16 tid, int try_cnt, int wait_ms);
int issue_deauth(struct adapter *padapter, unsigned char *da,
unsigned short reason);
unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr);
unsigned int send_beacon(struct adapter *padapter);
void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res);
void mlmeext_sta_del_event_callback(struct adapter *padapter);
void mlmeext_sta_add_event_callback(struct adapter *padapter,
struct sta_info *psta);
void linked_status_chk(struct adapter *padapter);
void survey_timer_hdl(struct timer_list *t);
void link_timer_hdl(struct timer_list *t);
void addba_timer_hdl(struct timer_list *t);
#define set_survey_timer(mlmeext, ms) \
mod_timer(&mlmeext->survey_timer, jiffies + \
msecs_to_jiffies(ms))
#define set_link_timer(mlmeext, ms) \
mod_timer(&mlmeext->link_timer, jiffies + \
msecs_to_jiffies(ms))
void process_addba_req(struct adapter *padapter, u8 *paddba_req, u8 *addr);
void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len);
void correct_TSF(struct adapter *padapter, struct mlme_ext_priv *pmlmeext);
struct cmd_hdl {
uint parmsize;
u8 (*h2cfuns)(struct adapter *padapter, u8 *pbuf);
};
u8 read_macreg_hdl(struct adapter *padapter, u8 *pbuf);
u8 write_macreg_hdl(struct adapter *padapter, u8 *pbuf);
u8 read_bbreg_hdl(struct adapter *padapter, u8 *pbuf);
u8 write_bbreg_hdl(struct adapter *padapter, u8 *pbuf);
u8 read_rfreg_hdl(struct adapter *padapter, u8 *pbuf);
u8 write_rfreg_hdl(struct adapter *padapter, u8 *pbuf);
u8 join_cmd_hdl(struct adapter *padapter, u8 *pbuf);
u8 disconnect_hdl(struct adapter *padapter, u8 *pbuf);
u8 createbss_hdl(struct adapter *padapter, u8 *pbuf);
u8 setopmode_hdl(struct adapter *padapter, u8 *pbuf);
u8 sitesurvey_cmd_hdl(struct adapter *padapter, u8 *pbuf);
u8 setauth_hdl(struct adapter *padapter, u8 *pbuf);
u8 setkey_hdl(struct adapter *padapter, u8 *pbuf);
u8 set_stakey_hdl(struct adapter *padapter, u8 *pbuf);
u8 set_assocsta_hdl(struct adapter *padapter, u8 *pbuf);
u8 del_assocsta_hdl(struct adapter *padapter, u8 *pbuf);
u8 add_ba_hdl(struct adapter *padapter, unsigned char *pbuf);
u8 mlme_evt_hdl(struct adapter *padapter, unsigned char *pbuf);
u8 h2c_msg_hdl(struct adapter *padapter, unsigned char *pbuf);
u8 tx_beacon_hdl(struct adapter *padapter, unsigned char *pbuf);
u8 set_ch_hdl(struct adapter *padapter, u8 *pbuf);
u8 set_chplan_hdl(struct adapter *padapter, unsigned char *pbuf);
u8 led_blink_hdl(struct adapter *padapter, unsigned char *pbuf);
/* Handling DFS channel switch announcement ie. */
u8 set_csa_hdl(struct adapter *padapter, unsigned char *pbuf);
u8 tdls_hdl(struct adapter *padapter, unsigned char *pbuf);
struct C2HEvent_Header {
#ifdef __LITTLE_ENDIAN
unsigned int len:16;
unsigned int ID:8;
unsigned int seq:8;
#elif defined(__BIG_ENDIAN)
unsigned int seq:8;
unsigned int ID:8;
unsigned int len:16;
#endif
unsigned int rsvd;
};
void rtw_dummy_event_callback(struct adapter *adapter, u8 *pbuf);
void rtw_fwdbg_event_callback(struct adapter *adapter, u8 *pbuf);
enum rtw_c2h_event {
_Read_MACREG_EVT_ = 0, /*0*/
_Read_BBREG_EVT_,
_Read_RFREG_EVT_,
_Read_EEPROM_EVT_,
_Read_EFUSE_EVT_,
_Read_CAM_EVT_, /*5*/
_Get_BasicRate_EVT_,
_Get_DataRate_EVT_,
_Survey_EVT_, /*8*/
_SurveyDone_EVT_, /*9*/
_JoinBss_EVT_, /*10*/
_AddSTA_EVT_,
_DelSTA_EVT_,
_AtimDone_EVT_,
_TX_Report_EVT_,
_CCX_Report_EVT_, /*15*/
_DTM_Report_EVT_,
_TX_Rate_Statistics_EVT_,
_C2HLBK_EVT_,
_FWDBG_EVT_,
_C2HFEEDBACK_EVT_, /*20*/
_ADDBA_EVT_,
_C2HBCN_EVT_,
_ReportPwrState_EVT_, /* filen: only for PCIE, USB */
_CloseRF_EVT_, /* filen: only for PCIE,
* work around ASPM
*/
MAX_C2HEVT
};
#ifdef _RTW_MLME_EXT_C_
static struct fwevent wlanevents[] = {
{0, rtw_dummy_event_callback}, /*0*/
{0, NULL},
{0, NULL},
{0, NULL},
{0, NULL},
{0, NULL},
{0, NULL},
{0, NULL},
{0, &rtw_survey_event_callback}, /*8*/
{sizeof(struct surveydone_event), &rtw_surveydone_event_callback},/*9*/
{0, &rtw_joinbss_event_callback}, /*10*/
{sizeof(struct stassoc_event), &rtw_stassoc_event_callback},
{sizeof(struct stadel_event), &rtw_stadel_event_callback},
{0, NULL},
{0, rtw_dummy_event_callback},
{0, NULL}, /*15*/
{0, NULL},
{0, NULL},
{0, NULL},
{0, rtw_fwdbg_event_callback},
{0, NULL}, /*20*/
{0, NULL},
{0, NULL},
{0, NULL},
{0, NULL},
};
#endif/* _RTL_MLME_EXT_C_ */
#endif /* __RTW_MLME_EXT_H_ */

244
drivers/staging/rtl8188eu/include/rtw_pwrctrl.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_PWRCTRL_H_
#define __RTW_PWRCTRL_H_
#include <osdep_service.h>
#include <drv_types.h>
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR3 0
#define HW_PWR4 8
#define FW_PWRMSK 0x7
#define XMIT_ALIVE BIT(0)
#define RECV_ALIVE BIT(1)
#define CMD_ALIVE BIT(2)
#define EVT_ALIVE BIT(3)
enum power_mgnt {
PS_MODE_ACTIVE = 0,
PS_MODE_MIN,
PS_MODE_MAX,
PS_MODE_DTIM,
PS_MODE_VOIP,
PS_MODE_UAPSD_WMM,
PS_MODE_UAPSD,
PS_MODE_IBSS,
PS_MODE_WWLAN,
PM_Radio_Off,
PM_Card_Disable,
PS_MODE_NUM
};
/*
* BIT[2:0] = HW state
* BIT[3] = Protocol PS state, 0: register active state,
* 1: register sleep state
* BIT[4] = sub-state
*/
#define PS_DPS BIT(0)
#define PS_LCLK (PS_DPS)
#define PS_RF_OFF BIT(1)
#define PS_ALL_ON BIT(2)
#define PS_ST_ACTIVE BIT(3)
#define PS_ISR_ENABLE BIT(4)
#define PS_IMR_ENABLE BIT(5)
#define PS_ACK BIT(6)
#define PS_TOGGLE BIT(7)
#define PS_STATE_MASK (0x0F)
#define PS_STATE_HW_MASK (0x07)
#define PS_SEQ_MASK (0xc0)
#define PS_STATE(x) (PS_STATE_MASK & (x))
#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
#define PS_SEQ(x) (PS_SEQ_MASK & (x))
#define PS_STATE_S0 (PS_DPS)
#define PS_STATE_S1 (PS_LCLK)
#define PS_STATE_S2 (PS_RF_OFF)
#define PS_STATE_S3 (PS_ALL_ON)
#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
struct reportpwrstate_parm {
unsigned char mode;
unsigned char state; /* the CPWM value */
unsigned short rsvd;
};
#define LPS_DELAY_TIME 1 * HZ /* 1 sec */
#define EXE_PWR_NONE 0x01
#define EXE_PWR_IPS 0x02
#define EXE_PWR_LPS 0x04
/* RF state. */
enum rt_rf_power_state {
rf_on, /* RF is on after RFSleep or RFOff */
rf_sleep, /* 802.11 Power Save mode */
rf_off, /* HW/SW Radio OFF or Inactive Power Save */
/* Add the new RF state above this line===== */
rf_max
};
/* RF Off Level for IPS or HW/SW radio off */
#define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-init hw param*/
#define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW*/
#define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock
* Req in initialization.
*/
#define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R
* if no packet is RX or TX.
*/
#define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) \
((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level &= (~(_PS_FLAG)))
#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level |= _PS_FLAG)
enum _PS_BBRegBackup_ {
PSBBREG_RF0 = 0,
PSBBREG_RF1,
PSBBREG_RF2,
PSBBREG_AFE0,
PSBBREG_TOTALCNT
};
enum { /* for ips_mode */
IPS_NONE = 0,
IPS_NORMAL,
IPS_LEVEL_2,
};
struct pwrctrl_priv {
struct mutex mutex_lock;
volatile u8 rpwm; /* requested power state for fw */
volatile u8 cpwm; /* fw current power state. updated when
* 1. read from HCPWM 2. driver lowers power level
*/
volatile u8 tog; /* toggling */
volatile u8 cpwm_tog; /* toggling */
u8 pwr_mode;
u8 smart_ps;
u8 bcn_ant_mode;
u32 alives;
struct work_struct cpwm_event;
u8 bpower_saving;
u8 b_hw_radio_off;
u8 reg_rfoff;
u8 reg_pdnmode; /* powerdown mode */
u32 rfoff_reason;
/* RF OFF Level */
u32 cur_ps_level;
u32 reg_rfps_level;
uint ips_enter_cnts;
uint ips_leave_cnts;
u8 ips_mode;
u8 ips_mode_req; /* used to accept the mode setting request,
* will update to ipsmode later
*/
uint bips_processing;
unsigned long ips_deny_time; /* will deny IPS when system time less than this */
u8 ps_processing; /* temp used to mark whether in rtw_ps_processor */
bool bLeisurePs;
u8 LpsIdleCount;
u8 power_mgnt;
u32 DelayLPSLastTimeStamp;
u8 btcoex_rfon;
s32 pnp_current_pwr_state;
u8 pnp_bstop_trx;
u8 bInternalAutoSuspend;
u8 bInSuspend;
u8 bSupportRemoteWakeup;
struct timer_list pwr_state_check_timer;
int pwr_state_check_interval;
u8 pwr_state_check_cnts;
int ps_flag;
enum rt_rf_power_state rf_pwrstate;/* cur power state */
enum rt_rf_power_state change_rfpwrstate;
u8 wepkeymask;
u8 bHWPowerdown;/* if support hw power down */
u8 bHWPwrPindetect;
u8 bkeepfwalive;
u8 brfoffbyhw;
unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
};
#define rtw_get_ips_mode_req(pwrctrlpriv) \
(pwrctrlpriv)->ips_mode_req
#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \
((pwrctrlpriv)->ips_mode_req = (ips_mode))
#define RTW_PWR_STATE_CHK_INTERVAL 2000
#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
mod_timer(&pwrctrlpriv->pwr_state_check_timer, \
jiffies + msecs_to_jiffies(ms))
#define rtw_set_pwr_state_check_timer(pwrctrl) \
_rtw_set_pwr_state_check_timer((pwrctrl), \
(pwrctrl)->pwr_state_check_interval)
void rtw_init_pwrctrl_priv(struct adapter *adapter);
void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps,
u8 bcn_ant_mode);
void rtw_set_rpwm(struct adapter *adapter, u8 val8);
void LeaveAllPowerSaveMode(struct adapter *adapter);
void ips_enter(struct adapter *padapter);
int ips_leave(struct adapter *padapter);
void rtw_ps_processor(struct adapter *padapter);
enum rt_rf_power_state RfOnOffDetect(struct adapter *iadapter);
s32 LPS_RF_ON_check(struct adapter *adapter, u32 delay_ms);
void LPS_Enter(struct adapter *adapter);
void LPS_Leave(struct adapter *adapter);
int _rtw_pwr_wakeup(struct adapter *adapter, u32 ips_defer_ms,
const char *caller);
#define rtw_pwr_wakeup(adapter) \
_rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__)
#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) \
_rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__)
int rtw_pm_set_ips(struct adapter *adapter, u8 mode);
int rtw_pm_set_lps(struct adapter *adapter, u8 mode);
#endif /* __RTL871X_PWRCTRL_H_ */

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drivers/staging/rtl8188eu/include/rtw_recv.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _RTW_RECV_H_
#define _RTW_RECV_H_
#include <osdep_service.h>
#include <drv_types.h>
#define NR_RECVFRAME 256
#define RXFRAME_ALIGN 8
#define RXFRAME_ALIGN_SZ (1 << RXFRAME_ALIGN)
#define MAX_RXFRAME_CNT 512
#define MAX_RX_NUMBLKS (32)
#define RECVFRAME_HDR_ALIGN 128
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
#define MAX_SUBFRAME_COUNT 64
/* for Rx reordering buffer control */
struct recv_reorder_ctrl {
struct adapter *padapter;
bool enable;
u16 indicate_seq;/* wstart_b, init_value=0xffff */
u16 wend_b;
u8 wsize_b;
struct __queue pending_recvframe_queue;
struct timer_list reordering_ctrl_timer;
};
struct stainfo_rxcache {
u16 tid_rxseq[16];
/*
* unsigned short tid0_rxseq;
* unsigned short tid1_rxseq;
* unsigned short tid2_rxseq;
* unsigned short tid3_rxseq;
* unsigned short tid4_rxseq;
* unsigned short tid5_rxseq;
* unsigned short tid6_rxseq;
* unsigned short tid7_rxseq;
* unsigned short tid8_rxseq;
* unsigned short tid9_rxseq;
* unsigned short tid10_rxseq;
* unsigned short tid11_rxseq;
* unsigned short tid12_rxseq;
* unsigned short tid13_rxseq;
* unsigned short tid14_rxseq;
* unsigned short tid15_rxseq;
*/
};
struct signal_stat {
u8 update_req; /* used to indicate */
u8 avg_val; /* avg of valid elements */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
#define MAX_PATH_NUM_92CS 3
struct phy_info {
u8 RxPWDBAll;
u8 SignalQuality; /* in 0-100 index. */
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
s8 RxPower; /* in dBm Translate from PWdB */
/* Real power in dBm for this packet, no beautification and aggregation.
* Keep this raw info to be used for the other procedures.
*/
s8 recvpower;
u8 BTRxRSSIPercentage;
u8 SignalStrength; /* in 0-100 index. */
u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
};
struct rx_pkt_attrib {
u16 pkt_len;
u8 physt;
u8 drvinfo_sz;
u8 shift_sz;
u8 hdrlen; /* the WLAN Header Len */
u8 to_fr_ds;
u8 amsdu;
u8 qos;
u8 priority;
u8 pw_save;
u8 mdata;
u16 seq_num;
u8 frag_num;
u8 mfrag;
u8 order;
u8 privacy; /* in frame_ctrl field */
u8 bdecrypted;
u8 encrypt; /* when 0 indicate no encrypt. when non-zero,
* indicate the encrypt algorithm
*/
u8 iv_len;
u8 icv_len;
u8 crc_err;
u8 icv_err;
u16 eth_type;
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 bssid[ETH_ALEN];
u8 ack_policy;
u8 key_index;
u8 mcs_rate;
u8 rxht;
u8 sgi;
u8 pkt_rpt_type;
u32 MacIDValidEntry[2]; /* 64 bits present 64 entry. */
struct phy_info phy_info;
};
/* These definition is used for Rx packet reordering. */
#define SN_LESS(a, b) (((a - b) & 0x800) != 0)
#define SN_EQUAL(a, b) (a == b)
#define REORDER_WAIT_TIME (50) /* (ms) */
#define RXDESC_SIZE 24
#define RXDESC_OFFSET RXDESC_SIZE
struct recv_stat {
__le32 rxdw0;
__le32 rxdw1;
__le32 rxdw2;
__le32 rxdw3;
__le32 rxdw4;
__le32 rxdw5;
};
/*
* accesser of recv_priv: rtw_recv_entry(dispatch / passive level);
* recv_thread(passive) ; returnpkt(dispatch)
* ; halt(passive) ;
*
* using enter_critical section to protect
*/
struct recv_priv {
struct __queue free_recv_queue;
struct __queue recv_pending_queue;
struct __queue uc_swdec_pending_queue;
void *pallocated_frame_buf;
struct adapter *adapter;
u32 bIsAnyNonBEPkts;
u64 rx_bytes;
u64 rx_pkts;
u64 rx_drop;
u64 last_rx_bytes;
struct tasklet_struct irq_prepare_beacon_tasklet;
struct tasklet_struct recv_tasklet;
struct sk_buff_head free_recv_skb_queue;
struct sk_buff_head rx_skb_queue;
struct recv_buf *precv_buf; /* 4 alignment */
struct __queue free_recv_buf_queue;
/* For display the phy information */
s8 rssi;
s8 rxpwdb;
u8 signal_strength;
u8 signal_qual;
u8 noise;
s8 RxRssi[2];
struct timer_list signal_stat_timer;
u32 signal_stat_sampling_interval;
struct signal_stat signal_qual_data;
struct signal_stat signal_strength_data;
};
#define rtw_set_signal_stat_timer(recvpriv) \
mod_timer(&(recvpriv)->signal_stat_timer, jiffies + \
msecs_to_jiffies((recvpriv)->signal_stat_sampling_interval))
struct sta_recv_priv {
spinlock_t lock;
int option;
struct __queue defrag_q; /* keeping the fragment frame until defrag */
struct stainfo_rxcache rxcache;
};
struct recv_buf {
struct adapter *adapter;
struct urb *purb;
struct sk_buff *pskb;
u8 reuse;
};
/*
* head ----->
*
* data ----->
*
* payload
*
* tail ----->
*
*
* end ----->
*
* len = (unsigned int )(tail - data);
*
*/
struct recv_frame {
struct list_head list;
struct sk_buff *pkt;
struct adapter *adapter;
struct rx_pkt_attrib attrib;
struct sta_info *psta;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl *preorder_ctrl;
};
struct recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
struct recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
void rtw_init_recvframe(struct recv_frame *precvframe,
struct recv_priv *precvpriv);
void rtw_free_recvframe(struct recv_frame *precvframe, struct __queue *pfree_recv_queue);
#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue)
int _rtw_enqueue_recvframe(struct recv_frame *precvframe,
struct __queue *queue);
int rtw_enqueue_recvframe(struct recv_frame *precvframe, struct __queue *queue);
void rtw_free_recvframe_queue(struct __queue *pframequeue,
struct __queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter);
void rtw_reordering_ctrl_timeout_handler(struct timer_list *t);
static inline s32 translate_percentage_to_dbm(u32 sig_stren_index)
{
s32 power; /* in dBm. */
/* Translate to dBm (x=0.5y-95). */
power = (s32)((sig_stren_index + 1) >> 1);
power -= 95;
return power;
}
struct sta_info;
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
void mgt_dispatcher(struct adapter *padapter, struct recv_frame *precv_frame);
#endif

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drivers/staging/rtl8188eu/include/rtw_rf.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_RF_H_
#define __RTW_RF_H_
#include <rtw_cmd.h>
#define OFDM_PHY 1
#define MIXED_PHY 2
#define CCK_PHY 3
#define NumRates (13)
/* slot time for 11g */
#define SHORT_SLOT_TIME 9
#define NON_SHORT_SLOT_TIME 20
/* We now define the following channels as the max channels in each
* channel plan.
*/
/* 2G, total 14 chnls */
/* {1,2,3,4,5,6,7,8,9,10,11,12,13,14} */
#define MAX_CHANNEL_NUM_2G 14
#define MAX_CHANNEL_NUM 14 /* 2.4 GHz only */
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
struct regulatory_class {
u32 starting_freq; /* MHz, */
u8 channel_set[MAX_CHANNEL_NUM];
u8 channel_cck_power[MAX_CHANNEL_NUM]; /* dbm */
u8 channel_ofdm_power[MAX_CHANNEL_NUM]; /* dbm */
u8 txpower_limit; /* dbm */
u8 channel_spacing; /* MHz */
u8 modem;
};
enum capability {
cESS = 0x0001,
cIBSS = 0x0002,
cPollable = 0x0004,
cPollReq = 0x0008,
cPrivacy = 0x0010,
cShortPreamble = 0x0020,
cPBCC = 0x0040,
cChannelAgility = 0x0080,
cSpectrumMgnt = 0x0100,
cQos = 0x0200, /* For HCCA, use with CF-Pollable
* and CF-PollReq
*/
cShortSlotTime = 0x0400,
cAPSD = 0x0800,
cRM = 0x1000, /* RRM (Radio Request Measurement) */
cDSSS_OFDM = 0x2000,
cDelayedBA = 0x4000,
cImmediateBA = 0x8000,
};
enum _REG_PREAMBLE_MODE {
PREAMBLE_LONG = 1,
PREAMBLE_AUTO = 2,
PREAMBLE_SHORT = 3,
};
enum rf90_radio_path {
RF90_PATH_A = 0, /* Radio Path A */
RF90_PATH_B = 1, /* Radio Path B */
RF90_PATH_C = 2, /* Radio Path C */
RF90_PATH_D = 3 /* Radio Path D */
};
/* Bandwidth Offset */
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
#define HAL_PRIME_CHNL_OFFSET_UPPER 2
/* Represent Channel Width in HT Capabilities */
/* */
enum ht_channel_width {
HT_CHANNEL_WIDTH_20 = 0,
HT_CHANNEL_WIDTH_40 = 1,
HT_CHANNEL_WIDTH_80 = 2,
HT_CHANNEL_WIDTH_160 = 3,
HT_CHANNEL_WIDTH_10 = 4,
};
/* */
/* Represent Extension Channel Offset in HT Capabilities */
/* This is available only in 40Mhz mode. */
/* */
enum ht_extchnl_offset {
HT_EXTCHNL_OFFSET_NO_EXT = 0,
HT_EXTCHNL_OFFSET_UPPER = 1,
HT_EXTCHNL_OFFSET_NO_DEF = 2,
HT_EXTCHNL_OFFSET_LOWER = 3,
};
/* 2007/11/15 MH Define different RF type. */
enum rt_rf_type_def {
RF_1T2R = 0,
RF_2T4R = 1,
RF_2T2R = 2,
RF_1T1R = 3,
RF_2T2R_GREEN = 4,
RF_819X_MAX_TYPE = 5,
};
u32 rtw_ch2freq(u32 ch);
#endif /* _RTL8711_RF_H_ */

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drivers/staging/rtl8188eu/include/rtw_security.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_SECURITY_H_
#define __RTW_SECURITY_H_
#include <osdep_service.h>
#include <drv_types.h>
#define _NO_PRIVACY_ 0x0
#define _WEP40_ 0x1
#define _TKIP_ 0x2
#define _TKIP_WTMIC_ 0x3
#define _AES_ 0x4
#define _WEP104_ 0x5
#define _WEP_WPA_MIXED_ 0x07 /* WEP + WPA */
#define _SMS4_ 0x06
#define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_))
#define SHA256_MAC_LEN 32
#define AES_BLOCK_SIZE 16
#define AES_PRIV_SIZE (4 * 44)
enum {
ENCRYP_PROTOCOL_OPENSYS, /* open system */
ENCRYP_PROTOCOL_WEP, /* WEP */
ENCRYP_PROTOCOL_WPA, /* WPA */
ENCRYP_PROTOCOL_WPA2, /* WPA2 */
ENCRYP_PROTOCOL_WAPI, /* WAPI: Not support in this version */
ENCRYP_PROTOCOL_MAX
};
#ifndef Ndis802_11AuthModeWPA2
#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1)
#endif
#ifndef Ndis802_11AuthModeWPA2PSK
#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2)
#endif
union pn48 {
u64 val;
#ifdef __LITTLE_ENDIAN
struct {
u8 TSC0;
u8 TSC1;
u8 TSC2;
u8 TSC3;
u8 TSC4;
u8 TSC5;
u8 TSC6;
u8 TSC7;
} _byte_;
#elif defined(__BIG_ENDIAN)
struct {
u8 TSC7;
u8 TSC6;
u8 TSC5;
u8 TSC4;
u8 TSC3;
u8 TSC2;
u8 TSC1;
u8 TSC0;
} _byte_;
#endif
};
union Keytype {
u8 skey[16];
u32 lkey[4];
};
struct rt_pmkid_list {
u8 used;
u8 bssid[ETH_ALEN];
u8 PMKID[16];
u8 SsidBuf[33];
u8 *ssid_octet;
u16 ssid_length;
};
struct security_priv {
u32 dot11AuthAlgrthm; /* 802.11 auth, could be open,
* shared, 8021x and authswitch
*/
u32 dot11PrivacyAlgrthm; /* This specify the privacy for
* shared auth. algorithm.
*/
/* WEP */
u32 dot11PrivacyKeyIndex; /* this is only valid for legendary
* wep, 0~3 for key id.(tx key index)
*/
union Keytype dot11DefKey[4]; /* this is only valid for def. key */
u32 dot11DefKeylen[4];
u32 dot118021XGrpPrivacy; /* This specify the privacy algthm.
* used for Grp key
*/
u32 dot118021XGrpKeyid; /* key id used for Grp Key
* ( tx key index)
*/
union Keytype dot118021XGrpKey[4]; /* 802.1x Group Key,
* for inx0 and inx1
*/
union Keytype dot118021XGrptxmickey[4];
union Keytype dot118021XGrprxmickey[4];
union pn48 dot11Grptxpn; /* PN48 used for Grp Key xmit.*/
union pn48 dot11Grprxpn; /* PN48 used for Grp Key recv.*/
#ifdef CONFIG_88EU_AP_MODE
/* extend security capabilities for AP_MODE */
unsigned int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
unsigned int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
unsigned int wpa_group_cipher;
unsigned int wpa2_group_cipher;
unsigned int wpa_pairwise_cipher;
unsigned int wpa2_pairwise_cipher;
#endif
u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */
int wps_ie_len;
u8 binstallGrpkey;
u8 busetkipkey;
u8 bcheck_grpkey;
u8 bgrpkey_handshake;
s32 hw_decrypted;/* if the rx packets is hw_decrypted==false,i
* it means the hw has not been ready.
*/
/* keeps the auth_type & enc_status from upper layer
* ioctl(wpa_supplicant or wzc)
*/
u32 ndisauthtype; /* NDIS_802_11_AUTHENTICATION_MODE */
u32 ndisencryptstatus; /* NDIS_802_11_ENCRYPTION_STATUS */
struct wlan_bssid_ex sec_bss; /* for joinbss (h2c buffer) usage */
struct ndis_802_11_wep ndiswep;
u8 assoc_info[600];
u8 szofcapability[256]; /* for wpa2 usage */
u8 oidassociation[512]; /* for wpa/wpa2 usage */
u8 authenticator_ie[256]; /* store ap security information element */
u8 supplicant_ie[256]; /* store sta security information element */
/* for tkip countermeasure */
u32 last_mic_err_time;
u8 btkip_countermeasure;
u8 btkip_wait_report;
u32 btkip_countermeasure_time;
/* */
/* For WPA2 Pre-Authentication. */
/* */
struct rt_pmkid_list PMKIDList[NUM_PMKID_CACHE];
u8 PMKIDIndex;
u8 bWepDefaultKeyIdxSet;
};
#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst) \
do { \
switch (psecuritypriv->dot11AuthAlgrthm) { \
case dot11AuthAlgrthm_Open: \
case dot11AuthAlgrthm_Shared: \
case dot11AuthAlgrthm_Auto: \
encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm; \
break; \
case dot11AuthAlgrthm_8021X: \
if (bmcst) \
encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\
else \
encry_algo = (u8)psta->dot118021XPrivacy; \
break; \
case dot11AuthAlgrthm_WAPI: \
encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm; \
break; \
} \
} while (0)
#define SET_ICE_IV_LEN(iv_len, icv_len, encrypt) \
do { \
switch (encrypt) { \
case _WEP40_: \
case _WEP104_: \
iv_len = 4; \
icv_len = 4; \
break; \
case _TKIP_: \
iv_len = 8; \
icv_len = 4; \
break; \
case _AES_: \
iv_len = 8; \
icv_len = 8; \
break; \
case _SMS4_: \
iv_len = 18; \
icv_len = 16; \
break; \
default: \
iv_len = 0; \
icv_len = 0; \
break; \
} \
} while (0)
#define GET_TKIP_PN(iv, dot11txpn) \
do { \
dot11txpn._byte_.TSC0 = iv[2]; \
dot11txpn._byte_.TSC1 = iv[0]; \
dot11txpn._byte_.TSC2 = iv[4]; \
dot11txpn._byte_.TSC3 = iv[5]; \
dot11txpn._byte_.TSC4 = iv[6]; \
dot11txpn._byte_.TSC5 = iv[7]; \
} while (0)
#define ROL32(A, n) (((A) << (n)) | (((A) >> (32 - (n))) & ((1UL << (n)) - 1)))
#define ROR32(A, n) ROL32((A), 32 - (n))
struct mic_data {
u32 K0, K1; /* Key */
u32 L, R; /* Current state */
u32 M; /* Message accumulator (single word) */
u32 nBytesInM; /* # bytes in M */
};
void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key);
void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b);
void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nBytes);
void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst);
void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len,
u8 *Miccode, u8 priority);
u32 rtw_aes_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe);
u32 rtw_tkip_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe);
void rtw_wep_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe);
u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe);
u32 rtw_tkip_decrypt(struct adapter *padapter, struct recv_frame *precvframe);
int rtw_wep_decrypt(struct adapter *padapter, struct recv_frame *precvframe);
#endif /* __RTL871X_SECURITY_H_ */

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drivers/staging/rtl8188eu/include/rtw_sreset.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _RTW_SRESET_C_
#define _RTW_SRESET_C_
#include <osdep_service.h>
#include <drv_types.h>
struct sreset_priv {
u8 wifi_error_status;
};
#include <rtl8188e_hal.h>
#define WIFI_STATUS_SUCCESS 0
#define USB_VEN_REQ_CMD_FAIL BIT(0)
#define USB_READ_PORT_FAIL BIT(1)
#define USB_WRITE_PORT_FAIL BIT(2)
#define WIFI_MAC_TXDMA_ERROR BIT(3)
#define WIFI_TX_HANG BIT(4)
#define WIFI_RX_HANG BIT(5)
#define WIFI_IF_NOT_EXIST BIT(6)
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status);
#endif

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drivers/staging/rtl8188eu/include/rtw_xmit.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _RTW_XMIT_H_
#define _RTW_XMIT_H_
#include <osdep_service.h>
#include <drv_types.h>
#define MAX_XMITBUF_SZ (20480) /* 20k */
#define NR_XMITBUFF (4)
#define XMITBUF_ALIGN_SZ 4
/* xmit extension buff defination */
#define MAX_XMIT_EXTBUF_SZ (1536)
#define NR_XMIT_EXTBUFF (32)
#define MAX_NUMBLKS (1)
#define XMIT_VO_QUEUE (0)
#define XMIT_VI_QUEUE (1)
#define XMIT_BE_QUEUE (2)
#define XMIT_BK_QUEUE (3)
#define VO_QUEUE_INX 0
#define VI_QUEUE_INX 1
#define BE_QUEUE_INX 2
#define BK_QUEUE_INX 3
#define BCN_QUEUE_INX 4
#define MGT_QUEUE_INX 5
#define HIGH_QUEUE_INX 6
#define TXCMD_QUEUE_INX 7
#define HW_QUEUE_ENTRY 8
#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
do {\
pattrib_iv[0] = dot11txpn._byte_.TSC0;\
pattrib_iv[1] = dot11txpn._byte_.TSC1;\
pattrib_iv[2] = dot11txpn._byte_.TSC2;\
pattrib_iv[3] = ((keyidx & 0x3) << 6);\
dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\
} while (0)
#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
do {\
pattrib_iv[0] = dot11txpn._byte_.TSC1;\
pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\
pattrib_iv[2] = dot11txpn._byte_.TSC0;\
pattrib_iv[3] = BIT(5) | ((keyidx & 0x3) << 6);\
pattrib_iv[4] = dot11txpn._byte_.TSC2;\
pattrib_iv[5] = dot11txpn._byte_.TSC3;\
pattrib_iv[6] = dot11txpn._byte_.TSC4;\
pattrib_iv[7] = dot11txpn._byte_.TSC5;\
dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
} while (0)
#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
do { \
pattrib_iv[0] = dot11txpn._byte_.TSC0; \
pattrib_iv[1] = dot11txpn._byte_.TSC1; \
pattrib_iv[2] = 0; \
pattrib_iv[3] = BIT(5) | ((keyidx & 0x3) << 6); \
pattrib_iv[4] = dot11txpn._byte_.TSC2; \
pattrib_iv[5] = dot11txpn._byte_.TSC3; \
pattrib_iv[6] = dot11txpn._byte_.TSC4; \
pattrib_iv[7] = dot11txpn._byte_.TSC5; \
dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
} while (0)
#define HWXMIT_ENTRY 4
#define TXDESC_SIZE 32
#define PACKET_OFFSET_SZ (8)
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
struct tx_desc {
/* DWORD 0 */
__le32 txdw0;
__le32 txdw1;
__le32 txdw2;
__le32 txdw3;
__le32 txdw4;
__le32 txdw5;
__le32 txdw6;
__le32 txdw7;
};
struct hw_xmit {
struct __queue *sta_queue;
int accnt;
};
/* reduce size */
struct pkt_attrib {
u8 type;
u8 subtype;
u8 bswenc;
u8 dhcp_pkt;
u16 ether_type;
u16 seqnum;
u16 hdrlen; /* the WLAN Header Len */
u32 pktlen; /* the original 802.3 pkt raw_data len (not include
* ether_hdr data)
*/
u32 last_txcmdsz;
u8 nr_frags;
u8 encrypt; /* when 0 indicate no encrypt. when non-zero,
* indicate the encrypt algorithm
*/
u8 iv_len;
u8 icv_len;
u8 iv[18];
u8 icv[16];
u8 priority;
u8 ack_policy;
u8 mac_id;
u8 vcs_mode; /* virtual carrier sense method */
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 key_idx;
u8 qos_en;
u8 ht_en;
u8 raid;/* rate adpative id */
u8 bwmode;
u8 ch_offset;/* PRIME_CHNL_OFFSET */
u8 sgi;/* short GI */
u8 ampdu_en;/* tx ampdu enable */
u8 mdata;/* more data bit */
u8 pctrl;/* per packet txdesc control enable */
u8 triggered;/* for ap mode handling Power Saving sta */
u8 qsel;
u8 eosp;
u8 rate;
u8 intel_proxim;
u8 retry_ctrl;
struct sta_info *psta;
};
#define WLANHDR_OFFSET 64
#define NULL_FRAMETAG (0x0)
#define DATA_FRAMETAG 0x01
#define L2_FRAMETAG 0x02
#define MGNT_FRAMETAG 0x03
#define AMSDU_FRAMETAG 0x04
#define EII_FRAMETAG 0x05
#define IEEE8023_FRAMETAG 0x06
#define MP_FRAMETAG 0x07
#define TXAGG_FRAMETAG 0x08
struct submit_ctx {
u32 submit_time; /* */
u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */
int status; /* status for operation */
struct completion done;
};
enum {
RTW_SCTX_SUBMITTED = -1,
RTW_SCTX_DONE_SUCCESS = 0,
RTW_SCTX_DONE_UNKNOWN,
RTW_SCTX_DONE_TIMEOUT,
RTW_SCTX_DONE_BUF_ALLOC,
RTW_SCTX_DONE_BUF_FREE,
RTW_SCTX_DONE_WRITE_PORT_ERR,
RTW_SCTX_DONE_TX_DESC_NA,
RTW_SCTX_DONE_TX_DENY,
RTW_SCTX_DONE_CCX_PKT_FAIL,
RTW_SCTX_DONE_DRV_STOP,
RTW_SCTX_DONE_DEV_REMOVE,
};
void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms);
int rtw_sctx_wait(struct submit_ctx *sctx);
void rtw_sctx_done_err(struct submit_ctx **sctx, int status);
struct xmit_buf {
struct list_head list;
struct adapter *padapter;
u8 *pallocated_buf;
u8 *pbuf;
void *priv_data;
u16 ext_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf. */
u16 flags;
u32 len;
struct submit_ctx *sctx;
struct urb *pxmit_urb[8];
};
struct xmit_frame {
struct list_head list;
struct pkt_attrib attrib;
struct sk_buff *pkt;
int frame_tag;
struct adapter *padapter;
u8 *buf_addr;
struct xmit_buf *pxmitbuf;
u8 agg_num;
s8 pkt_offset;
u8 ack_report;
};
struct tx_servq {
struct list_head tx_pending;
struct __queue sta_pending;
int qcnt;
};
struct sta_xmit_priv {
spinlock_t lock;
int option;
int apsd_setting; /* When bit mask is on, the associated edca
* queue supports APSD.
*/
struct tx_servq be_q; /* priority == 0,3 */
struct tx_servq bk_q; /* priority == 1,2 */
struct tx_servq vi_q; /* priority == 4,5 */
struct tx_servq vo_q; /* priority == 6,7 */
struct list_head legacy_dz;
struct list_head apsd;
u16 txseq_tid[16];
};
struct hw_txqueue {
volatile int head;
volatile int tail;
volatile int free_sz; /* in units of 64 bytes */
volatile int free_cmdsz;
volatile int txsz[8];
uint ff_hwaddr;
uint cmd_hwaddr;
int ac_tag;
};
struct xmit_priv {
spinlock_t lock;
struct __queue be_pending;
struct __queue bk_pending;
struct __queue vi_pending;
struct __queue vo_pending;
struct __queue bm_pending;
u8 *pallocated_frame_buf;
u8 *pxmit_frame_buf;
uint free_xmitframe_cnt;
struct __queue free_xmit_queue;
uint frag_len;
struct adapter *adapter;
u8 vcs_setting;
u8 vcs;
u8 vcs_type;
u64 tx_bytes;
u64 tx_pkts;
u64 tx_drop;
u64 last_tx_bytes;
u64 last_tx_pkts;
struct hw_xmit *hwxmits;
u8 hwxmit_entry;
u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength
* from large to small. it's value is 0->vo,
* 1->vi, 2->be, 3->bk.
*/
u8 txirp_cnt;/* */
struct tasklet_struct xmit_tasklet;
/* per AC pending irp */
int beq_cnt;
int bkq_cnt;
int viq_cnt;
int voq_cnt;
struct __queue free_xmitbuf_queue;
struct __queue pending_xmitbuf_queue;
u8 *pallocated_xmitbuf;
u8 *pxmitbuf;
uint free_xmitbuf_cnt;
struct __queue free_xmit_extbuf_queue;
u8 *pallocated_xmit_extbuf;
u8 *pxmit_extbuf;
uint free_xmit_extbuf_cnt;
u16 nqos_ssn;
int ack_tx;
struct mutex ack_tx_mutex;
struct submit_ctx ack_tx_ops;
};
struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv);
s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv,
struct xmit_buf *pxmitbuf);
struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv);
s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv,
struct xmit_buf *pxmitbuf);
void rtw_count_tx_stats(struct adapter *padapter,
struct xmit_frame *pxmitframe, int sz);
void rtw_update_protection(struct adapter *padapter, u8 *ie, uint ie_len);
s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr,
struct pkt_attrib *pattrib);
s32 rtw_put_snap(u8 *data, u16 h_proto);
struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv);
s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv,
struct xmit_frame *pxmitframe);
void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv,
struct __queue *pframequeue);
struct tx_servq *rtw_get_sta_pending(struct adapter *padapter,
struct sta_info *psta, int up, u8 *ac);
s32 rtw_xmitframe_enqueue(struct adapter *padapter,
struct xmit_frame *pxmitframe);
struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv,
struct hw_xmit *phwxmit_i, int entry);
s32 rtw_xmit_classifier(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 rtw_xmitframe_coalesce(struct adapter *padapter, struct sk_buff *pkt,
struct xmit_frame *pxmitframe);
s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag);
void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv);
s32 rtw_txframes_pending(struct adapter *padapter);
s32 rtw_txframes_sta_ac_pending(struct adapter *padapter,
struct pkt_attrib *pattrib);
void rtw_init_hwxmits(struct hw_xmit *phwxmit, int entry);
s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter);
void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv);
s32 rtw_alloc_hwxmits(struct adapter *padapter);
void rtw_free_hwxmits(struct adapter *padapter);
s32 rtw_xmit(struct adapter *padapter, struct sk_buff **pkt);
#if defined(CONFIG_88EU_AP_MODE)
int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_frame *pxmitframe);
void stop_sta_xmit(struct adapter *padapter, struct sta_info *psta);
void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta);
void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *psta);
#endif
u8 qos_acm(u8 acm_mask, u8 priority);
u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe);
int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);
/* include after declaring struct xmit_buf, in order to avoid warning */
#include <xmit_osdep.h>
#endif /* _RTL871X_XMIT_H_ */

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drivers/staging/rtl8188eu/include/sta_info.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __STA_INFO_H_
#define __STA_INFO_H_
#include <osdep_service.h>
#include <drv_types.h>
#include <wifi.h>
#define IBSS_START_MAC_ID 2
#define NUM_STA 32
#define NUM_ACL 16
/* if mode ==0, then the sta is allowed once the addr is hit. */
/* if mode ==1, then the sta is rejected once the addr is non-hit. */
struct rtw_wlan_acl_node {
struct list_head list;
u8 addr[ETH_ALEN];
u8 valid;
};
/* mode=0, disable */
/* mode=1, accept unless in deny list */
/* mode=2, deny unless in accept list */
struct wlan_acl_pool {
int mode;
int num;
struct rtw_wlan_acl_node aclnode[NUM_ACL];
struct __queue acl_node_q;
};
struct rssi_sta {
s32 UndecoratedSmoothedPWDB;
s32 UndecoratedSmoothedCCK;
s32 UndecoratedSmoothedOFDM;
u64 PacketMap;
u8 ValidBit;
};
struct stainfo_stats {
u64 rx_mgnt_pkts;
u64 rx_beacon_pkts;
u64 rx_probereq_pkts;
u64 rx_probersp_pkts;
u64 rx_probersp_bm_pkts;
u64 rx_probersp_uo_pkts;
u64 rx_ctrl_pkts;
u64 rx_data_pkts;
u64 last_rx_mgnt_pkts;
u64 last_rx_beacon_pkts;
u64 last_rx_probereq_pkts;
u64 last_rx_probersp_pkts;
u64 last_rx_probersp_bm_pkts;
u64 last_rx_probersp_uo_pkts;
u64 last_rx_ctrl_pkts;
u64 last_rx_data_pkts;
u64 rx_bytes;
u64 rx_drops;
u64 tx_pkts;
u64 tx_bytes;
u64 tx_drops;
};
struct sta_info {
spinlock_t lock;
struct list_head list; /* free_sta_queue */
struct list_head hash_list; /* sta_hash */
struct sta_xmit_priv sta_xmitpriv;
struct sta_recv_priv sta_recvpriv;
struct __queue sleep_q;
unsigned int sleepq_len;
uint state;
uint aid;
uint mac_id;
uint qos_option;
u8 hwaddr[ETH_ALEN];
uint ieee8021x_blocked; /* 0: allowed, 1:blocked */
uint dot118021XPrivacy; /* aes, tkip... */
union Keytype dot11tkiptxmickey;
union Keytype dot11tkiprxmickey;
union Keytype dot118021x_UncstKey;
union pn48 dot11txpn; /* PN48 used for Unicast xmit. */
union pn48 dot11rxpn; /* PN48 used for Unicast recv. */
u8 bssrateset[16];
u32 bssratelen;
s32 rssi;
s32 signal_quality;
u8 cts2self;
u8 rtsen;
u8 raid;
u8 init_rate;
u8 wireless_mode; /* NETWORK_TYPE */
struct stainfo_stats sta_stats;
/* for A-MPDU TX, ADDBA timeout check */
struct timer_list addba_retry_timer;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl recvreorder_ctrl[16];
/* for A-MPDU Tx */
/* unsigned char ampdu_txen_bitmap; */
u16 BA_starting_seqctrl[16];
struct ht_priv htpriv;
/* Notes: */
/* STA_Mode: */
/* curr_network(mlme_priv/security_priv/qos/ht) +
* sta_info: (STA & AP) CAP/INFO
*/
/* scan_q: AP CAP/INFO */
/* AP_Mode: */
/* curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO */
/* sta_info: (AP & STA) CAP/INFO */
struct list_head asoc_list;
#ifdef CONFIG_88EU_AP_MODE
struct list_head auth_list;
unsigned int expire_to;
unsigned int auth_seq;
unsigned int authalg;
unsigned char chg_txt[128];
u16 capability;
int flags;
int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
int wpa_group_cipher;
int wpa2_group_cipher;
int wpa_pairwise_cipher;
int wpa2_pairwise_cipher;
u8 bpairwise_key_installed;
u8 wpa_ie[32];
u8 nonerp_set;
u8 no_short_slot_time_set;
u8 no_short_preamble_set;
u8 no_ht_gf_set;
u8 no_ht_set;
u8 ht_20mhz_set;
unsigned int tx_ra_bitmap;
u8 qos_info;
u8 max_sp_len;
u8 uapsd_bk;/* BIT(0): Delivery enabled, BIT(1): Trigger enabled */
u8 uapsd_be;
u8 uapsd_vi;
u8 uapsd_vo;
u8 has_legacy_ac;
unsigned int sleepq_ac_len;
#endif /* CONFIG_88EU_AP_MODE */
u8 under_exist_checking;
u8 keep_alive_trycnt;
/* for DM */
struct rssi_sta rssi_stat;
/* ================ODM Relative Info======================= */
/* Please be careful, don't declare too much structure here.
* It will cost memory * STA support num.
*/
/* 2011/10/20 MH Add for ODM STA info. */
/* Driver Write */
u8 bValid; /* record the sta status link or not? */
u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
u8 rssi_level; /* for Refresh RA mask */
/* ODM Write */
/* 1 PHY_STATUS_INFO */
u8 RSSI_Path[4]; /* */
u8 RSSI_Ave;
u8 RXEVM[4];
u8 RXSNR[4];
/* ================ODM Relative Info======================= */
/* */
/* To store the sequence number of received management frame */
u16 RxMgmtFrameSeqNum;
};
#define sta_rx_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts \
+ sta->sta_stats.rx_ctrl_pkts \
+ sta->sta_stats.rx_data_pkts)
#define sta_last_rx_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts \
+ sta->sta_stats.last_rx_ctrl_pkts \
+ sta->sta_stats.last_rx_data_pkts)
#define sta_rx_data_pkts(sta) \
(sta->sta_stats.rx_data_pkts)
#define sta_last_rx_data_pkts(sta) \
(sta->sta_stats.last_rx_data_pkts)
#define sta_rx_mgnt_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts)
#define sta_last_rx_mgnt_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts)
#define sta_rx_beacon_pkts(sta) \
(sta->sta_stats.rx_beacon_pkts)
#define sta_last_rx_beacon_pkts(sta) \
(sta->sta_stats.last_rx_beacon_pkts)
#define sta_rx_probereq_pkts(sta) \
(sta->sta_stats.rx_probereq_pkts)
#define sta_last_rx_probereq_pkts(sta) \
(sta->sta_stats.last_rx_probereq_pkts)
#define sta_rx_probersp_pkts(sta) \
(sta->sta_stats.rx_probersp_pkts)
#define sta_last_rx_probersp_pkts(sta) \
(sta->sta_stats.last_rx_probersp_pkts)
#define sta_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.rx_probersp_bm_pkts)
#define sta_last_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.last_rx_probersp_bm_pkts)
#define sta_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.rx_probersp_uo_pkts)
#define sta_last_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.last_rx_probersp_uo_pkts)
#define sta_update_last_rx_pkts(sta) \
do { \
sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \
sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \
sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \
sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \
sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \
sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \
sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \
sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \
} while (0)
#define STA_RX_PKTS_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts
#define STA_LAST_RX_PKTS_ARG(sta) \
sta->sta_stats.last_rx_mgnt_pkts \
, sta->sta_stats.last_rx_ctrl_pkts \
, sta->sta_stats.last_rx_data_pkts
#define STA_RX_PKTS_DIFF_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts
#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)"
struct sta_priv {
u8 *pallocated_stainfo_buf;
u8 *pstainfo_buf;
struct __queue free_sta_queue;
spinlock_t sta_hash_lock;
struct list_head sta_hash[NUM_STA];
int asoc_sta_count;
struct __queue sleep_q;
struct __queue wakeup_q;
struct adapter *padapter;
spinlock_t asoc_list_lock;
struct list_head asoc_list;
#ifdef CONFIG_88EU_AP_MODE
struct list_head auth_list;
spinlock_t auth_list_lock;
u8 asoc_list_cnt;
u8 auth_list_cnt;
unsigned int auth_to; /* sec, time to expire in authenticating. */
unsigned int assoc_to; /* sec, time to expire before associating. */
unsigned int expire_to; /* sec , time to expire after associated. */
/* pointers to STA info; based on allocated AID or NULL if AID free
* AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1
* and so on
*/
struct sta_info *sta_aid[NUM_STA];
u16 sta_dz_bitmap;/* only support 15 stations, station aid bitmap
* for sleeping sta.
*/
u16 tim_bitmap; /* only support 15 stations, aid=0~15 mapping
* bit0~bit15
*/
u16 max_num_sta;
struct wlan_acl_pool acl_list;
#endif
};
static inline u32 wifi_mac_hash(u8 *mac)
{
u32 x;
x = mac[0];
x = (x << 2) ^ mac[1];
x = (x << 2) ^ mac[2];
x = (x << 2) ^ mac[3];
x = (x << 2) ^ mac[4];
x = (x << 2) ^ mac[5];
x ^= x >> 8;
x = x & (NUM_STA - 1);
return x;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv);
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv);
#define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0)
int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta);
struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int off);
struct sta_info *rtw_alloc_stainfo(struct sta_priv *stapriv, u8 *hwaddr);
u32 rtw_free_stainfo(struct adapter *adapt, struct sta_info *psta);
void rtw_free_all_stainfo(struct adapter *adapt);
struct sta_info *rtw_get_stainfo(struct sta_priv *stapriv, u8 *hwaddr);
u32 rtw_init_bcmc_stainfo(struct adapter *adapt);
struct sta_info *rtw_get_bcmc_stainfo(struct adapter *padapter);
bool rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr);
#endif /* _STA_INFO_H_ */

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drivers/staging/rtl8188eu/include/usb_ops_linux.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __USB_OPS_LINUX_H__
#define __USB_OPS_LINUX_H__
#define USB_HIGH_SPEED_BULK_SIZE 512
#define USB_FULL_SPEED_BULK_SIZE 64
u8 usb_read8(struct adapter *adapter, u32 addr);
u16 usb_read16(struct adapter *adapter, u32 addr);
u32 usb_read32(struct adapter *adapter, u32 addr);
u32 usb_read_port(struct adapter *adapter, u32 addr, struct recv_buf *precvbuf);
int usb_write8(struct adapter *adapter, u32 addr, u8 val);
int usb_write16(struct adapter *adapter, u32 addr, u16 val);
int usb_write32(struct adapter *adapter, u32 addr, u32 val);
u32 usb_write_port(struct adapter *adapter, u32 addr, u32 cnt, struct xmit_buf *pmem);
void usb_write_port_cancel(struct adapter *adapter);
#endif

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drivers/staging/rtl8188eu/include/wifi.h
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/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _WIFI_H_
#define _WIFI_H_
#define WLAN_HDR_A3_LEN 24
#define WLAN_HDR_A3_QOS_LEN 26
#define P80211CAPTURE_VERSION 0x80211001
/* This value is tested by WiFi 11n Test Plan 5.2.3. */
/* This test verifies the WLAN NIC can update the NAV through sending
* the CTS with large duration.
*/
#define WiFiNavUpperUs 30000 /* 30 ms */
enum WIFI_FRAME_TYPE {
WIFI_MGT_TYPE = (0),
WIFI_CTRL_TYPE = (BIT(2)),
WIFI_DATA_TYPE = (BIT(3)),
WIFI_QOS_DATA_TYPE = (BIT(7) | BIT(3)), /* QoS Data */
};
#define SetToDs(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_TODS)
#define GetToDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_TODS)) != 0)
#define ClearToDs(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_TODS))
#define SetFrDs(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_FROMDS)
#define GetFrDs(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_FROMDS)) != 0)
#define ClearFrDs(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_FROMDS))
#define get_tofr_ds(pframe) ((GetToDs(pframe) << 1) | GetFrDs(pframe))
#define SetMFrag(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)
#define GetMFrag(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) != 0)
#define ClearMFrag(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_MOREFRAGS))
#define SetRetry(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_RETRY)
#define GetRetry(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_RETRY)) != 0)
#define ClearRetry(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_RETRY))
#define SetPwrMgt(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_PM)
#define GetPwrMgt(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_PM)) != 0)
#define ClearPwrMgt(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_PM))
#define SetMData(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_MOREDATA)
#define GetMData(pbuf) (((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_MOREDATA)) != 0)
#define ClearMData(pbuf) \
*(__le16 *)(pbuf) &= (~cpu_to_le16(IEEE80211_FCTL_MOREDATA))
#define SetPrivacy(pbuf) \
*(__le16 *)(pbuf) |= cpu_to_le16(IEEE80211_FCTL_PROTECTED)
#define GetPrivacy(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_PROTECTED)) != 0)
#define GetOrder(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(IEEE80211_FCTL_ORDER)) != 0)
#define GetFrameType(pbuf) \
(le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(3) | BIT(2)))
#define GetFrameSubType(pbuf) (le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(7) |\
BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
#define SetFrameSubType(pbuf, type) \
do { \
*(__le16 *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | \
BIT(5) | BIT(4) | BIT(3) | BIT(2))); \
*(__le16 *)(pbuf) |= cpu_to_le16(type); \
} while (0)
#define GetSequence(pbuf) \
(le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 22)) >> 4)
#define GetFragNum(pbuf) \
(le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 22)) & 0x0f)
#define SetSeqNum(pbuf, num) \
do { \
*(__le16 *)((size_t)(pbuf) + 22) = \
((*(__le16 *)((size_t)(pbuf) + 22)) & cpu_to_le16((unsigned short)0x000f)) | \
cpu_to_le16((unsigned short)(0xfff0 & (num << 4))); \
} while (0)
#define SetDuration(pbuf, dur) \
*(__le16 *)((size_t)(pbuf) + 2) = cpu_to_le16(0xffff & (dur))
#define SetPriority(pbuf, tid) \
*(__le16 *)(pbuf) |= cpu_to_le16(tid & 0xf)
#define GetPriority(pbuf) ((le16_to_cpu(*(__le16 *)(pbuf))) & 0xf)
#define SetEOSP(pbuf, eosp) \
*(__le16 *)(pbuf) |= cpu_to_le16((eosp & 1) << 4)
#define SetAckpolicy(pbuf, ack) \
*(__le16 *)(pbuf) |= cpu_to_le16((ack & 3) << 5)
#define GetAckpolicy(pbuf) (((le16_to_cpu(*(__le16 *)pbuf)) >> 5) & 0x3)
#define GetAMsdu(pbuf) (((le16_to_cpu(*(__le16 *)pbuf)) >> 7) & 0x1)
#define GetAid(pbuf) (le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 2)) & 0x3fff)
#define GetAddr1Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 4))
#define GetAddr2Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 10))
#define GetAddr3Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 16))
static inline unsigned char *get_hdr_bssid(unsigned char *pframe)
{
unsigned char *sa;
unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe);
switch (to_fr_ds) {
case 0x00: /* ToDs=0, FromDs=0 */
sa = GetAddr3Ptr(pframe);
break;
case 0x01: /* ToDs=0, FromDs=1 */
sa = GetAddr2Ptr(pframe);
break;
case 0x02: /* ToDs=1, FromDs=0 */
sa = GetAddr1Ptr(pframe);
break;
case 0x03: /* ToDs=1, FromDs=1 */
sa = GetAddr1Ptr(pframe);
break;
default:
sa = NULL; /* */
break;
}
return sa;
}
/*-----------------------------------------------------------------------------
Below is for the security related definition
------------------------------------------------------------------------------*/
#define _ASOCREQ_IE_OFFSET_ 4 /* excluding wlan_hdr */
#define _ASOCRSP_IE_OFFSET_ 6
#define _REASOCREQ_IE_OFFSET_ 10
#define _REASOCRSP_IE_OFFSET_ 6
#define _PROBEREQ_IE_OFFSET_ 0
#define _PROBERSP_IE_OFFSET_ 12
#define _AUTH_IE_OFFSET_ 6
#define _DEAUTH_IE_OFFSET_ 0
#define _BEACON_IE_OFFSET_ 12
#define _PUBLIC_ACTION_IE_OFFSET_ 8
#define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_
/* ---------------------------------------------------------------------------
Below is the fixed elements...
-----------------------------------------------------------------------------*/
#define _AUTH_ALGM_NUM_ 2
#define _AUTH_SEQ_NUM_ 2
#define _BEACON_ITERVAL_ 2
#define _CAPABILITY_ 2
#define _CURRENT_APADDR_ 6
#define _LISTEN_INTERVAL_ 2
#define _RSON_CODE_ 2
#define _ASOC_ID_ 2
#define _STATUS_CODE_ 2
#define _TIMESTAMP_ 8
#define AUTH_ODD_TO 0
#define AUTH_EVEN_TO 1
/*-----------------------------------------------------------------------------
Below is the definition for 802.11i / 802.1x
------------------------------------------------------------------------------*/
#define _IEEE8021X_MGT_ 1 /* WPA */
#define _IEEE8021X_PSK_ 2 /* WPA with pre-shared key */
/*
* #define _NO_PRIVACY_ 0
* #define _WEP_40_PRIVACY_ 1
* #define _TKIP_PRIVACY_ 2
* #define _WRAP_PRIVACY_ 3
* #define _CCMP_PRIVACY_ 4
* #define _WEP_104_PRIVACY_ 5
* #define _WEP_WPA_MIXED_PRIVACY_ 6 WEP + WPA
*/
/*-----------------------------------------------------------------------------
Below is the definition for WMM
------------------------------------------------------------------------------*/
#define _WMM_IE_Length_ 7 /* for WMM STA */
/*-----------------------------------------------------------------------------
Below is the definition for 802.11n
------------------------------------------------------------------------------*/
/**
* struct rtw_ieee80211_ht_cap - HT additional information
*
* This structure refers to "HT information element" as
* described in 802.11n draft section 7.3.2.53
*/
struct ieee80211_ht_addt_info {
unsigned char control_chan;
unsigned char ht_param;
unsigned short operation_mode;
unsigned short stbc_param;
unsigned char basic_set[16];
} __packed;
struct HT_info_element {
unsigned char primary_channel;
unsigned char infos[5];
unsigned char MCS_rate[16];
} __packed;
struct AC_param {
unsigned char ACI_AIFSN;
unsigned char CW;
__le16 TXOP_limit;
} __packed;
struct WMM_para_element {
unsigned char QoS_info;
unsigned char reserved;
struct AC_param ac_param[4];
} __packed;
struct ADDBA_request {
unsigned char dialog_token;
__le16 BA_para_set;
unsigned short BA_timeout_value;
unsigned short BA_starting_seqctrl;
} __packed;
enum ht_cap_ampdu_factor {
MAX_AMPDU_FACTOR_8K = 0,
MAX_AMPDU_FACTOR_16K = 1,
MAX_AMPDU_FACTOR_32K = 2,
MAX_AMPDU_FACTOR_64K = 3,
};
#define OP_MODE_PURE 0
#define OP_MODE_MAY_BE_LEGACY_STAS 1
#define OP_MODE_20MHZ_HT_STA_ASSOCED 2
#define OP_MODE_MIXED 3
#define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK ((u8)BIT(0) | BIT(1))
#define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE ((u8)BIT(0))
#define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW ((u8)BIT(0) | BIT(1))
#define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH ((u8)BIT(2))
#define HT_INFO_HT_PARAM_RIFS_MODE ((u8)BIT(3))
#define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY ((u8)BIT(4))
#define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY ((u8)BIT(5))
#define HT_INFO_OPERATION_MODE_OP_MODE_MASK \
((u16)(0x0001 | 0x0002))
#define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET 0
#define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT ((u8)BIT(2))
#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8)BIT(3))
#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8)BIT(4))
/* ===============WPS Section=============== */
/* For WPSv1.0 */
#define WPSOUI 0x0050f204
/* WPS attribute ID */
#define WPS_ATTR_VER1 0x104A
#define WPS_ATTR_SIMPLE_CONF_STATE 0x1044
#define WPS_ATTR_RESP_TYPE 0x103B
#define WPS_ATTR_UUID_E 0x1047
#define WPS_ATTR_MANUFACTURER 0x1021
#define WPS_ATTR_MODEL_NAME 0x1023
#define WPS_ATTR_MODEL_NUMBER 0x1024
#define WPS_ATTR_SERIAL_NUMBER 0x1042
#define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054
#define WPS_ATTR_SEC_DEV_TYPE_LIST 0x1055
#define WPS_ATTR_DEVICE_NAME 0x1011
#define WPS_ATTR_CONF_METHOD 0x1008
#define WPS_ATTR_RF_BANDS 0x103C
#define WPS_ATTR_DEVICE_PWID 0x1012
#define WPS_ATTR_REQUEST_TYPE 0x103A
#define WPS_ATTR_ASSOCIATION_STATE 0x1002
#define WPS_ATTR_CONFIG_ERROR 0x1009
#define WPS_ATTR_VENDOR_EXT 0x1049
#define WPS_ATTR_SELECTED_REGISTRAR 0x1041
/* Value of WPS Request Type Attribute */
#define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00
#define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01
#define WPS_REQ_TYPE_REGISTRAR 0x02
#define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03
/* Value of WPS Response Type Attribute */
#define WPS_RESPONSE_TYPE_INFO_ONLY 0x00
#define WPS_RESPONSE_TYPE_8021X 0x01
#define WPS_RESPONSE_TYPE_REGISTRAR 0x02
#define WPS_RESPONSE_TYPE_AP 0x03
/* Value of WPS WiFi Simple Configuration State Attribute */
#define WPS_WSC_STATE_NOT_CONFIG 0x01
#define WPS_WSC_STATE_CONFIG 0x02
/* Value of WPS Version Attribute */
#define WPS_VERSION_1 0x10
/* Value of WPS Configuration Method Attribute */
#define WPS_CONFIG_METHOD_FLASH 0x0001
#define WPS_CONFIG_METHOD_ETHERNET 0x0002
#define WPS_CONFIG_METHOD_LABEL 0x0004
#define WPS_CONFIG_METHOD_DISPLAY 0x0008
#define WPS_CONFIG_METHOD_E_NFC 0x0010
#define WPS_CONFIG_METHOD_I_NFC 0x0020
#define WPS_CONFIG_METHOD_NFC 0x0040
#define WPS_CONFIG_METHOD_PBC 0x0080
#define WPS_CONFIG_METHOD_KEYPAD 0x0100
#define WPS_CONFIG_METHOD_VPBC 0x0280
#define WPS_CONFIG_METHOD_PPBC 0x0480
#define WPS_CONFIG_METHOD_VDISPLAY 0x2008
#define WPS_CONFIG_METHOD_PDISPLAY 0x4008
/* Value of WPS RF Bands Attribute */
#define WPS_RF_BANDS_2_4_GHZ 0x01
#define WPS_RF_BANDS_5_GHZ 0x02
#define IP_MCAST_MAC(mac) \
((mac[0] == 0x01) && (mac[1] == 0x00) && (mac[2] == 0x5e))
#define ICMPV6_MCAST_MAC(mac) \
((mac[0] == 0x33) && (mac[1] == 0x33) && (mac[2] != 0xff))
#endif /* _WIFI_H_ */

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drivers/staging/rtl8188eu/include/wlan_bssdef.h
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@ -1,240 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __WLAN_BSSDEF_H__
#define __WLAN_BSSDEF_H__
#define MAX_IE_SZ 768
#define NDIS_802_11_LENGTH_SSID 32
#define NDIS_802_11_LENGTH_RATES 8
#define NDIS_802_11_LENGTH_RATES_EX 16
#define NDIS_802_11_RSSI long /* in dBm */
struct ndis_802_11_ssid {
u32 ssid_length;
u8 ssid[32];
};
enum NDIS_802_11_NETWORK_TYPE {
Ndis802_11FH,
Ndis802_11DS,
Ndis802_11OFDM5,
Ndis802_11OFDM24,
Ndis802_11NetworkTypeMax /* dummy upper bound */
};
struct ndis_802_11_config_fh {
u32 Length; /* Length of structure */
u32 HopPattern; /* As defined by 802.11, MSB set */
u32 HopSet; /* to one if non-802.11 */
u32 DwellTime; /* units are Kusec */
};
/*
* FW will only save the channel number in DSConfig.
* ODI Handler will convert the channel number to freq. number.
*/
struct ndis_802_11_config {
u32 Length; /* Length of structure */
u32 BeaconPeriod; /* units are Kusec */
u32 ATIMWindow; /* units are Kusec */
u32 DSConfig; /* Frequency, units are kHz */
struct ndis_802_11_config_fh FHConfig;
};
enum ndis_802_11_network_infra {
Ndis802_11IBSS,
Ndis802_11Infrastructure,
Ndis802_11AutoUnknown,
Ndis802_11InfrastructureMax, /* dummy upper bound */
Ndis802_11APMode
};
struct ndis_802_11_fixed_ie {
u8 Timestamp[8];
u16 BeaconInterval;
u16 Capabilities;
};
struct ndis_802_11_var_ie {
u8 ElementID;
u8 Length;
u8 data[];
};
/*
* Length is the 4 bytes multiples of the sume of
* [ETH_ALEN] + 2 + sizeof (struct ndis_802_11_ssid) + sizeof (u32)
* + sizeof (NDIS_802_11_RSSI) + sizeof (enum NDIS_802_11_NETWORK_TYPE)
* + sizeof (struct ndis_802_11_config)
* + NDIS_802_11_LENGTH_RATES_EX + ie_length
*
* Except the ie_length, all other fields are fixed length.
* Therefore, we can define a macro to represent the partial sum.
*/
enum ndis_802_11_auth_mode {
Ndis802_11AuthModeOpen,
Ndis802_11AuthModeShared,
Ndis802_11AuthModeAutoSwitch,
Ndis802_11AuthModeWPA,
Ndis802_11AuthModeWPAPSK,
Ndis802_11AuthModeWPANone,
Ndis802_11AuthModeWAPI,
Ndis802_11AuthModeMax /* Not a real mode, upper bound */
};
enum ndis_802_11_wep_status {
Ndis802_11WEPEnabled,
Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
Ndis802_11WEPDisabled,
Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
Ndis802_11WEPKeyAbsent,
Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
Ndis802_11WEPNotSupported,
Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
Ndis802_11Encryption2Enabled,
Ndis802_11Encryption2KeyAbsent,
Ndis802_11Encryption3Enabled,
Ndis802_11Encryption3KeyAbsent,
Ndis802_11_EncryptionWAPI
};
#define NDIS_802_11_AI_REQFI_CAPABILITIES 1
#define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2
#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4
#define NDIS_802_11_AI_RESFI_CAPABILITIES 1
#define NDIS_802_11_AI_RESFI_STATUSCODE 2
#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4
enum ndis_802_11_reload_def {
Ndis802_11ReloadWEPKeys
};
struct ndis_802_11_wep {
u32 Length; /* Length of this structure */
u32 KeyIndex; /* 0 is the per-client key,
* 1-N are the global keys
*/
u32 KeyLength; /* length of key in bytes */
u8 KeyMaterial[16];/* variable len depending on above field */
};
enum ndis_802_11_status_type {
Ndis802_11StatusType_Authentication,
Ndis802_11StatusType_MediaStreamMode,
Ndis802_11StatusType_PMKID_CandidateList,
Ndis802_11StatusTypeMax /* not a real type, defined as
* an upper bound
*/
};
/* mask for authentication/integrity fields */
#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f
#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01
#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02
#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06
#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E
/* MIC check time, 60 seconds. */
#define MIC_CHECK_TIME 60000000
#ifndef Ndis802_11APMode
#define Ndis802_11APMode (Ndis802_11InfrastructureMax + 1)
#endif
struct wlan_phy_info {
u8 SignalStrength;/* in percentage) */
u8 SignalQuality;/* in percentage) */
u8 Optimum_antenna; /* for Antenna diversity */
u8 Reserved_0;
};
struct wlan_bcn_info {
/* these infor get from rtw_get_encrypt_info when
* * translate scan to UI
*/
u8 encryp_protocol;/* ENCRYP_PROTOCOL_E: OPEN/WEP/WPA/WPA2/WAPI */
int group_cipher; /* WPA/WPA2 group cipher */
int pairwise_cipher;/* WPA/WPA2/WEP pairwise cipher */
int is_8021x;
/* bwmode 20/40 and ch_offset UP/LOW */
unsigned short ht_cap_info;
unsigned char ht_info_infos_0;
};
/* temporally add #pragma pack for structure alignment issue of
* struct wlan_bssid_ex and get_struct wlan_bssid_ex_sz()
*/
struct wlan_bssid_ex {
u32 Length;
unsigned char MacAddress[ETH_ALEN];
u8 Reserved[2];/* 0]: IS beacon frame */
struct ndis_802_11_ssid ssid;
u32 Privacy;
NDIS_802_11_RSSI Rssi;/* in dBM,raw data ,get from PHY) */
enum NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
struct ndis_802_11_config Configuration;
enum ndis_802_11_network_infra InfrastructureMode;
unsigned char SupportedRates[NDIS_802_11_LENGTH_RATES_EX];
struct wlan_phy_info PhyInfo;
u32 ie_length;
u8 ies[MAX_IE_SZ]; /* timestamp, beacon interval, and
* capability information)
*/
} __packed;
static inline uint get_wlan_bssid_ex_sz(struct wlan_bssid_ex *bss)
{
return sizeof(struct wlan_bssid_ex) - MAX_IE_SZ + bss->ie_length;
}
struct wlan_network {
struct list_head list;
int network_type; /* refer to ieee80211.h for WIRELESS_11A/B/G */
int fixed; /* set fixed when not to be removed
* in site-surveying
*/
unsigned long last_scanned; /* timestamp for the network */
int aid; /* will only be valid when a BSS is joinned. */
int join_res;
struct wlan_bssid_ex network; /* must be the last item */
struct wlan_bcn_info BcnInfo;
};
enum VRTL_CARRIER_SENSE {
DISABLE_VCS,
ENABLE_VCS,
AUTO_VCS
};
enum VCS_TYPE {
NONE_VCS,
RTS_CTS,
CTS_TO_SELF
};
#define PWR_CAM 0
#define PWR_MINPS 1
#define PWR_MAXPS 2
#define PWR_UAPSD 3
#define PWR_VOIP 4
enum UAPSD_MAX_SP {
NO_LIMIT,
TWO_MSDU,
FOUR_MSDU,
SIX_MSDU
};
#define NUM_PRE_AUTH_KEY 16
#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY
#endif /* ifndef WLAN_BSSDEF_H_ */

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