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arm64/sysreg: Convert DCZID_EL0 to automatic generation 

Convert DCZID_EL0 to automatic register generation as per DDI0487H.a, no
functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-19-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Mark Brown 2022-07-04 18:02:52 +01:00 committed by Will Deacon
parent 9a3634d023
commit 5589083d80
2 changed files with 6 additions and 5 deletions
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5
arch/arm64/include/asm/sysreg.h
View File

@ -461,8 +461,6 @@
#define SMIDR_EL1_SMPS_SHIFT 15
#define SMIDR_EL1_AFFINITY_SHIFT 0
#define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7)
#define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0)
#define SYS_RNDRRS_EL0 sys_reg(3, 3, 2, 4, 1)
@ -1081,9 +1079,6 @@
#define MVFR2_FPMISC_SHIFT 4
#define MVFR2_SIMDMISC_SHIFT 0
#define DCZID_EL0_DZP_SHIFT 4
#define DCZID_EL0_BS_SHIFT 0
#define CPACR_EL1_FPEN_EL1EN (BIT(20)) /* enable EL1 access */
#define CPACR_EL1_FPEN_EL0EN (BIT(21)) /* enable EL0 access, if EL1EN set */

6
arch/arm64/tools/sysreg
View File

@ -294,6 +294,12 @@ Res0 13:4
Field 3:0 IminLine
EndSysreg
Sysreg DCZID_EL0 3 3 0 0 7
Res0 63:5
Field 4 DZP
Field 3:0 BS
EndSysreg
Sysreg SVCR 3 3 4 2 2
Res0 63:2
Field 1 ZA