Merge git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Marcelo Tosatti: - Fix for guest triggerable BUG_ON (CVE-2014-0155) - CR4.SMAP support - Spurious WARN_ON() fix * git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86: remove WARN_ON from get_kernel_ns() KVM: Rename variable smep to cr4_smep KVM: expose SMAP feature to guest KVM: Disable SMAP for guests in EPT realmode and EPT unpaging mode KVM: Add SMAP support when setting CR4 KVM: Remove SMAP bit from CR4_RESERVED_BITS KVM: ioapic: try to recover if pending_eoi goes out of range KVM: ioapic: fix assignment of ioapic->rtc_status.pending_eoi (CVE-2014-0155)
This commit is contained in:
commit
55101e2d6c
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@ -60,7 +60,7 @@
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| X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
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| X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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@ -308,7 +308,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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const u32 kvm_supported_word9_x86_features =
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F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
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F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
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F(ADX);
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F(ADX) | F(SMAP);
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/* all calls to cpuid_count() should be made on the same cpu */
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get_cpu();
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@ -48,6 +48,14 @@ static inline bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
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return best && (best->ebx & bit(X86_FEATURE_SMEP));
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}
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static inline bool guest_cpuid_has_smap(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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best = kvm_find_cpuid_entry(vcpu, 7, 0);
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return best && (best->ebx & bit(X86_FEATURE_SMAP));
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}
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static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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@ -3601,20 +3601,27 @@ static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
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}
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}
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static void update_permission_bitmask(struct kvm_vcpu *vcpu,
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void update_permission_bitmask(struct kvm_vcpu *vcpu,
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struct kvm_mmu *mmu, bool ept)
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{
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unsigned bit, byte, pfec;
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u8 map;
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bool fault, x, w, u, wf, uf, ff, smep;
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bool fault, x, w, u, wf, uf, ff, smapf, cr4_smap, cr4_smep, smap = 0;
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smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
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cr4_smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
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cr4_smap = kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
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for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
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pfec = byte << 1;
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map = 0;
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wf = pfec & PFERR_WRITE_MASK;
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uf = pfec & PFERR_USER_MASK;
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ff = pfec & PFERR_FETCH_MASK;
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/*
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* PFERR_RSVD_MASK bit is set in PFEC if the access is not
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* subject to SMAP restrictions, and cleared otherwise. The
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* bit is only meaningful if the SMAP bit is set in CR4.
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*/
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smapf = !(pfec & PFERR_RSVD_MASK);
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for (bit = 0; bit < 8; ++bit) {
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x = bit & ACC_EXEC_MASK;
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w = bit & ACC_WRITE_MASK;
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@ -3626,12 +3633,33 @@ static void update_permission_bitmask(struct kvm_vcpu *vcpu,
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/* Allow supervisor writes if !cr0.wp */
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w |= !is_write_protection(vcpu) && !uf;
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/* Disallow supervisor fetches of user code if cr4.smep */
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x &= !(smep && u && !uf);
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x &= !(cr4_smep && u && !uf);
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/*
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* SMAP:kernel-mode data accesses from user-mode
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* mappings should fault. A fault is considered
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* as a SMAP violation if all of the following
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* conditions are ture:
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* - X86_CR4_SMAP is set in CR4
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* - An user page is accessed
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* - Page fault in kernel mode
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* - if CPL = 3 or X86_EFLAGS_AC is clear
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*
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* Here, we cover the first three conditions.
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* The fourth is computed dynamically in
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* permission_fault() and is in smapf.
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*
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* Also, SMAP does not affect instruction
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* fetches, add the !ff check here to make it
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* clearer.
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*/
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smap = cr4_smap && u && !uf && !ff;
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} else
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/* Not really needed: no U/S accesses on ept */
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u = 1;
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fault = (ff && !x) || (uf && !u) || (wf && !w);
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fault = (ff && !x) || (uf && !u) || (wf && !w) ||
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(smapf && smap);
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map |= fault << bit;
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}
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mmu->permissions[byte] = map;
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@ -44,11 +44,17 @@
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#define PT_DIRECTORY_LEVEL 2
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#define PT_PAGE_TABLE_LEVEL 1
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#define PFERR_PRESENT_MASK (1U << 0)
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#define PFERR_WRITE_MASK (1U << 1)
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#define PFERR_USER_MASK (1U << 2)
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#define PFERR_RSVD_MASK (1U << 3)
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#define PFERR_FETCH_MASK (1U << 4)
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#define PFERR_PRESENT_BIT 0
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#define PFERR_WRITE_BIT 1
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#define PFERR_USER_BIT 2
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#define PFERR_RSVD_BIT 3
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#define PFERR_FETCH_BIT 4
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#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
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#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
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#define PFERR_USER_MASK (1U << PFERR_USER_BIT)
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#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
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#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
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int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
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void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
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void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context);
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void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
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bool execonly);
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void update_permission_bitmask(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
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bool ept);
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static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm)
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{
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* Will a fault with a given page-fault error code (pfec) cause a permission
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* fault with the given access (in ACC_* format)?
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*/
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static inline bool permission_fault(struct kvm_mmu *mmu, unsigned pte_access,
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unsigned pfec)
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static inline bool permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
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unsigned pte_access, unsigned pfec)
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{
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return (mmu->permissions[pfec >> 1] >> pte_access) & 1;
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int cpl = kvm_x86_ops->get_cpl(vcpu);
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unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
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/*
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* If CPL < 3, SMAP prevention are disabled if EFLAGS.AC = 1.
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*
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* If CPL = 3, SMAP applies to all supervisor-mode data accesses
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* (these are implicit supervisor accesses) regardless of the value
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* of EFLAGS.AC.
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*
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* This computes (cpl < 3) && (rflags & X86_EFLAGS_AC), leaving
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* the result in X86_EFLAGS_AC. We then insert it in place of
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* the PFERR_RSVD_MASK bit; this bit will always be zero in pfec,
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* but it will be one in index if SMAP checks are being overridden.
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* It is important to keep this branchless.
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*/
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unsigned long smap = (cpl - 3) & (rflags & X86_EFLAGS_AC);
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int index = (pfec >> 1) +
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(smap >> (X86_EFLAGS_AC_BIT - PFERR_RSVD_BIT + 1));
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return (mmu->permissions[index] >> pte_access) & 1;
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}
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void kvm_mmu_invalidate_zap_all_pages(struct kvm *kvm);
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@ -353,7 +353,7 @@ retry_walk:
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walker->ptes[walker->level - 1] = pte;
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} while (!is_last_gpte(mmu, walker->level, pte));
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if (unlikely(permission_fault(mmu, pte_access, access))) {
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if (unlikely(permission_fault(vcpu, mmu, pte_access, access))) {
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errcode |= PFERR_PRESENT_MASK;
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goto error;
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}
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@ -3484,13 +3484,14 @@ static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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hw_cr4 &= ~X86_CR4_PAE;
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hw_cr4 |= X86_CR4_PSE;
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/*
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* SMEP is disabled if CPU is in non-paging mode in
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* hardware. However KVM always uses paging mode to
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* SMEP/SMAP is disabled if CPU is in non-paging mode
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* in hardware. However KVM always uses paging mode to
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* emulate guest non-paging mode with TDP.
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* To emulate this behavior, SMEP needs to be manually
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* disabled when guest switches to non-paging mode.
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* To emulate this behavior, SMEP/SMAP needs to be
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* manually disabled when guest switches to non-paging
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* mode.
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*/
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hw_cr4 &= ~X86_CR4_SMEP;
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hw_cr4 &= ~(X86_CR4_SMEP | X86_CR4_SMAP);
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} else if (!(cr4 & X86_CR4_PAE)) {
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hw_cr4 &= ~X86_CR4_PAE;
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}
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@ -652,6 +652,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
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return 1;
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if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
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return 1;
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if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
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return 1;
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@ -680,6 +683,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
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kvm_mmu_reset_context(vcpu);
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if ((cr4 ^ old_cr4) & X86_CR4_SMAP)
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update_permission_bitmask(vcpu, vcpu->arch.walk_mmu, false);
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if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
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kvm_update_cpuid(vcpu);
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{
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struct timespec ts;
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WARN_ON(preemptible());
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ktime_get_ts(&ts);
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monotonic_to_bootbased(&ts);
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return timespec_to_ns(&ts);
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@ -4164,7 +4169,8 @@ static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
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| (write ? PFERR_WRITE_MASK : 0);
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if (vcpu_match_mmio_gva(vcpu, gva)
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&& !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
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&& !permission_fault(vcpu, vcpu->arch.walk_mmu,
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vcpu->arch.access, access)) {
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*gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
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(gva & (PAGE_SIZE - 1));
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trace_vcpu_match_mmio(gva, *gpa, write, false);
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@ -97,6 +97,14 @@ static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
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bitmap_zero(ioapic->rtc_status.dest_map, KVM_MAX_VCPUS);
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}
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static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
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static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
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{
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if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
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kvm_rtc_eoi_tracking_restore_all(ioapic);
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}
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static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
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{
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bool new_val, old_val;
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} else {
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__clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map);
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ioapic->rtc_status.pending_eoi--;
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rtc_status_pending_eoi_check_valid(ioapic);
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}
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WARN_ON(ioapic->rtc_status.pending_eoi < 0);
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}
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void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
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@ -149,10 +156,10 @@ static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
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static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
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{
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if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map))
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if (test_and_clear_bit(vcpu->vcpu_id, ioapic->rtc_status.dest_map)) {
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--ioapic->rtc_status.pending_eoi;
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WARN_ON(ioapic->rtc_status.pending_eoi < 0);
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rtc_status_pending_eoi_check_valid(ioapic);
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}
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}
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static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
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ioapic->irr &= ~(1 << irq);
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if (irq == RTC_GSI && line_status) {
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/*
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* pending_eoi cannot ever become negative (see
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* rtc_status_pending_eoi_check_valid) and the caller
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* ensures that it is only called if it is >= zero, namely
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* if rtc_irq_check_coalesced returns false).
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*/
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BUG_ON(ioapic->rtc_status.pending_eoi != 0);
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ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
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ioapic->rtc_status.dest_map);
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ioapic->rtc_status.pending_eoi = ret;
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ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
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} else
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ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
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