net/mlx5: Add HW capabilities and structs for SR-IOV E-Switch
Update HCA capabilities and HW struct to include needed capabilities for upcoming Ethernet Switch (SR-IOV E-Switch). Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -665,7 +665,7 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 reserved_17[0x1];
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u8 ets[0x1];
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u8 nic_flow_table[0x1];
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u8 reserved_18_0;
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u8 eswitch_flow_table[0x1];
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u8 early_vf_enable;
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u8 reserved_18[0x2];
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u8 local_ca_ack_delay[0x5];
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@ -789,22 +789,30 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 reserved_60[0x1b];
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u8 log_max_wq_sz[0x5];
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u8 reserved_61[0xa0];
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u8 nic_vport_change_event[0x1];
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u8 reserved_61[0xa];
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u8 log_max_vlan_list[0x5];
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u8 reserved_62[0x3];
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u8 log_max_current_mc_list[0x5];
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u8 reserved_63[0x3];
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u8 log_max_current_uc_list[0x5];
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u8 reserved_64[0x80];
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u8 reserved_65[0x3];
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u8 log_max_l2_table[0x5];
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u8 reserved_63[0x8];
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u8 reserved_66[0x8];
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u8 log_uar_page_sz[0x10];
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u8 reserved_64[0x100];
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u8 reserved_67[0xe0];
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u8 reserved_65[0x1f];
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u8 reserved_68[0x1f];
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u8 cqe_zip[0x1];
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u8 cqe_zip_timeout[0x10];
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u8 cqe_zip_max_num[0x10];
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u8 reserved_66[0x220];
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u8 reserved_69[0x220];
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};
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enum {
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@ -2135,10 +2143,6 @@ struct mlx5_ifc_rmpc_bits {
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struct mlx5_ifc_wq_bits wq;
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};
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enum {
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MLX5_NIC_VPORT_CONTEXT_ALLOWED_LIST_TYPE_CURRENT_UC_MAC_ADDRESS = 0x0,
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};
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struct mlx5_ifc_nic_vport_context_bits {
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u8 reserved_0[0x1f];
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u8 roce_en[0x1];
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