nvme/quirk: Add a delay before checking for adapter readiness
When disabling the controller, the specification says the register NVME_REG_CC should be written and then driver needs to wait the adapter to be ready, which is checked by reading another register bit (NVME_CSTS_RDY). There's a timeout validation in this checking, so in case this timeout is reached the driver gives up and removes the adapter from the system. After a firmware activation procedure, the PCI_DEVICE(0x1c58, 0x0003) (HGST adapter) end up being removed if we issue a reset_controller, because driver keeps verifying the NVME_REG_CSTS until the timeout is reached. This patch adds a necessary quirk for this adapter, by introducing a delay before nvme_wait_ready(), so the reset procedure is able to be completed. This quirk is needed because just increasing the timeout is not enough in case of this adapter - the driver must wait before start reading NVME_REG_CSTS register on this specific device. Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jens Axboe <axboe@fb.com>
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@ -1109,6 +1109,15 @@ int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
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ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
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if (ret)
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return ret;
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/* Checking for ctrl->tagset is a trick to avoid sleeping on module
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* load, since we only need the quirk on reset_controller. Notice
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* that the HGST device needs this delay only in firmware activation
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* procedure; unfortunately we have no (easy) way to verify this.
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*/
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if ((ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) && ctrl->tagset)
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msleep(NVME_QUIRK_DELAY_AMOUNT);
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return nvme_wait_ready(ctrl, cap, false);
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}
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EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
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@ -68,8 +68,21 @@ enum nvme_quirks {
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* logical blocks.
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*/
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NVME_QUIRK_DISCARD_ZEROES = (1 << 2),
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/*
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* The controller needs a delay before starts checking the device
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* readiness, which is done by reading the NVME_CSTS_RDY bit.
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*/
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NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
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};
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/* The below value is the specific amount of delay needed before checking
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* readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
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* NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
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* found empirically.
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*/
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#define NVME_QUIRK_DELAY_AMOUNT 2000
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enum nvme_ctrl_state {
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NVME_CTRL_NEW,
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NVME_CTRL_LIVE,
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@ -2094,6 +2094,8 @@ static const struct pci_device_id nvme_id_table[] = {
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NVME_QUIRK_DISCARD_ZEROES, },
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{ PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */
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.driver_data = NVME_QUIRK_IDENTIFY_CNS, },
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{ PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */
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.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
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{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
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{ PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
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{ 0, }
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