drm/amdgpu: fix and cleanup cpu visible VRAM handling
The detection if a BO was placed in CPU visible VRAM was incorrect. Fix it and merge it with the correct detection in amdgpu_ttm.c Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -382,8 +382,7 @@ retry:
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p->bytes_moved += ctx.bytes_moved;
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p->bytes_moved += ctx.bytes_moved;
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if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&
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if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&
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bo->tbo.mem.mem_type == TTM_PL_VRAM &&
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amdgpu_bo_in_cpu_visible_vram(bo))
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bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT)
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p->bytes_moved_vis += ctx.bytes_moved;
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p->bytes_moved_vis += ctx.bytes_moved;
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if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains &&
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if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains &&
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@ -437,8 +436,7 @@ static bool amdgpu_cs_try_evict(struct amdgpu_cs_parser *p,
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/* Good we can try to move this BO somewhere else */
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/* Good we can try to move this BO somewhere else */
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update_bytes_moved_vis =
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update_bytes_moved_vis =
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adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&
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adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&
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bo->tbo.mem.mem_type == TTM_PL_VRAM &&
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amdgpu_bo_in_cpu_visible_vram(bo);
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bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT;
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amdgpu_ttm_placement_from_domain(bo, other);
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amdgpu_ttm_placement_from_domain(bo, other);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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p->bytes_moved += ctx.bytes_moved;
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p->bytes_moved += ctx.bytes_moved;
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@ -195,6 +195,27 @@ static inline bool amdgpu_bo_gpu_accessible(struct amdgpu_bo *bo)
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}
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}
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}
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}
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/**
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* amdgpu_bo_in_cpu_visible_vram - check if BO is (partly) in visible VRAM
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*/
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static inline bool amdgpu_bo_in_cpu_visible_vram(struct amdgpu_bo *bo)
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{
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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unsigned fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;
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struct drm_mm_node *node = bo->tbo.mem.mm_node;
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unsigned long pages_left;
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if (bo->tbo.mem.mem_type != TTM_PL_VRAM)
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return false;
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for (pages_left = bo->tbo.mem.num_pages; pages_left;
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pages_left -= node->size, node++)
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if (node->start < fpfn)
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return true;
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return false;
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}
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/**
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/**
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* amdgpu_bo_explicit_sync - return whether the bo is explicitly synced
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* amdgpu_bo_explicit_sync - return whether the bo is explicitly synced
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*/
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*/
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@ -223,20 +223,8 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
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if (!adev->mman.buffer_funcs_enabled) {
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if (!adev->mman.buffer_funcs_enabled) {
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_CPU);
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} else if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&
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} else if (adev->gmc.visible_vram_size < adev->gmc.real_vram_size &&
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!(abo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)) {
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!(abo->flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) &&
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unsigned fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;
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amdgpu_bo_in_cpu_visible_vram(abo)) {
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struct drm_mm_node *node = bo->mem.mm_node;
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unsigned long pages_left;
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for (pages_left = bo->mem.num_pages;
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pages_left;
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pages_left -= node->size, node++) {
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if (node->start < fpfn)
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break;
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}
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if (!pages_left)
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goto gtt;
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/* Try evicting to the CPU inaccessible part of VRAM
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/* Try evicting to the CPU inaccessible part of VRAM
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* first, but only set GTT as busy placement, so this
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* first, but only set GTT as busy placement, so this
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@ -245,12 +233,11 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
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*/
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*/
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM |
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT);
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AMDGPU_GEM_DOMAIN_GTT);
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abo->placements[0].fpfn = fpfn;
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abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;
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abo->placements[0].lpfn = 0;
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abo->placements[0].lpfn = 0;
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abo->placement.busy_placement = &abo->placements[1];
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abo->placement.busy_placement = &abo->placements[1];
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abo->placement.num_busy_placement = 1;
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abo->placement.num_busy_placement = 1;
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} else {
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} else {
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gtt:
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
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amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_GTT);
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}
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}
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break;
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break;
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