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staging: comedi: ni_6527: use the comedi_device 'mmio' member 

Use the new 'mmio' member in the comedi_device for the ioremap'ed
base address.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2014-07-29 15:01:30 -07:00 committed by Greg Kroah-Hartman
parent fee3b2455c
commit 53eeeaa6f7
1 changed files with 33 additions and 52 deletions
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85
drivers/staging/comedi/drivers/ni_6527.c
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@ -90,7 +90,6 @@ static const struct ni6527_board ni6527_boards[] = {
};
struct ni6527_private {
void __iomem *mmio_base;
unsigned int filter_interval;
unsigned int filter_enable;
};
@ -99,14 +98,15 @@ static void ni6527_set_filter_interval(struct comedi_device *dev,
unsigned int val)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
if (val != devpriv->filter_interval) {
writeb(val & 0xff, mmio + NI6527_FILT_INTERVAL_REG(0));
writeb((val >> 8) & 0xff, mmio + NI6527_FILT_INTERVAL_REG(1));
writeb((val >> 16) & 0x0f, mmio + NI6527_FILT_INTERVAL_REG(2));
writeb(val & 0xff, dev->mmio + NI6527_FILT_INTERVAL_REG(0));
writeb((val >> 8) & 0xff,
dev->mmio + NI6527_FILT_INTERVAL_REG(1));
writeb((val >> 16) & 0x0f,
dev->mmio + NI6527_FILT_INTERVAL_REG(2));
writeb(NI6527_CLR_INTERVAL, mmio + NI6527_CLR_REG);
writeb(NI6527_CLR_INTERVAL, dev->mmio + NI6527_CLR_REG);
devpriv->filter_interval = val;
}
@ -115,12 +115,9 @@ static void ni6527_set_filter_interval(struct comedi_device *dev,
static void ni6527_set_filter_enable(struct comedi_device *dev,
unsigned int val)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
writeb(val & 0xff, mmio + NI6527_FILT_ENA_REG(0));
writeb((val >> 8) & 0xff, mmio + NI6527_FILT_ENA_REG(1));
writeb((val >> 16) & 0xff, mmio + NI6527_FILT_ENA_REG(2));
writeb(val & 0xff, dev->mmio + NI6527_FILT_ENA_REG(0));
writeb((val >> 8) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(1));
writeb((val >> 16) & 0xff, dev->mmio + NI6527_FILT_ENA_REG(2));
}
static int ni6527_di_insn_config(struct comedi_device *dev,
@ -162,13 +159,11 @@ static int ni6527_di_insn_bits(struct comedi_device *dev,
struct comedi_insn *insn,
unsigned int *data)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
unsigned int val;
val = readb(mmio + NI6527_DI_REG(0));
val |= (readb(mmio + NI6527_DI_REG(1)) << 8);
val |= (readb(mmio + NI6527_DI_REG(2)) << 16);
val = readb(dev->mmio + NI6527_DI_REG(0));
val |= (readb(dev->mmio + NI6527_DI_REG(1)) << 8);
val |= (readb(dev->mmio + NI6527_DI_REG(2)) << 16);
data[1] = val;
@ -180,8 +175,6 @@ static int ni6527_do_insn_bits(struct comedi_device *dev,
struct comedi_insn *insn,
unsigned int *data)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
unsigned int mask;
mask = comedi_dio_update_state(s, data);
@ -190,11 +183,13 @@ static int ni6527_do_insn_bits(struct comedi_device *dev,
unsigned int val = s->state ^ 0xffffff;
if (mask & 0x0000ff)
writeb(val & 0xff, mmio + NI6527_DO_REG(0));
writeb(val & 0xff, dev->mmio + NI6527_DO_REG(0));
if (mask & 0x00ff00)
writeb((val >> 8) & 0xff, mmio + NI6527_DO_REG(1));
writeb((val >> 8) & 0xff,
dev->mmio + NI6527_DO_REG(1));
if (mask & 0xff0000)
writeb((val >> 16) & 0xff, mmio + NI6527_DO_REG(2));
writeb((val >> 16) & 0xff,
dev->mmio + NI6527_DO_REG(2));
}
data[1] = s->state;
@ -205,12 +200,10 @@ static int ni6527_do_insn_bits(struct comedi_device *dev,
static irqreturn_t ni6527_interrupt(int irq, void *d)
{
struct comedi_device *dev = d;
struct ni6527_private *devpriv = dev->private;
struct comedi_subdevice *s = dev->read_subdev;
void __iomem *mmio = devpriv->mmio_base;
unsigned int status;
status = readb(mmio + NI6527_STATUS_REG);
status = readb(dev->mmio + NI6527_STATUS_REG);
if (!(status & NI6527_STATUS_IRQ))
return IRQ_NONE;
@ -220,7 +213,7 @@ static irqreturn_t ni6527_interrupt(int irq, void *d)
comedi_event(dev, s);
}
writeb(NI6527_CLR_IRQS, mmio + NI6527_CLR_REG);
writeb(NI6527_CLR_IRQS, dev->mmio + NI6527_CLR_REG);
return IRQ_HANDLED;
}
@ -270,11 +263,8 @@ static int ni6527_intr_cmdtest(struct comedi_device *dev,
static int ni6527_intr_cmd(struct comedi_device *dev,
struct comedi_subdevice *s)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
writeb(NI6527_CLR_IRQS, mmio + NI6527_CLR_REG);
writeb(NI6527_CTRL_ENABLE_IRQS, mmio + NI6527_CTRL_REG);
writeb(NI6527_CLR_IRQS, dev->mmio + NI6527_CLR_REG);
writeb(NI6527_CTRL_ENABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
return 0;
}
@ -282,10 +272,7 @@ static int ni6527_intr_cmd(struct comedi_device *dev,
static int ni6527_intr_cancel(struct comedi_device *dev,
struct comedi_subdevice *s)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
writeb(NI6527_CTRL_DISABLE_IRQS, mmio + NI6527_CTRL_REG);
writeb(NI6527_CTRL_DISABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
return 0;
}
@ -303,8 +290,6 @@ static void ni6527_set_edge_detection(struct comedi_device *dev,
unsigned int rising,
unsigned int falling)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
unsigned int i;
rising &= mask;
@ -313,19 +298,20 @@ static void ni6527_set_edge_detection(struct comedi_device *dev,
if (mask & 0xff) {
if (~mask & 0xff) {
/* preserve rising-edge detection channels */
rising |= readb(mmio +
rising |= readb(dev->mmio +
NI6527_RISING_EDGE_REG(i)) &
(~mask & 0xff);
/* preserve falling-edge detection channels */
falling |= readb(mmio +
falling |= readb(dev->mmio +
NI6527_FALLING_EDGE_REG(i)) &
(~mask & 0xff);
}
/* update rising-edge detection channels */
writeb(rising & 0xff, mmio + NI6527_RISING_EDGE_REG(i));
writeb(rising & 0xff,
dev->mmio + NI6527_RISING_EDGE_REG(i));
/* update falling-edge detection channels */
writeb(falling & 0xff,
mmio + NI6527_FALLING_EDGE_REG(i));
dev->mmio + NI6527_FALLING_EDGE_REG(i));
}
rising >>= 8;
falling >>= 8;
@ -387,9 +373,6 @@ static int ni6527_intr_insn_config(struct comedi_device *dev,
static void ni6527_reset(struct comedi_device *dev)
{
struct ni6527_private *devpriv = dev->private;
void __iomem *mmio = devpriv->mmio_base;
/* disable deglitch filters on all channels */
ni6527_set_filter_enable(dev, 0);
@ -397,8 +380,8 @@ static void ni6527_reset(struct comedi_device *dev)
ni6527_set_edge_detection(dev, 0xffffffff, 0, 0);
writeb(NI6527_CLR_IRQS | NI6527_CLR_RESET_FILT,
mmio + NI6527_CLR_REG);
writeb(NI6527_CTRL_DISABLE_IRQS, mmio + NI6527_CTRL_REG);
dev->mmio + NI6527_CLR_REG);
writeb(NI6527_CTRL_DISABLE_IRQS, dev->mmio + NI6527_CTRL_REG);
}
static int ni6527_auto_attach(struct comedi_device *dev,
@ -425,12 +408,12 @@ static int ni6527_auto_attach(struct comedi_device *dev,
if (ret)
return ret;
devpriv->mmio_base = pci_ioremap_bar(pcidev, 1);
if (!devpriv->mmio_base)
dev->mmio = pci_ioremap_bar(pcidev, 1);
if (!dev->mmio)
return -ENOMEM;
/* make sure this is actually a 6527 device */
if (readb(devpriv->mmio_base + NI6527_ID_REG) != 0x27)
if (readb(dev->mmio + NI6527_ID_REG) != 0x27)
return -ENODEV;
ni6527_reset(dev);
@ -487,9 +470,7 @@ static int ni6527_auto_attach(struct comedi_device *dev,
static void ni6527_detach(struct comedi_device *dev)
{
struct ni6527_private *devpriv = dev->private;
if (devpriv && devpriv->mmio_base)
if (dev->mmio)
ni6527_reset(dev);
if (dev->irq)
free_irq(dev->irq, dev);