media: imx-jpeg: Support to assign slot for encoder/decoder
imx jpeg encoder and decoder support 4 slots each, aim to support some virtualization scenarios. driver should only enable one slot one time. but due to some hardware issue, only slot 0 can be enabled in imx8q platform, and they may be fixed in imx9 platform. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
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dcff0b56f6
commit
53ebeea505
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@ -58,7 +58,6 @@
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#define CAST_OFBSIZE_LO CAST_STATUS18
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#define CAST_OFBSIZE_HI CAST_STATUS19
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#define MXC_MAX_SLOTS 1 /* TODO use all 4 slots*/
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/* JPEG-Decoder Wrapper Slot Registers 0..3 */
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#define SLOT_BASE 0x10000
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#define SLOT_STATUS 0x0
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@ -745,87 +745,77 @@ static void notify_src_chg(struct mxc_jpeg_ctx *ctx)
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v4l2_event_queue_fh(&ctx->fh, &ev);
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}
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static int mxc_get_free_slot(struct mxc_jpeg_slot_data slot_data[], int n)
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static int mxc_get_free_slot(struct mxc_jpeg_slot_data *slot_data)
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{
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int free_slot = 0;
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while (slot_data[free_slot].used && free_slot < n)
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free_slot++;
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return free_slot; /* >=n when there are no more free slots */
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if (!slot_data->used)
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return slot_data->slot;
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return -1;
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}
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static bool mxc_jpeg_alloc_slot_data(struct mxc_jpeg_dev *jpeg,
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unsigned int slot)
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static bool mxc_jpeg_alloc_slot_data(struct mxc_jpeg_dev *jpeg)
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{
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struct mxc_jpeg_desc *desc;
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struct mxc_jpeg_desc *cfg_desc;
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void *cfg_stm;
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if (jpeg->slot_data[slot].desc)
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if (jpeg->slot_data.desc)
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goto skip_alloc; /* already allocated, reuse it */
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/* allocate descriptor for decoding/encoding phase */
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desc = dma_alloc_coherent(jpeg->dev,
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sizeof(struct mxc_jpeg_desc),
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&jpeg->slot_data[slot].desc_handle,
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&jpeg->slot_data.desc_handle,
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GFP_ATOMIC);
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if (!desc)
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goto err;
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jpeg->slot_data[slot].desc = desc;
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jpeg->slot_data.desc = desc;
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/* allocate descriptor for configuration phase (encoder only) */
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cfg_desc = dma_alloc_coherent(jpeg->dev,
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sizeof(struct mxc_jpeg_desc),
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&jpeg->slot_data[slot].cfg_desc_handle,
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&jpeg->slot_data.cfg_desc_handle,
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GFP_ATOMIC);
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if (!cfg_desc)
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goto err;
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jpeg->slot_data[slot].cfg_desc = cfg_desc;
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jpeg->slot_data.cfg_desc = cfg_desc;
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/* allocate configuration stream */
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cfg_stm = dma_alloc_coherent(jpeg->dev,
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MXC_JPEG_MAX_CFG_STREAM,
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&jpeg->slot_data[slot].cfg_stream_handle,
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&jpeg->slot_data.cfg_stream_handle,
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GFP_ATOMIC);
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if (!cfg_stm)
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goto err;
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jpeg->slot_data[slot].cfg_stream_vaddr = cfg_stm;
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jpeg->slot_data.cfg_stream_vaddr = cfg_stm;
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skip_alloc:
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jpeg->slot_data[slot].used = true;
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jpeg->slot_data.used = true;
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return true;
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err:
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dev_err(jpeg->dev, "Could not allocate descriptors for slot %d", slot);
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dev_err(jpeg->dev, "Could not allocate descriptors for slot %d", jpeg->slot_data.slot);
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return false;
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}
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static void mxc_jpeg_free_slot_data(struct mxc_jpeg_dev *jpeg,
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unsigned int slot)
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static void mxc_jpeg_free_slot_data(struct mxc_jpeg_dev *jpeg)
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{
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if (slot >= MXC_MAX_SLOTS) {
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dev_err(jpeg->dev, "Invalid slot %d, nothing to free.", slot);
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return;
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}
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/* free descriptor for decoding/encoding phase */
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dma_free_coherent(jpeg->dev, sizeof(struct mxc_jpeg_desc),
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jpeg->slot_data[slot].desc,
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jpeg->slot_data[slot].desc_handle);
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jpeg->slot_data.desc,
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jpeg->slot_data.desc_handle);
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/* free descriptor for encoder configuration phase / decoder DHT */
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dma_free_coherent(jpeg->dev, sizeof(struct mxc_jpeg_desc),
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jpeg->slot_data[slot].cfg_desc,
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jpeg->slot_data[slot].cfg_desc_handle);
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jpeg->slot_data.cfg_desc,
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jpeg->slot_data.cfg_desc_handle);
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/* free configuration stream */
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dma_free_coherent(jpeg->dev, MXC_JPEG_MAX_CFG_STREAM,
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jpeg->slot_data[slot].cfg_stream_vaddr,
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jpeg->slot_data[slot].cfg_stream_handle);
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jpeg->slot_data.cfg_stream_vaddr,
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jpeg->slot_data.cfg_stream_handle);
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jpeg->slot_data[slot].used = false;
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jpeg->slot_data.used = false;
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}
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static void mxc_jpeg_check_and_set_last_buffer(struct mxc_jpeg_ctx *ctx,
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@ -855,7 +845,7 @@ static void mxc_jpeg_job_finish(struct mxc_jpeg_ctx *ctx, enum vb2_buffer_state
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v4l2_m2m_buf_done(dst_buf, state);
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mxc_jpeg_disable_irq(reg, ctx->slot);
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ctx->mxc_jpeg->slot_data[ctx->slot].used = false;
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jpeg->slot_data.used = false;
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if (reset)
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mxc_jpeg_sw_reset(reg);
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}
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@ -919,7 +909,7 @@ static irqreturn_t mxc_jpeg_dec_irq(int irq, void *priv)
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goto job_unlock;
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}
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if (!jpeg->slot_data[slot].used)
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if (!jpeg->slot_data.used)
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goto job_unlock;
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dec_ret = readl(reg + MXC_SLOT_OFFSET(slot, SLOT_STATUS));
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@ -1179,13 +1169,13 @@ static void mxc_jpeg_config_dec_desc(struct vb2_buffer *out_buf,
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struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg;
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void __iomem *reg = jpeg->base_reg;
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unsigned int slot = ctx->slot;
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struct mxc_jpeg_desc *desc = jpeg->slot_data[slot].desc;
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struct mxc_jpeg_desc *cfg_desc = jpeg->slot_data[slot].cfg_desc;
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dma_addr_t desc_handle = jpeg->slot_data[slot].desc_handle;
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dma_addr_t cfg_desc_handle = jpeg->slot_data[slot].cfg_desc_handle;
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dma_addr_t cfg_stream_handle = jpeg->slot_data[slot].cfg_stream_handle;
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unsigned int *cfg_size = &jpeg->slot_data[slot].cfg_stream_size;
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void *cfg_stream_vaddr = jpeg->slot_data[slot].cfg_stream_vaddr;
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struct mxc_jpeg_desc *desc = jpeg->slot_data.desc;
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struct mxc_jpeg_desc *cfg_desc = jpeg->slot_data.cfg_desc;
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dma_addr_t desc_handle = jpeg->slot_data.desc_handle;
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dma_addr_t cfg_desc_handle = jpeg->slot_data.cfg_desc_handle;
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dma_addr_t cfg_stream_handle = jpeg->slot_data.cfg_stream_handle;
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unsigned int *cfg_size = &jpeg->slot_data.cfg_stream_size;
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void *cfg_stream_vaddr = jpeg->slot_data.cfg_stream_vaddr;
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struct mxc_jpeg_src_buf *jpeg_src_buf;
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jpeg_src_buf = vb2_to_mxc_buf(src_buf);
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@ -1245,18 +1235,18 @@ static void mxc_jpeg_config_enc_desc(struct vb2_buffer *out_buf,
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struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg;
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void __iomem *reg = jpeg->base_reg;
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unsigned int slot = ctx->slot;
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struct mxc_jpeg_desc *desc = jpeg->slot_data[slot].desc;
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struct mxc_jpeg_desc *cfg_desc = jpeg->slot_data[slot].cfg_desc;
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dma_addr_t desc_handle = jpeg->slot_data[slot].desc_handle;
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dma_addr_t cfg_desc_handle = jpeg->slot_data[slot].cfg_desc_handle;
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void *cfg_stream_vaddr = jpeg->slot_data[slot].cfg_stream_vaddr;
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struct mxc_jpeg_desc *desc = jpeg->slot_data.desc;
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struct mxc_jpeg_desc *cfg_desc = jpeg->slot_data.cfg_desc;
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dma_addr_t desc_handle = jpeg->slot_data.desc_handle;
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dma_addr_t cfg_desc_handle = jpeg->slot_data.cfg_desc_handle;
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void *cfg_stream_vaddr = jpeg->slot_data.cfg_stream_vaddr;
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struct mxc_jpeg_q_data *q_data;
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enum mxc_jpeg_image_format img_fmt;
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int w, h;
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q_data = mxc_jpeg_get_q_data(ctx, src_buf->vb2_queue->type);
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jpeg->slot_data[slot].cfg_stream_size =
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jpeg->slot_data.cfg_stream_size =
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mxc_jpeg_setup_cfg_stream(cfg_stream_vaddr,
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q_data->fmt->fourcc,
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q_data->crop.width,
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@ -1265,7 +1255,7 @@ static void mxc_jpeg_config_enc_desc(struct vb2_buffer *out_buf,
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/* chain the config descriptor with the encoding descriptor */
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cfg_desc->next_descpt_ptr = desc_handle | MXC_NXT_DESCPT_EN;
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cfg_desc->buf_base0 = jpeg->slot_data[slot].cfg_stream_handle;
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cfg_desc->buf_base0 = jpeg->slot_data.cfg_stream_handle;
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cfg_desc->buf_base1 = 0;
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cfg_desc->line_pitch = 0;
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cfg_desc->stm_bufbase = 0; /* no output expected */
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@ -1408,7 +1398,7 @@ static void mxc_jpeg_device_run_timeout(struct work_struct *work)
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unsigned long flags;
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spin_lock_irqsave(&ctx->mxc_jpeg->hw_lock, flags);
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if (ctx->slot < MXC_MAX_SLOTS && ctx->mxc_jpeg->slot_data[ctx->slot].used) {
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if (ctx->mxc_jpeg->slot_data.used) {
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dev_warn(jpeg->dev, "%s timeout, cancel it\n",
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ctx->mxc_jpeg->mode == MXC_JPEG_DECODE ? "decode" : "encode");
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mxc_jpeg_job_finish(ctx, VB2_BUF_STATE_ERROR, true);
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@ -1476,12 +1466,12 @@ static void mxc_jpeg_device_run(void *priv)
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mxc_jpeg_enable(reg);
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mxc_jpeg_set_l_endian(reg, 1);
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ctx->slot = mxc_get_free_slot(jpeg->slot_data, MXC_MAX_SLOTS);
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if (ctx->slot >= MXC_MAX_SLOTS) {
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ctx->slot = mxc_get_free_slot(&jpeg->slot_data);
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if (ctx->slot < 0) {
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dev_err(dev, "No more free slots\n");
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goto end;
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}
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if (!mxc_jpeg_alloc_slot_data(jpeg, ctx->slot)) {
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if (!mxc_jpeg_alloc_slot_data(jpeg)) {
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dev_err(dev, "Cannot allocate slot data\n");
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goto end;
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}
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@ -2101,7 +2091,7 @@ static int mxc_jpeg_open(struct file *file)
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}
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ctx->fh.ctrl_handler = &ctx->ctrl_handler;
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mxc_jpeg_set_default_params(ctx);
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ctx->slot = MXC_MAX_SLOTS; /* slot not allocated yet */
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ctx->slot = -1; /* slot not allocated yet */
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INIT_DELAYED_WORK(&ctx->task_timer, mxc_jpeg_device_run_timeout);
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if (mxc_jpeg->mode == MXC_JPEG_DECODE)
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@ -2677,6 +2667,11 @@ static int mxc_jpeg_attach_pm_domains(struct mxc_jpeg_dev *jpeg)
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dev_err(dev, "No power domains defined for jpeg node\n");
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return jpeg->num_domains;
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}
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if (jpeg->num_domains == 1) {
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/* genpd_dev_pm_attach() attach automatically if power domains count is 1 */
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jpeg->num_domains = 0;
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return 0;
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}
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jpeg->pd_dev = devm_kmalloc_array(dev, jpeg->num_domains,
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sizeof(*jpeg->pd_dev), GFP_KERNEL);
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int ret;
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int mode;
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const struct of_device_id *of_id;
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unsigned int slot;
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of_id = of_match_node(mxc_jpeg_match, dev->of_node);
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if (!of_id)
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@ -2742,19 +2736,22 @@ static int mxc_jpeg_probe(struct platform_device *pdev)
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if (IS_ERR(jpeg->base_reg))
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return PTR_ERR(jpeg->base_reg);
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for (slot = 0; slot < MXC_MAX_SLOTS; slot++) {
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dec_irq = platform_get_irq(pdev, slot);
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if (dec_irq < 0) {
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ret = dec_irq;
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goto err_irq;
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}
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ret = devm_request_irq(&pdev->dev, dec_irq, mxc_jpeg_dec_irq,
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0, pdev->name, jpeg);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq %d (%d)\n",
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dec_irq, ret);
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goto err_irq;
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}
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ret = of_property_read_u32_index(pdev->dev.of_node, "slot", 0, &jpeg->slot_data.slot);
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if (ret)
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jpeg->slot_data.slot = 0;
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dev_info(&pdev->dev, "choose slot %d\n", jpeg->slot_data.slot);
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dec_irq = platform_get_irq(pdev, 0);
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if (dec_irq < 0) {
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dev_err(&pdev->dev, "Failed to get irq %d\n", dec_irq);
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ret = dec_irq;
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goto err_irq;
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}
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ret = devm_request_irq(&pdev->dev, dec_irq, mxc_jpeg_dec_irq,
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0, pdev->name, jpeg);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq %d (%d)\n",
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dec_irq, ret);
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goto err_irq;
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}
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jpeg->pdev = pdev;
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@ -2914,11 +2911,9 @@ static const struct dev_pm_ops mxc_jpeg_pm_ops = {
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static void mxc_jpeg_remove(struct platform_device *pdev)
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{
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unsigned int slot;
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struct mxc_jpeg_dev *jpeg = platform_get_drvdata(pdev);
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for (slot = 0; slot < MXC_MAX_SLOTS; slot++)
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mxc_jpeg_free_slot_data(jpeg, slot);
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mxc_jpeg_free_slot_data(jpeg);
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pm_runtime_disable(&pdev->dev);
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video_unregister_device(jpeg->dec_vdev);
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@ -97,7 +97,7 @@ struct mxc_jpeg_ctx {
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struct mxc_jpeg_q_data cap_q;
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struct v4l2_fh fh;
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enum mxc_jpeg_enc_state enc_state;
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unsigned int slot;
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int slot;
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unsigned int source_change;
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bool header_parsed;
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struct v4l2_ctrl_handler ctrl_handler;
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@ -106,6 +106,7 @@ struct mxc_jpeg_ctx {
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};
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struct mxc_jpeg_slot_data {
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int slot;
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bool used;
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struct mxc_jpeg_desc *desc; // enc/dec descriptor
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struct mxc_jpeg_desc *cfg_desc; // configuration descriptor
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@ -128,7 +129,7 @@ struct mxc_jpeg_dev {
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struct v4l2_device v4l2_dev;
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struct v4l2_m2m_dev *m2m_dev;
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struct video_device *dec_vdev;
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struct mxc_jpeg_slot_data slot_data[MXC_MAX_SLOTS];
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struct mxc_jpeg_slot_data slot_data;
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int num_domains;
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struct device **pd_dev;
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struct device_link **pd_link;
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