Merge branch 'remotes/lorenzo/pci/hv'
- Support Hyper-V Create Interrupt v3 message (Sunil Muthuswamy) * remotes/lorenzo/pci/hv: PCI: hv: Support for create interrupt v3
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commit
53cb14d256
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@ -64,6 +64,7 @@ enum pci_protocol_version_t {
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PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
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PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
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PCI_PROTOCOL_VERSION_1_3 = PCI_MAKE_VERSION(1, 3), /* Vibranium */
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PCI_PROTOCOL_VERSION_1_4 = PCI_MAKE_VERSION(1, 4), /* WS2022 */
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};
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#define CPU_AFFINITY_ALL -1ULL
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@ -73,6 +74,7 @@ enum pci_protocol_version_t {
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* first.
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*/
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static enum pci_protocol_version_t pci_protocol_versions[] = {
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PCI_PROTOCOL_VERSION_1_4,
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PCI_PROTOCOL_VERSION_1_3,
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PCI_PROTOCOL_VERSION_1_2,
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PCI_PROTOCOL_VERSION_1_1,
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@ -122,6 +124,8 @@ enum pci_message_type {
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PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
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PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
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PCI_BUS_RELATIONS2 = PCI_MESSAGE_BASE + 0x19,
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PCI_RESOURCES_ASSIGNED3 = PCI_MESSAGE_BASE + 0x1A,
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PCI_CREATE_INTERRUPT_MESSAGE3 = PCI_MESSAGE_BASE + 0x1B,
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PCI_MESSAGE_MAXIMUM
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};
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@ -235,6 +239,21 @@ struct hv_msi_desc2 {
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u16 processor_array[32];
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} __packed;
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/*
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* struct hv_msi_desc3 - 1.3 version of hv_msi_desc
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* Everything is the same as in 'hv_msi_desc2' except that the size of the
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* 'vector' field is larger to support bigger vector values. For ex: LPI
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* vectors on ARM.
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*/
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struct hv_msi_desc3 {
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u32 vector;
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u8 delivery_mode;
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u8 reserved;
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u16 vector_count;
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u16 processor_count;
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u16 processor_array[32];
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} __packed;
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/**
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* struct tran_int_desc
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* @reserved: unused, padding
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@ -383,6 +402,12 @@ struct pci_create_interrupt2 {
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struct hv_msi_desc2 int_desc;
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} __packed;
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struct pci_create_interrupt3 {
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struct pci_message message_type;
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union win_slot_encoding wslot;
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struct hv_msi_desc3 int_desc;
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} __packed;
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struct pci_delete_interrupt {
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struct pci_message message_type;
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union win_slot_encoding wslot;
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@ -1328,6 +1353,15 @@ static u32 hv_compose_msi_req_v1(
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return sizeof(*int_pkt);
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}
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/*
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* Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
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* by subsequent retarget in hv_irq_unmask().
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*/
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static int hv_compose_msi_req_get_cpu(struct cpumask *affinity)
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{
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return cpumask_first_and(affinity, cpu_online_mask);
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}
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static u32 hv_compose_msi_req_v2(
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struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
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u32 slot, u8 vector)
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@ -1339,12 +1373,27 @@ static u32 hv_compose_msi_req_v2(
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int_pkt->int_desc.vector = vector;
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int_pkt->int_desc.vector_count = 1;
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int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED;
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cpu = hv_compose_msi_req_get_cpu(affinity);
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int_pkt->int_desc.processor_array[0] =
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hv_cpu_number_to_vp_number(cpu);
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int_pkt->int_desc.processor_count = 1;
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/*
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* Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
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* by subsequent retarget in hv_irq_unmask().
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*/
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cpu = cpumask_first_and(affinity, cpu_online_mask);
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return sizeof(*int_pkt);
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}
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static u32 hv_compose_msi_req_v3(
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struct pci_create_interrupt3 *int_pkt, struct cpumask *affinity,
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u32 slot, u32 vector)
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{
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int cpu;
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int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE3;
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int_pkt->wslot.slot = slot;
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int_pkt->int_desc.vector = vector;
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int_pkt->int_desc.reserved = 0;
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int_pkt->int_desc.vector_count = 1;
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int_pkt->int_desc.delivery_mode = APIC_DELIVERY_MODE_FIXED;
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cpu = hv_compose_msi_req_get_cpu(affinity);
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int_pkt->int_desc.processor_array[0] =
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hv_cpu_number_to_vp_number(cpu);
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int_pkt->int_desc.processor_count = 1;
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@ -1379,6 +1428,7 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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union {
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struct pci_create_interrupt v1;
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struct pci_create_interrupt2 v2;
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struct pci_create_interrupt3 v3;
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} int_pkts;
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} __packed ctxt;
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@ -1426,6 +1476,13 @@ static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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cfg->vector);
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break;
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case PCI_PROTOCOL_VERSION_1_4:
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size = hv_compose_msi_req_v3(&ctxt.int_pkts.v3,
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dest,
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hpdev->desc.win_slot.slot,
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cfg->vector);
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break;
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default:
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/* As we only negotiate protocol versions known to this driver,
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* this path should never hit. However, this is it not a hot
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